Merge tag 'drm-intel-next-2014-02-07' of ssh://git.freedesktop.org/git/drm-intel...

- Yet more steps towards atomic modeset from Ville.
- DP panel power sequencing improvements from Paulo.
- irq code cleanups from Ville.
- 5.4 GHz dp lane clock support for bdw/hsw from Todd.
- Clock readout support for hsw/bdw (aka fastboot) from Jesse.
- Make pipe underruns report at ERROR level (Ville). This is to check our
  improved watermarks code.
- Full ppgtt support from Ben for gen7.
- More fbc fixes and improvements from Ville all over the place, unfortunately
  not yet enabled by default on more platforms.
- w/a cleanups from Ville.
- HiZ stall optimization settings (Chia-I Wu).
- Display register mmio offset refactor patch from Antti.
- RPS improvements for corner-cases from Jeff McGee.

* tag 'drm-intel-next-2014-02-07' of ssh://git.freedesktop.org/git/drm-intel: (166 commits)
  drm/i915: Update rps interrupt limits
  drm/i915: Restore rps/rc6 on reset
  drm/i915: Prevent recursion by retiring requests when the ring is full
  drm/i915: Generate a hang error code
  drm/i915: unify FLIP_DONE macro names
  drm/i915: vlv: s/spin_lock_irqsave/spin_lock/ in irq handler
  drm/i915: factor out valleyview_pipestat_irq_handler
  drm/i915: vlv: don't unmask IIR[DISPLAY_PIPE_A/B_VBLANK] interrupt
  drm/i915: Reorganize display pipe register accesses
  drm/i915: Treat using a purged buffer as a source of EFAULT
  drm/i915: Convert EFAULT into a silent SIGBUS
  drm/i915: release mutex in i915_gem_init()'s error path
  drm/i915: check for oom when allocating private_default_ctx
  drm/i915/vlv: WA to fix Voltage not getting dropped to Vmin when Gfx is power gated.
  drm/i915: Get rid of acthd based guilty batch search
  drm/i915: Use hangcheck score to find guilty context
  drm/i915: Drop WaDisablePSDDualDispatchEnable:ivb for IVB GT2
  drm/i915: Fix IVB GT2 WaDisableDopClockGating and WaDisablePSDDualDispatchEnable
  drm/i915: Don't access snooped pages through the GTT (even for error capture)
  drm/i915: Only print information for filing bug reports once
  ...

Conflicts:
	drivers/gpu/drm/i915/intel_dp.c

diff --cc drivers/gpu/drm/i915/Makefile
Simple merge

diff --cc drivers/gpu/drm/i915/i915_drv.h
Simple merge

diff --cc drivers/gpu/drm/i915/i915_gem_gtt.c
Simple merge

diff --cc drivers/gpu/drm/i915/i915_gpu_error.c
Simple merge

diff --cc drivers/gpu/drm/i915/i915_irq.c
Simple merge

diff --cc drivers/gpu/drm/i915/intel_display.c
Simple merge

diff --cc drivers/gpu/drm/i915/intel_dp.c
index 57552eb386b0b1b6d735a7fb0f9b770405e5f411,0ef2690537510addd0e52aa44814e5d9ea50f415..bd1df502bc34faaf36effec0665d45d5019f20a8
--- 1/drivers/gpu/drm/i915/intel_dp.c
--- 2/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@@ -403,9 -458,8 +458,8 @@@ intel_dp_aux_ch(struct intel_dp *intel_
        uint32_t aux_clock_divider;
        int i, ret, recv_bytes;
        uint32_t status;
-       int try, precharge, clock = 0;
+       int try, clock = 0;
 -      bool has_aux_irq = true;
 +      bool has_aux_irq = HAS_AUX_IRQ(dev);
-       uint32_t timeout;
  
        /* dp aux is extremely sensitive to irq latency, hence request the
         * lowest possible wakeup latency and so prevent the cpu from going into

diff --cc drivers/gpu/drm/i915/intel_ringbuffer.c
Simple merge

diff --cc drivers/gpu/drm/i915/intel_ringbuffer.h
Simple merge

diff --cc include/drm/drm_dp_helper.h
Simple merge