MIPS: Lantiq: Add support for xRX220 SoC
authorHauke Mehrtens <hauke.mehrtens@lantiq.com>
Wed, 28 Oct 2015 22:37:43 +0000 (23:37 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 11 Nov 2015 07:37:31 +0000 (08:37 +0100)
Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com>
Acked-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11394/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
arch/mips/lantiq/xway/prom.c

index 3ab4e986d76f362d57c7adb472f651ceb24f8ef3..dd6005b75e0c0bb594e657ede11df74b21776852 100644 (file)
@@ -35,6 +35,7 @@
 #define SOC_ID_VRX268_2                0x00C /* v1.2 */
 #define SOC_ID_GRX288_2                0x00D /* v1.2 */
 #define SOC_ID_GRX282_2                0x00E /* v1.2 */
+#define SOC_ID_VRX220          0x000
 
 #define SOC_ID_ARX362          0x004
 #define SOC_ID_ARX368          0x005
@@ -55,6 +56,7 @@
 #define SOC_TYPE_AMAZON_SE     0x06
 #define SOC_TYPE_AR10          0x07
 #define SOC_TYPE_GRX390                0x08
+#define SOC_TYPE_VRX220                0x09
 
 /* BOOT_SEL - find what boot media we have */
 #define BS_EXT_ROM             0x0
index 2b0386188010155ad69003bd9b4d14cedfe27f99..8f6e02f1e9650b99830a14bd160ddf12856a9ee1 100644 (file)
@@ -22,6 +22,7 @@
 #define SOC_AR9                "AR9"
 #define SOC_GR9                "GRX200"
 #define SOC_VR9                "xRX200"
+#define SOC_VRX220     "xRX220"
 #define SOC_AR10       "xRX300"
 #define SOC_GRX390     "xRX330"
 
@@ -106,6 +107,12 @@ void __init ltq_soc_detect(struct ltq_soc_info *i)
                i->compatible = COMP_VR9;
                break;
 
+       case SOC_ID_VRX220:
+               i->name = SOC_VRX220;
+               i->type = SOC_TYPE_VRX220;
+               i->compatible = COMP_VR9;
+               break;
+
        case SOC_ID_GRX282_2:
        case SOC_ID_GRX288_2:
                i->name = SOC_GR9;