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(parent: 5110e51) | patch
dmaengine: PL08x: Fix reading the byte count in cctl
authorAlban Bedel <alban.bedel@avionic-design.de>
Sun, 11 Aug 2013 17:59:19 +0000 (19:59 +0200)
committerVinod Koul <vinod.koul@intel.com>
Mon, 2 Sep 2013 06:19:56 +0000 (11:49 +0530)
commitf3287a5206cae1244601d50a4d2a9a96a521c1ee
treeb963749b7277eaaa080c4b201adb8a7343421ec7tree | snapshot
parent5110e51d127221c93f331841e601612b187b60f4commit | diff
dmaengine: PL08x: Fix reading the byte count in cctl

There are more fields than just SWIDTH in CH_CONTROL register, so read
register value must be masked in addition to shifting.

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
drivers/dma/amba-pl08x.c diff | blob | history
Freescale DCU DRM driver