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(parent: eaf6c76) | patch
[IA64] Force error to surface in nofault code
authorRuss Anderson <rja@sgi.com>
Thu, 14 Jun 2007 21:01:24 +0000 (16:01 -0500)
committerTony Luck <tony.luck@intel.com>
Tue, 26 Jun 2007 20:34:16 +0000 (13:34 -0700)
commitc034637967881830979b5415e55578e42f806659
tree8485c5f219af8df274f2a73b1663c73ff8d997c0tree | snapshot
parenteaf6c766446c0faa326b339900f975e6f1f62b01commit | diff
[IA64] Force error to surface in nofault code

Montecito behaves slightly differently than previous processors,
resulting in the MCA due to a failed PIO read to sometimes surfacing
outside the nofault code.  Adding an additional or and stop bits
ensures the MCA surfaces in the nofault code.

Signed-off-by: Russ Anderson <rja@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
arch/ia64/sn/kernel/xp_nofault.S diff | blob | history
Freescale DCU DRM driver