CLK: Pistachio: Add PLL driver
authorAndrew Bresticker <abrestic@chromium.org>
Wed, 25 Feb 2015 03:56:03 +0000 (19:56 -0800)
committerRalf Baechle <ralf@linux-mips.org>
Tue, 31 Mar 2015 09:59:04 +0000 (11:59 +0200)
commit43049b0c83f177083a56d69e64e47c82bcc04185
treeb5a77282449ac612c44b42aea1fbdb76ad1c31e8
parent8e4b7721f61e70396ad8ec2d866c91300f2afbd1
CLK: Pistachio: Add PLL driver

Add a driver for the integer (GF40LP_LAINT) and fractional (GF40LP_FRAC)
PLLs present on Pistachio.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: devicetree@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Cc: James Hartley <james.hartley@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Patchwork: https://patchwork.linux-mips.org/patch/9316/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
drivers/clk/pistachio/Makefile
drivers/clk/pistachio/clk-pll.c [new file with mode: 0644]
drivers/clk/pistachio/clk.h