arm64: Emulate SETEND for AArch32 tasks
authorSuzuki K. Poulose <suzuki.poulose@arm.com>
Wed, 21 Jan 2015 12:43:11 +0000 (12:43 +0000)
committerCatalin Marinas <catalin.marinas@arm.com>
Fri, 23 Jan 2015 17:11:44 +0000 (17:11 +0000)
commit2d888f48e056119495847a269a435d5c3d9df349
treed63ed442721b6ce1305b46105982554d340a0702
parent736d474f0fafd1486f178570bc47660ee9dfdef8
arm64: Emulate SETEND for AArch32 tasks

Emulate deprecated 'setend' instruction for AArch32 bit tasks.

setend [le/be] - Sets the endianness of EL0

On systems with CPUs which support mixed endian at EL0, the hardware
support for the instruction can be enabled by setting the SCTLR_EL1.SED
bit. Like the other emulated instructions it is controlled by an entry in
/proc/sys/abi/. For more information see :
Documentation/arm64/legacy_instructions.txt

The instruction is emulated by setting/clearing the SPSR_EL1.E bit, which
will be reflected in the PSTATE.E in AArch32 context.

This patch also restores the native endianness for the execution of signal
handlers, since the process could have changed the endianness.

Note: All CPUs on the system must have mixed endian support at EL0. Once the
handler is registered, hotplugging a CPU which doesn't support mixed endian,
could lead to unexpected results/behavior in applications.

Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Punit Agrawal <punit.agrawal@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Documentation/arm64/legacy_instructions.txt
arch/arm64/Kconfig
arch/arm64/include/asm/cputype.h
arch/arm64/include/asm/ptrace.h
arch/arm64/kernel/armv8_deprecated.c
arch/arm64/kernel/signal32.c