MIPS: CM: Fix GCR_Cx_CONFIG PVPE mask
authorPaul Burton <paul.burton@imgtec.com>
Tue, 22 Sep 2015 18:12:15 +0000 (11:12 -0700)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 11 Nov 2015 07:35:11 +0000 (08:35 +0100)
commit252d6aa605fa05b559347d3ed0a4f11bbdf6d3d0
tree6f0c90c6a964f8abe340176cb8f6dd48e1ec7ea4
parenta8c20614b0163a71f2df3f9788bfe8b9ff07d742
MIPS: CM: Fix GCR_Cx_CONFIG PVPE mask

The PVPE (or PVP in >= CM3) field is 10 bits wide, but the mask
previously only covered the bottom 9 bits. Extend the mask to cover all
10 bits of the field.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/11206/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/mips-cm.h