Merge branch 'master' into for_paulus

[linux-drm-fsl-dcu.git] / drivers / serial / atmel_serial.c

diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c
index ed7f7209ea5926a8aa840b667884448f6c232ead..df45a7ac773f8fd5b7409b64bc4b764480dbe0fa 100644 (file)
--- a/drivers/serial/atmel_serial.c
+++ b/drivers/serial/atmel_serial.c
@@ -73,35 +73,35 @@
 
 #define ATMEL_ISR_PASS_LIMIT   256
 
-#define UART_PUT_CR(port,v)    writel(v, (port)->membase + ATMEL_US_CR)
-#define UART_GET_MR(port)      readl((port)->membase + ATMEL_US_MR)
-#define UART_PUT_MR(port,v)    writel(v, (port)->membase + ATMEL_US_MR)
-#define UART_PUT_IER(port,v)   writel(v, (port)->membase + ATMEL_US_IER)
-#define UART_PUT_IDR(port,v)   writel(v, (port)->membase + ATMEL_US_IDR)
-#define UART_GET_IMR(port)     readl((port)->membase + ATMEL_US_IMR)
-#define UART_GET_CSR(port)     readl((port)->membase + ATMEL_US_CSR)
-#define UART_GET_CHAR(port)    readl((port)->membase + ATMEL_US_RHR)
-#define UART_PUT_CHAR(port,v)  writel(v, (port)->membase + ATMEL_US_THR)
-#define UART_GET_BRGR(port)    readl((port)->membase + ATMEL_US_BRGR)
-#define UART_PUT_BRGR(port,v)  writel(v, (port)->membase + ATMEL_US_BRGR)
-#define UART_PUT_RTOR(port,v)  writel(v, (port)->membase + ATMEL_US_RTOR)
-
-// #define UART_GET_CR(port)   readl((port)->membase + ATMEL_US_CR)            // is write-only
+#define UART_PUT_CR(port,v)    __raw_writel(v, (port)->membase + ATMEL_US_CR)
+#define UART_GET_MR(port)      __raw_readl((port)->membase + ATMEL_US_MR)
+#define UART_PUT_MR(port,v)    __raw_writel(v, (port)->membase + ATMEL_US_MR)
+#define UART_PUT_IER(port,v)   __raw_writel(v, (port)->membase + ATMEL_US_IER)
+#define UART_PUT_IDR(port,v)   __raw_writel(v, (port)->membase + ATMEL_US_IDR)
+#define UART_GET_IMR(port)     __raw_readl((port)->membase + ATMEL_US_IMR)
+#define UART_GET_CSR(port)     __raw_readl((port)->membase + ATMEL_US_CSR)
+#define UART_GET_CHAR(port)    __raw_readl((port)->membase + ATMEL_US_RHR)
+#define UART_PUT_CHAR(port,v)  __raw_writel(v, (port)->membase + ATMEL_US_THR)
+#define UART_GET_BRGR(port)    __raw_readl((port)->membase + ATMEL_US_BRGR)
+#define UART_PUT_BRGR(port,v)  __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
+#define UART_PUT_RTOR(port,v)  __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
+
+// #define UART_GET_CR(port)   __raw_readl((port)->membase + ATMEL_US_CR)              // is write-only
 
  /* PDC registers */
-#define UART_PUT_PTCR(port,v)  writel(v, (port)->membase + ATMEL_PDC_PTCR)
-#define UART_GET_PTSR(port)    readl((port)->membase + ATMEL_PDC_PTSR)
+#define UART_PUT_PTCR(port,v)  __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
+#define UART_GET_PTSR(port)    __raw_readl((port)->membase + ATMEL_PDC_PTSR)
 
-#define UART_PUT_RPR(port,v)   writel(v, (port)->membase + ATMEL_PDC_RPR)
-#define UART_GET_RPR(port)     readl((port)->membase + ATMEL_PDC_RPR)
-#define UART_PUT_RCR(port,v)   writel(v, (port)->membase + ATMEL_PDC_RCR)
-#define UART_PUT_RNPR(port,v)  writel(v, (port)->membase + ATMEL_PDC_RNPR)
-#define UART_PUT_RNCR(port,v)  writel(v, (port)->membase + ATMEL_PDC_RNCR)
+#define UART_PUT_RPR(port,v)   __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
+#define UART_GET_RPR(port)     __raw_readl((port)->membase + ATMEL_PDC_RPR)
+#define UART_PUT_RCR(port,v)   __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
+#define UART_PUT_RNPR(port,v)  __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
+#define UART_PUT_RNCR(port,v)  __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
 
-#define UART_PUT_TPR(port,v)   writel(v, (port)->membase + ATMEL_PDC_TPR)
-#define UART_PUT_TCR(port,v)   writel(v, (port)->membase + ATMEL_PDC_TCR)
-//#define UART_PUT_TNPR(port,v)        writel(v, (port)->membase + ATMEL_PDC_TNPR)
-//#define UART_PUT_TNCR(port,v)        writel(v, (port)->membase + ATMEL_PDC_TNCR)
+#define UART_PUT_TPR(port,v)   __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
+#define UART_PUT_TCR(port,v)   __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
+//#define UART_PUT_TNPR(port,v)        __raw_writel(v, (port)->membase + ATMEL_PDC_TNPR)
+//#define UART_PUT_TNCR(port,v)        __raw_writel(v, (port)->membase + ATMEL_PDC_TNCR)
 
 static int (*atmel_open_hook)(struct uart_port *);
 static void (*atmel_close_hook)(struct uart_port *);
@@ -689,9 +689,9 @@ static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, struct
        struct atmel_uart_data *data = pdev->dev.platform_data;
 
        port->iotype    = UPIO_MEM;
-       port->flags     = UPF_BOOT_AUTOCONF;
+       port->flags     = UPF_BOOT_AUTOCONF;
        port->ops       = &atmel_pops;
-       port->fifosize  = 1;
+       port->fifosize  = 1;
        port->line      = pdev->id;
        port->dev       = &pdev->dev;
 
@@ -890,7 +890,6 @@ static int atmel_serial_suspend(struct platform_device *pdev, pm_message_t state
        if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock())
                enable_irq_wake(port->irq);
        else {
-               disable_irq_wake(port->irq);
                uart_suspend_port(&atmel_uart, port);
                atmel_port->suspended = 1;
        }
@@ -907,6 +906,8 @@ static int atmel_serial_resume(struct platform_device *pdev)
                uart_resume_port(&atmel_uart, port);
                atmel_port->suspended = 0;
        }
+       else
+               disable_irq_wake(port->irq);
 
        return 0;
 }