Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs

[linux-drm-fsl-dcu.git] / drivers / net / ethernet / chelsio / cxgb4 / t4fw_api.h

diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
index 7c0aec85137a2acee4a892afc5ec14c16731a26e..9b353a88cbdab13a7ce85456e393edf197dd1740 100644 (file)
--- a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h
@@ -673,6 +673,7 @@ enum fw_cmd_opcodes {
        FW_RSS_IND_TBL_CMD             = 0x20,
        FW_RSS_GLB_CONFIG_CMD          = 0x22,
        FW_RSS_VI_CONFIG_CMD           = 0x23,
+       FW_DEVLOG_CMD                  = 0x25,
        FW_CLIP_CMD                    = 0x28,
        FW_LASTC2E_CMD                 = 0x40,
        FW_ERROR_CMD                   = 0x80,
@@ -1058,9 +1059,11 @@ enum fw_params_param_dev {
        FW_PARAMS_PARAM_DEV_FWREV = 0x0B,
        FW_PARAMS_PARAM_DEV_TPREV = 0x0C,
        FW_PARAMS_PARAM_DEV_CF = 0x0D,
+       FW_PARAMS_PARAM_DEV_DIAG = 0x11,
        FW_PARAMS_PARAM_DEV_MAXORDIRD_QP = 0x13, /* max supported QP IRD/ORD */
        FW_PARAMS_PARAM_DEV_MAXIRD_ADAPTER = 0x14, /* max supported adap IRD */
        FW_PARAMS_PARAM_DEV_ULPTX_MEMWRITE_DSGL = 0x17,
+       FW_PARAMS_PARAM_DEV_FWCACHE = 0x18,
 };
 
 /*
@@ -1120,6 +1123,16 @@ enum fw_params_param_dmaq {
        FW_PARAMS_PARAM_DMAQ_EQ_DCBPRIO_ETH = 0x13,
 };
 
+enum fw_params_param_dev_diag {
+       FW_PARAM_DEV_DIAG_TMP           = 0x00,
+       FW_PARAM_DEV_DIAG_VDD           = 0x01,
+};
+
+enum fw_params_param_dev_fwcache {
+       FW_PARAM_DEV_FWCACHE_FLUSH      = 0x00,
+       FW_PARAM_DEV_FWCACHE_FLUSHINV   = 0x01,
+};
+
 #define FW_PARAMS_MNEM_S       24
 #define FW_PARAMS_MNEM_V(x)    ((x) << FW_PARAMS_MNEM_S)
 
@@ -3005,21 +3018,29 @@ enum fw_hdr_chip {
 
 #define FW_HDR_FW_VER_MAJOR_S  24
 #define FW_HDR_FW_VER_MAJOR_M  0xff
+#define FW_HDR_FW_VER_MAJOR_V(x) \
+       ((x) << FW_HDR_FW_VER_MAJOR_S)
 #define FW_HDR_FW_VER_MAJOR_G(x) \
        (((x) >> FW_HDR_FW_VER_MAJOR_S) & FW_HDR_FW_VER_MAJOR_M)
 
 #define FW_HDR_FW_VER_MINOR_S  16
 #define FW_HDR_FW_VER_MINOR_M  0xff
+#define FW_HDR_FW_VER_MINOR_V(x) \
+       ((x) << FW_HDR_FW_VER_MINOR_S)
 #define FW_HDR_FW_VER_MINOR_G(x) \
        (((x) >> FW_HDR_FW_VER_MINOR_S) & FW_HDR_FW_VER_MINOR_M)
 
 #define FW_HDR_FW_VER_MICRO_S  8
 #define FW_HDR_FW_VER_MICRO_M  0xff
+#define FW_HDR_FW_VER_MICRO_V(x) \
+       ((x) << FW_HDR_FW_VER_MICRO_S)
 #define FW_HDR_FW_VER_MICRO_G(x) \
        (((x) >> FW_HDR_FW_VER_MICRO_S) & FW_HDR_FW_VER_MICRO_M)
 
 #define FW_HDR_FW_VER_BUILD_S  0
 #define FW_HDR_FW_VER_BUILD_M  0xff
+#define FW_HDR_FW_VER_BUILD_V(x) \
+       ((x) << FW_HDR_FW_VER_BUILD_S)
 #define FW_HDR_FW_VER_BUILD_G(x) \
        (((x) >> FW_HDR_FW_VER_BUILD_S) & FW_HDR_FW_VER_BUILD_M)
 
@@ -3038,4 +3059,84 @@ enum fw_hdr_flags {
        FW_HDR_FLAGS_RESET_HALT = 0x00000001,
 };
 
+/* length of the formatting string  */
+#define FW_DEVLOG_FMT_LEN      192
+
+/* maximum number of the formatting string parameters */
+#define FW_DEVLOG_FMT_PARAMS_NUM 8
+
+/* priority levels */
+enum fw_devlog_level {
+       FW_DEVLOG_LEVEL_EMERG   = 0x0,
+       FW_DEVLOG_LEVEL_CRIT    = 0x1,
+       FW_DEVLOG_LEVEL_ERR     = 0x2,
+       FW_DEVLOG_LEVEL_NOTICE  = 0x3,
+       FW_DEVLOG_LEVEL_INFO    = 0x4,
+       FW_DEVLOG_LEVEL_DEBUG   = 0x5,
+       FW_DEVLOG_LEVEL_MAX     = 0x5,
+};
+
+/* facilities that may send a log message */
+enum fw_devlog_facility {
+       FW_DEVLOG_FACILITY_CORE         = 0x00,
+       FW_DEVLOG_FACILITY_CF           = 0x01,
+       FW_DEVLOG_FACILITY_SCHED        = 0x02,
+       FW_DEVLOG_FACILITY_TIMER        = 0x04,
+       FW_DEVLOG_FACILITY_RES          = 0x06,
+       FW_DEVLOG_FACILITY_HW           = 0x08,
+       FW_DEVLOG_FACILITY_FLR          = 0x10,
+       FW_DEVLOG_FACILITY_DMAQ         = 0x12,
+       FW_DEVLOG_FACILITY_PHY          = 0x14,
+       FW_DEVLOG_FACILITY_MAC          = 0x16,
+       FW_DEVLOG_FACILITY_PORT         = 0x18,
+       FW_DEVLOG_FACILITY_VI           = 0x1A,
+       FW_DEVLOG_FACILITY_FILTER       = 0x1C,
+       FW_DEVLOG_FACILITY_ACL          = 0x1E,
+       FW_DEVLOG_FACILITY_TM           = 0x20,
+       FW_DEVLOG_FACILITY_QFC          = 0x22,
+       FW_DEVLOG_FACILITY_DCB          = 0x24,
+       FW_DEVLOG_FACILITY_ETH          = 0x26,
+       FW_DEVLOG_FACILITY_OFLD         = 0x28,
+       FW_DEVLOG_FACILITY_RI           = 0x2A,
+       FW_DEVLOG_FACILITY_ISCSI        = 0x2C,
+       FW_DEVLOG_FACILITY_FCOE         = 0x2E,
+       FW_DEVLOG_FACILITY_FOISCSI      = 0x30,
+       FW_DEVLOG_FACILITY_FOFCOE       = 0x32,
+       FW_DEVLOG_FACILITY_MAX          = 0x32,
+};
+
+/* log message format */
+struct fw_devlog_e {
+       __be64  timestamp;
+       __be32  seqno;
+       __be16  reserved1;
+       __u8    level;
+       __u8    facility;
+       __u8    fmt[FW_DEVLOG_FMT_LEN];
+       __be32  params[FW_DEVLOG_FMT_PARAMS_NUM];
+       __be32  reserved3[4];
+};
+
+struct fw_devlog_cmd {
+       __be32 op_to_write;
+       __be32 retval_len16;
+       __u8   level;
+       __u8   r2[7];
+       __be32 memtype_devlog_memaddr16_devlog;
+       __be32 memsize_devlog;
+       __be32 r3[2];
+};
+
+#define FW_DEVLOG_CMD_MEMTYPE_DEVLOG_S         28
+#define FW_DEVLOG_CMD_MEMTYPE_DEVLOG_M         0xf
+#define FW_DEVLOG_CMD_MEMTYPE_DEVLOG_G(x)      \
+       (((x) >> FW_DEVLOG_CMD_MEMTYPE_DEVLOG_S) & \
+        FW_DEVLOG_CMD_MEMTYPE_DEVLOG_M)
+
+#define FW_DEVLOG_CMD_MEMADDR16_DEVLOG_S       0
+#define FW_DEVLOG_CMD_MEMADDR16_DEVLOG_M       0xfffffff
+#define FW_DEVLOG_CMD_MEMADDR16_DEVLOG_G(x)    \
+       (((x) >> FW_DEVLOG_CMD_MEMADDR16_DEVLOG_S) & \
+        FW_DEVLOG_CMD_MEMADDR16_DEVLOG_M)
+
 #endif /* _T4FW_INTERFACE_H_ */