Merge tag 'sunxi-fixes-for-4.3' of https://git.kernel.org/pub/scm/linux/kernel/git...

[linux-drm-fsl-dcu.git] / drivers / clk / st / clkgen-pll.c

diff --git a/drivers/clk/st/clkgen-pll.c b/drivers/clk/st/clkgen-pll.c
index 47a38a994cac7a29113c086cb928e7957180e1fd..b2a332cf8985706574f89acc4d46d8fe17f2166c 100644 (file)
--- a/drivers/clk/st/clkgen-pll.c
+++ b/drivers/clk/st/clkgen-pll.c
@@ -193,7 +193,7 @@ static const struct clkgen_pll_data st_pll3200c32_407_a0 = {
        .ops            = &stm_pll3200c32_ops,
 };
 
-static const struct clkgen_pll_data st_pll3200c32_407_c0_0 = {
+static const struct clkgen_pll_data st_pll3200c32_cx_0 = {
        /* 407 C0 PLL0 */
        .pdn_status     = CLKGEN_FIELD(0x2a0,   0x1,                    8),
        .locked_status  = CLKGEN_FIELD(0x2a0,   0x1,                    24),
@@ -205,7 +205,7 @@ static const struct clkgen_pll_data st_pll3200c32_407_c0_0 = {
        .ops            = &stm_pll3200c32_ops,
 };
 
-static const struct clkgen_pll_data st_pll3200c32_407_c0_1 = {
+static const struct clkgen_pll_data st_pll3200c32_cx_1 = {
        /* 407 C0 PLL1 */
        .pdn_status     = CLKGEN_FIELD(0x2c8,   0x1,                    8),
        .locked_status  = CLKGEN_FIELD(0x2c8,   0x1,                    24),
@@ -624,12 +624,12 @@ static const struct of_device_id c32_pll_of_match[] = {
                .data = &st_pll3200c32_407_a0,
        },
        {
-               .compatible = "st,stih407-plls-c32-c0_0",
-               .data = &st_pll3200c32_407_c0_0,
+               .compatible = "st,plls-c32-cx_0",
+               .data = &st_pll3200c32_cx_0,
        },
        {
-               .compatible = "st,stih407-plls-c32-c0_1",
-               .data = &st_pll3200c32_407_c0_1,
+               .compatible = "st,plls-c32-cx_1",
+               .data = &st_pll3200c32_cx_1,
        },
        {
                .compatible = "st,stih407-plls-c32-a9",