Merge master.kernel.org:/pub/scm/linux/kernel/git/herbert/crypto-2.6

[linux-drm-fsl-dcu.git] / arch / sh / kernel / cpu / sh4 / probe.c

diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index 9d28c88d2f9de65f829c8cf96208c5ac0705067d..8cd04904c77a02c9fc6dfff2f28756fc8ca8f282 100644 (file)
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -124,6 +124,14 @@ int __init detect_cpu_and_cache_system(void)
                current_cpu_data.dcache.ways = 4;
                current_cpu_data.flags |= CPU_HAS_LLSC;
                break;
+       case 0x3004:
+       case 0x3007:
+               current_cpu_data.type = CPU_SH7785;
+               current_cpu_data.icache.ways = 4;
+               current_cpu_data.dcache.ways = 4;
+               current_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER |
+                                         CPU_HAS_LLSC;
+               break;
        case 0x3008:
                if (prr == 0xa0) {
                        current_cpu_data.type = CPU_SH7722;
@@ -195,13 +203,6 @@ int __init detect_cpu_and_cache_system(void)
 
        }
 
-       /* Setup the rest of the I-cache info */
-       current_cpu_data.icache.entry_mask = current_cpu_data.icache.way_incr -
-                                     current_cpu_data.icache.linesz;
-
-       current_cpu_data.icache.way_size = current_cpu_data.icache.sets *
-                                   current_cpu_data.icache.linesz;
-
        /* And the rest of the D-cache */
        if (current_cpu_data.dcache.ways > 1) {
                size = sizes[(cvr >> 16) & 0xf];
@@ -209,12 +210,6 @@ int __init detect_cpu_and_cache_system(void)
                current_cpu_data.dcache.sets            = (size >> 6);
        }
 
-       current_cpu_data.dcache.entry_mask = current_cpu_data.dcache.way_incr -
-                                     current_cpu_data.dcache.linesz;
-
-       current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets *
-                                   current_cpu_data.dcache.linesz;
-
        /*
         * Setup the L2 cache desc
         *