static void dart_flush(struct iommu_table *tbl)
{
+ mb();
if (dart_dirty) {
dart_tlb_invalidate_all();
dart_dirty = 0;
DBG("dart: build at: %lx, %lx, addr: %x\n", index, npages, uaddr);
- index <<= DART_PAGE_FACTOR;
- npages <<= DART_PAGE_FACTOR;
-
dp = ((unsigned int*)tbl->it_base) + index;
/* On U3, all memory is contigous, so we can move this
uaddr += DART_PAGE_SIZE;
}
+ /* make sure all updates have reached memory */
+ mb();
+ in_be32((unsigned __iomem *)dp);
+ mb();
+
if (dart_is_u4) {
rpn = index;
- mb(); /* make sure all updates have reached memory */
while (npages--)
dart_tlb_invalidate_one(rpn++);
} else {
DBG("dart: free at: %lx, %lx\n", index, npages);
- index <<= DART_PAGE_FACTOR;
- npages <<= DART_PAGE_FACTOR;
-
dp = ((unsigned int *)tbl->it_base) + index;
while (npages--)
iommu_table_dart.it_busno = 0;
iommu_table_dart.it_offset = 0;
/* it_size is in number of entries */
- iommu_table_dart.it_size = (dart_tablesize / sizeof(u32)) >> DART_PAGE_FACTOR;
+ iommu_table_dart.it_size = dart_tablesize / sizeof(u32);
/* Initialize the common IOMMU code */
iommu_table_dart.it_base = (unsigned long)dart_vbase;