MIPS: Whitespace cleanup.

[linux-drm-fsl-dcu.git] / arch / mips / txx9 / generic / smsc_fdc37m81x.c

diff --git a/arch/mips/txx9/generic/smsc_fdc37m81x.c b/arch/mips/txx9/generic/smsc_fdc37m81x.c
index 8ebc3848f3ac86e2b194b745aabe5a1099a40105..f98baa6263d244253d69916644dda4051df10a1b 100644 (file)
--- a/arch/mips/txx9/generic/smsc_fdc37m81x.c
+++ b/arch/mips/txx9/generic/smsc_fdc37m81x.c
@@ -18,40 +18,40 @@
 /* Common Registers */
 #define SMSC_FDC37M81X_CONFIG_INDEX  0x00
 #define SMSC_FDC37M81X_CONFIG_DATA   0x01
-#define SMSC_FDC37M81X_CONF          0x02
-#define SMSC_FDC37M81X_INDEX         0x03
-#define SMSC_FDC37M81X_DNUM          0x07
-#define SMSC_FDC37M81X_DID           0x20
-#define SMSC_FDC37M81X_DREV          0x21
-#define SMSC_FDC37M81X_PCNT          0x22
-#define SMSC_FDC37M81X_PMGT          0x23
-#define SMSC_FDC37M81X_OSC           0x24
-#define SMSC_FDC37M81X_CONFPA0       0x26
-#define SMSC_FDC37M81X_CONFPA1       0x27
-#define SMSC_FDC37M81X_TEST4         0x2B
-#define SMSC_FDC37M81X_TEST5         0x2C
-#define SMSC_FDC37M81X_TEST1         0x2D
-#define SMSC_FDC37M81X_TEST2         0x2E
-#define SMSC_FDC37M81X_TEST3         0x2F
+#define SMSC_FDC37M81X_CONF         0x02
+#define SMSC_FDC37M81X_INDEX        0x03
+#define SMSC_FDC37M81X_DNUM         0x07
+#define SMSC_FDC37M81X_DID          0x20
+#define SMSC_FDC37M81X_DREV         0x21
+#define SMSC_FDC37M81X_PCNT         0x22
+#define SMSC_FDC37M81X_PMGT         0x23
+#define SMSC_FDC37M81X_OSC          0x24
+#define SMSC_FDC37M81X_CONFPA0      0x26
+#define SMSC_FDC37M81X_CONFPA1      0x27
+#define SMSC_FDC37M81X_TEST4        0x2B
+#define SMSC_FDC37M81X_TEST5        0x2C
+#define SMSC_FDC37M81X_TEST1        0x2D
+#define SMSC_FDC37M81X_TEST2        0x2E
+#define SMSC_FDC37M81X_TEST3        0x2F
 
 /* Logical device numbers */
-#define SMSC_FDC37M81X_FDD           0x00
-#define SMSC_FDC37M81X_SERIAL1       0x04
-#define SMSC_FDC37M81X_SERIAL2       0x05
-#define SMSC_FDC37M81X_KBD           0x07
+#define SMSC_FDC37M81X_FDD          0x00
+#define SMSC_FDC37M81X_SERIAL1      0x04
+#define SMSC_FDC37M81X_SERIAL2      0x05
+#define SMSC_FDC37M81X_KBD          0x07
 
 /* Logical device Config Registers */
-#define SMSC_FDC37M81X_ACTIVE        0x30
+#define SMSC_FDC37M81X_ACTIVE       0x30
 #define SMSC_FDC37M81X_BASEADDR0     0x60
 #define SMSC_FDC37M81X_BASEADDR1     0x61
-#define SMSC_FDC37M81X_INT           0x70
-#define SMSC_FDC37M81X_INT2          0x72
-#define SMSC_FDC37M81X_MODE          0xF0
+#define SMSC_FDC37M81X_INT          0x70
+#define SMSC_FDC37M81X_INT2         0x72
+#define SMSC_FDC37M81X_MODE         0xF0
 
 /* Chip Config Values */
 #define SMSC_FDC37M81X_CONFIG_ENTER  0x55
 #define SMSC_FDC37M81X_CONFIG_EXIT   0xaa
-#define SMSC_FDC37M81X_CHIP_ID       0x4d
+#define SMSC_FDC37M81X_CHIP_ID      0x4d
 
 static unsigned long g_smsc_fdc37m81x_base;