static void arm_tb(void)
{
- u64 scdperfcnt;
+ u64 scdperfcnt;
u64 next = (1ULL << 40) - tb_period;
u64 tb_options = M_SCD_TRACE_CFG_FREEZE_FULL;
/*
* Requires: Already called zclk_timer_init with a value that won't
- * saturate 40 bits. No subsequent use of SCD performance counters
- * or trace buffer.
+ * saturate 40 bits. No subsequent use of SCD performance counters
+ * or trace buffer.
*/
static int sbprof_zbprof_start(struct file *filp)
/*
* We grab this interrupt to prevent others from trying to use
- * it, even though we don't want to service the interrupts
- * (they only feed into the trace-on-interrupt mechanism)
+ * it, even though we don't want to service the interrupts
+ * (they only feed into the trace-on-interrupt mechanism)
*/
if (request_irq(K_INT_PERF_CNT, sbprof_pc_intr, 0, DEVNAME " scd perfcnt", &sbp)) {
free_irq(K_INT_TRACE_FREEZE, &sbp);
/*
* I need the core to mask these, but the interrupt mapper to
- * pass them through. I am exploiting my knowledge that
+ * pass them through. I am exploiting my knowledge that
* cp0_status masks out IP[5]. krw
*/
#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
__raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_3));
/* Initialize Trace Event 0-7 */
- /* when interrupt */
+ /* when interrupt */
__raw_writeq(M_SCD_TREVT_INTERRUPT, IOADDR(A_SCD_TRACE_EVENT_0));
__raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_1));
__raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_2));
return err;
}
pr_debug(DEVNAME ": read from sample %d, %d bytes\n",
- cur_sample, cur_count);
+ cur_sample, cur_count);
size -= cur_count;
sample_left -= cur_count;
if (!sample_left) {
.open = sbprof_tb_open,
.release = sbprof_tb_release,
.read = sbprof_tb_read,
- .unlocked_ioctl = sbprof_tb_ioctl,
+ .unlocked_ioctl = sbprof_tb_ioctl,
.compat_ioctl = sbprof_tb_ioctl,
.mmap = NULL,
.llseek = default_llseek,