Merge ../linux-2.6-watchdog-mm

[linux-drm-fsl-dcu.git] / arch / mips / sgi-ip32 / ip32-irq.c

diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c
index 8ba08047d164222b31bf6315b66fb51603d3a93a..c9acadd0846b8e513522d4d3da045bb76106751c 100644 (file)
--- a/arch/mips/sgi-ip32/ip32-irq.c
+++ b/arch/mips/sgi-ip32/ip32-irq.c
@@ -120,14 +120,12 @@ static void inline flush_mace_bus(void)
 static DEFINE_SPINLOCK(ip32_irq_lock);
 
 /* Some initial interrupts to set up */
-extern irqreturn_t crime_memerr_intr (int irq, void *dev_id,
-                                     struct pt_regs *regs);
-extern irqreturn_t crime_cpuerr_intr (int irq, void *dev_id,
-                                     struct pt_regs *regs);
+extern irqreturn_t crime_memerr_intr(int irq, void *dev_id);
+extern irqreturn_t crime_cpuerr_intr(int irq, void *dev_id);
 
-struct irqaction memerr_irq = { crime_memerr_intr, SA_INTERRUPT,
+struct irqaction memerr_irq = { crime_memerr_intr, IRQF_DISABLED,
                        CPU_MASK_NONE, "CRIME memory error", NULL, NULL };
-struct irqaction cpuerr_irq = { crime_cpuerr_intr, SA_INTERRUPT,
+struct irqaction cpuerr_irq = { crime_cpuerr_intr, IRQF_DISABLED,
                        CPU_MASK_NONE, "CRIME CPU error", NULL, NULL };
 
 /*
@@ -160,7 +158,7 @@ static void end_cpu_irq(unsigned int irq)
 #define shutdown_cpu_irq disable_cpu_irq
 #define mask_and_ack_cpu_irq disable_cpu_irq
 
-static struct hw_interrupt_type ip32_cpu_interrupt = {
+static struct irq_chip ip32_cpu_interrupt = {
        .typename = "IP32 CPU",
        .startup = startup_cpu_irq,
        .shutdown = shutdown_cpu_irq,
@@ -230,7 +228,7 @@ static void end_crime_irq(unsigned int irq)
 
 #define shutdown_crime_irq disable_crime_irq
 
-static struct hw_interrupt_type ip32_crime_interrupt = {
+static struct irq_chip ip32_crime_interrupt = {
        .typename = "IP32 CRIME",
        .startup = startup_crime_irq,
        .shutdown = shutdown_crime_irq,
@@ -289,7 +287,7 @@ static void end_macepci_irq(unsigned int irq)
 #define shutdown_macepci_irq disable_macepci_irq
 #define mask_and_ack_macepci_irq disable_macepci_irq
 
-static struct hw_interrupt_type ip32_macepci_interrupt = {
+static struct irq_chip ip32_macepci_interrupt = {
        .typename = "IP32 MACE PCI",
        .startup = startup_macepci_irq,
        .shutdown = shutdown_macepci_irq,
@@ -419,7 +417,7 @@ static void end_maceisa_irq(unsigned irq)
 
 #define shutdown_maceisa_irq disable_maceisa_irq
 
-static struct hw_interrupt_type ip32_maceisa_interrupt = {
+static struct irq_chip ip32_maceisa_interrupt = {
        .typename = "IP32 MACE ISA",
        .startup = startup_maceisa_irq,
        .shutdown = shutdown_maceisa_irq,
@@ -469,7 +467,7 @@ static void end_mace_irq(unsigned int irq)
 #define shutdown_mace_irq disable_mace_irq
 #define mask_and_ack_mace_irq disable_mace_irq
 
-static struct hw_interrupt_type ip32_mace_interrupt = {
+static struct irq_chip ip32_mace_interrupt = {
        .typename = "IP32 MACE",
        .startup = startup_mace_irq,
        .shutdown = shutdown_mace_irq,
@@ -479,7 +477,7 @@ static struct hw_interrupt_type ip32_mace_interrupt = {
        .end = end_mace_irq,
 };
 
-static void ip32_unknown_interrupt(struct pt_regs *regs)
+static void ip32_unknown_interrupt(void)
 {
        printk ("Unknown interrupt occurred!\n");
        printk ("cp0_status: %08x\n", read_c0_status());
@@ -492,7 +490,7 @@ static void ip32_unknown_interrupt(struct pt_regs *regs)
        printk ("MACE PCI control register: %08x\n", mace->pci.control);
 
        printk("Register dump:\n");
-       show_regs(regs);
+       show_regs(get_irq_regs());
 
        printk("Please mail this report to linux-mips@linux-mips.org\n");
        printk("Spinning...");
@@ -501,7 +499,7 @@ static void ip32_unknown_interrupt(struct pt_regs *regs)
 
 /* CRIME 1.1 appears to deliver all interrupts to this one pin. */
 /* change this to loop over all edge-triggered irqs, exception masked out ones */
-static void ip32_irq0(struct pt_regs *regs)
+static void ip32_irq0(void)
 {
        uint64_t crime_int;
        int irq = 0;
@@ -516,50 +514,50 @@ static void ip32_irq0(struct pt_regs *regs)
        }
        irq++;
        DBG("*irq %u*\n", irq);
-       do_IRQ(irq, regs);
+       do_IRQ(irq);
 }
 
-static void ip32_irq1(struct pt_regs *regs)
+static void ip32_irq1(void)
 {
-       ip32_unknown_interrupt(regs);
+       ip32_unknown_interrupt();
 }
 
-static void ip32_irq2(struct pt_regs *regs)
+static void ip32_irq2(void)
 {
-       ip32_unknown_interrupt(regs);
+       ip32_unknown_interrupt();
 }
 
-static void ip32_irq3(struct pt_regs *regs)
+static void ip32_irq3(void)
 {
-       ip32_unknown_interrupt(regs);
+       ip32_unknown_interrupt();
 }
 
-static void ip32_irq4(struct pt_regs *regs)
+static void ip32_irq4(void)
 {
-       ip32_unknown_interrupt(regs);
+       ip32_unknown_interrupt();
 }
 
-static void ip32_irq5(struct pt_regs *regs)
+static void ip32_irq5(void)
 {
-       ll_timer_interrupt(IP32_R4K_TIMER_IRQ, regs);
+       ll_timer_interrupt(IP32_R4K_TIMER_IRQ);
 }
 
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
 {
        unsigned int pending = read_c0_cause();
 
        if (likely(pending & IE_IRQ0))
-               ip32_irq0(regs);
+               ip32_irq0();
        else if (unlikely(pending & IE_IRQ1))
-               ip32_irq1(regs);
+               ip32_irq1();
        else if (unlikely(pending & IE_IRQ2))
-               ip32_irq2(regs);
+               ip32_irq2();
        else if (unlikely(pending & IE_IRQ3))
-               ip32_irq3(regs);
+               ip32_irq3();
        else if (unlikely(pending & IE_IRQ4))
-               ip32_irq4(regs);
+               ip32_irq4();
        else if (likely(pending & IE_IRQ5))
-               ip32_irq5(regs);
+               ip32_irq5();
 }
 
 void __init arch_init_irq(void)
@@ -575,7 +573,7 @@ void __init arch_init_irq(void)
        mace->perif.ctrl.imask = 0;
 
        for (irq = 0; irq <= IP32_IRQ_MAX; irq++) {
-               hw_irq_controller *controller;
+               struct irq_chip *controller;
 
                if (irq == IP32_R4K_TIMER_IRQ)
                        controller = &ip32_cpu_interrupt;
@@ -591,7 +589,7 @@ void __init arch_init_irq(void)
                irq_desc[irq].status = IRQ_DISABLED;
                irq_desc[irq].action = 0;
                irq_desc[irq].depth = 0;
-               irq_desc[irq].handler = controller;
+               irq_desc[irq].chip = controller;
        }
        setup_irq(CRIME_MEMERR_IRQ, &memerr_irq);
        setup_irq(CRIME_CPUERR_IRQ, &cpuerr_irq);