MIPS: Add option to disable software I/O coherency.

[linux-drm-fsl-dcu.git] / arch / mips / mti-sead3 / sead3-setup.c

diff --git a/arch/mips/mti-sead3/sead3-setup.c b/arch/mips/mti-sead3/sead3-setup.c
index f012fd164ceedc9e2aed9a94ebb30cc2bdc602c2..14633bc8004915796953555fa2bce76d0f8e7ba2 100644 (file)
--- a/arch/mips/mti-sead3/sead3-setup.c
+++ b/arch/mips/mti-sead3/sead3-setup.c
@@ -13,9 +13,6 @@
 #include <asm/mips-boards/generic.h>
 #include <asm/prom.h>
 
-int coherentio;                /* 0 => no DMA cache coherency (may be set by user) */
-int hw_coherentio;     /* 0 => no HW DMA cache coherency (reflects real HW) */
-
 const char *get_system_type(void)
 {
        return "MIPS SEAD3";