MIPS: math-emu: Add support for the MIPS R6 SELNEZ FPU instruction

[linux-drm-fsl-dcu.git] / arch / mips / math-emu / cp1emu.c

diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index ef41fc895e75ae7dad4fc33356f2cc23443b9db7..8978d52adf0e7a97dbbfc10c961d6e0b86648f63 100644 (file)
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -1743,6 +1743,28 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
                        SPFROMREG(rv.s, MIPSInst_FS(ir));
                        break;
 
+               case fseleqz_op:
+                       if (!cpu_has_mips_r6)
+                               return SIGILL;
+
+                       SPFROMREG(rv.s, MIPSInst_FT(ir));
+                       if (rv.w & 0x1)
+                               rv.w = 0;
+                       else
+                               SPFROMREG(rv.s, MIPSInst_FS(ir));
+                       break;
+
+               case fselnez_op:
+                       if (!cpu_has_mips_r6)
+                               return SIGILL;
+
+                       SPFROMREG(rv.s, MIPSInst_FT(ir));
+                       if (rv.w & 0x1)
+                               SPFROMREG(rv.s, MIPSInst_FS(ir));
+                       else
+                               rv.w = 0;
+                       break;
+
                case fabs_op:
                        handler.u = ieee754sp_abs;
                        goto scopuop;
@@ -1940,6 +1962,29 @@ copcsr:
                                return 0;
                        DPFROMREG(rv.d, MIPSInst_FS(ir));
                        break;
+
+               case fseleqz_op:
+                       if (!cpu_has_mips_r6)
+                               return SIGILL;
+
+                       DPFROMREG(rv.d, MIPSInst_FT(ir));
+                       if (rv.l & 0x1)
+                               rv.l = 0;
+                       else
+                               DPFROMREG(rv.d, MIPSInst_FS(ir));
+                       break;
+
+               case fselnez_op:
+                       if (!cpu_has_mips_r6)
+                               return SIGILL;
+
+                       DPFROMREG(rv.d, MIPSInst_FT(ir));
+                       if (rv.l & 0x1)
+                               DPFROMREG(rv.d, MIPSInst_FS(ir));
+                       else
+                               rv.l = 0;
+                       break;
+
                case fabs_op:
                        handler.u = ieee754dp_abs;
                        goto dcopuop;