Merge ../linus

[linux-drm-fsl-dcu.git] / arch / mips / kernel / ptrace32.c

diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
index 8704dc0496ea7f2427b4fd111dbbb54397955b0f..d9a39c1694505c61370c610079514af27825a11d 100644 (file)
--- a/arch/mips/kernel/ptrace32.c
+++ b/arch/mips/kernel/ptrace32.c
@@ -166,10 +166,7 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
                        tmp = regs->lo;
                        break;
                case FPC_CSR:
-                       if (cpu_has_fpu)
-                               tmp = child->thread.fpu.hard.fcr31;
-                       else
-                               tmp = child->thread.fpu.soft.fcr31;
+                       tmp = child->thread.fpu.fcr31;
                        break;
                case FPC_EIR: { /* implementation / version register */
                        unsigned int flags;
@@ -178,7 +175,9 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
                        unsigned int mtflags;
 #endif /* CONFIG_MIPS_MT_SMTC */
 
+                       preempt_disable();
                        if (!cpu_has_fpu) {
+                               preempt_enable();
                                tmp = 0;
                                break;
                        }
@@ -189,7 +188,6 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
                        mtflags = dmt();
 #endif /* CONFIG_MIPS_MT_SMTC */
 
-                       preempt_disable();
                        if (cpu_has_mipsmt) {
                                unsigned int vpflags = dvpe();
                                flags = read_c0_status();
@@ -288,9 +286,9 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
 
                        if (!tsk_used_math(child)) {
                                /* FP not yet used  */
-                               memset(&child->thread.fpu.hard, ~0,
-                                      sizeof(child->thread.fpu.hard));
-                               child->thread.fpu.hard.fcr31 = 0;
+                               memset(&child->thread.fpu, ~0,
+                                      sizeof(child->thread.fpu));
+                               child->thread.fpu.fcr31 = 0;
                        }
                        /*
                         * The odd registers are actually the high order bits
@@ -318,10 +316,7 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data)
                        regs->lo = data;
                        break;
                case FPC_CSR:
-                       if (cpu_has_fpu)
-                               child->thread.fpu.hard.fcr31 = data;
-                       else
-                               child->thread.fpu.soft.fcr31 = data;
+                       child->thread.fpu.fcr31 = data;
                        break;
                case DSP_BASE ... DSP_BASE + 5: {
                        dspreg_t *dregs;