Pull video into test branch
[linux-drm-fsl-dcu.git] / arch / mips / kernel / irq-mv6434x.c
index 37d106202b83a7695cb0614013693bb57d5a2bbd..efbd219845b573fbe9d3097f1b69383a7dc8ac13 100644 (file)
@@ -66,48 +66,6 @@ static inline void unmask_mv64340_irq(unsigned int irq)
        }
 }
 
-/*
- * Enables the IRQ on Marvell Chip
- */
-static void enable_mv64340_irq(unsigned int irq)
-{
-       unmask_mv64340_irq(irq);
-}
-
-/*
- * Initialize the IRQ on Marvell Chip
- */
-static unsigned int startup_mv64340_irq(unsigned int irq)
-{
-       unmask_mv64340_irq(irq);
-       return 0;
-}
-
-/*
- * Disables the IRQ on Marvell Chip
- */
-static void disable_mv64340_irq(unsigned int irq)
-{
-       mask_mv64340_irq(irq);
-}
-
-/*
- * Masks and ACKs an IRQ
- */
-static void mask_and_ack_mv64340_irq(unsigned int irq)
-{
-       mask_mv64340_irq(irq);
-}
-
-/*
- * End IRQ processing
- */
-static void end_mv64340_irq(unsigned int irq)
-{
-       if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
-               unmask_mv64340_irq(irq);
-}
-
 /*
  * Interrupt handler for interrupts coming from the Marvell chip.
  * It could be built in ethernet ports etc...
@@ -133,29 +91,21 @@ void ll_mv64340_irq(void)
                do_IRQ(ls1bit32(irq_src_high) + irq_base + 32);
 }
 
-#define shutdown_mv64340_irq   disable_mv64340_irq
-
 struct irq_chip mv64340_irq_type = {
        .typename = "MV-64340",
-       .startup = startup_mv64340_irq,
-       .shutdown = shutdown_mv64340_irq,
-       .enable = enable_mv64340_irq,
-       .disable = disable_mv64340_irq,
-       .ack = mask_and_ack_mv64340_irq,
-       .end = end_mv64340_irq,
+       .ack = mask_mv64340_irq,
+       .mask = mask_mv64340_irq,
+       .mask_ack = mask_mv64340_irq,
+       .unmask = unmask_mv64340_irq,
 };
 
 void __init mv64340_irq_init(unsigned int base)
 {
        int i;
 
-       /* Reset irq handlers pointers to NULL */
-       for (i = base; i < base + 64; i++) {
-               irq_desc[i].status = IRQ_DISABLED;
-               irq_desc[i].action = 0;
-               irq_desc[i].depth = 2;
-               irq_desc[i].chip = &mv64340_irq_type;
-       }
+       for (i = base; i < base + 64; i++)
+               set_irq_chip_and_handler(i, &mv64340_irq_type,
+                                        handle_level_irq);
 
        irq_base = base;
 }