Pull button into test branch

[linux-drm-fsl-dcu.git] / arch / mips / emma2rh / common / irq_emma2rh.c

diff --git a/arch/mips/emma2rh/common/irq_emma2rh.c b/arch/mips/emma2rh/common/irq_emma2rh.c
index 197ed4c2ba04d774dff5b10b3e89571c418680c6..8d880f0b06ec1f1a0241ab5bfdd1d1fbfa70bb10 100644 (file)
--- a/arch/mips/emma2rh/common/irq_emma2rh.c
+++ b/arch/mips/emma2rh/common/irq_emma2rh.c
@@ -56,49 +56,21 @@ static void emma2rh_irq_disable(unsigned int irq)
        ll_emma2rh_irq_disable(irq - emma2rh_irq_base);
 }
 
-static unsigned int emma2rh_irq_startup(unsigned int irq)
-{
-       emma2rh_irq_enable(irq);
-       return 0;
-}
-
-#define        emma2rh_irq_shutdown    emma2rh_irq_disable
-
-static void emma2rh_irq_ack(unsigned int irq)
-{
-       /* disable interrupt - some handler will re-enable the irq
-        * and if the interrupt is leveled, we will have infinite loop
-        */
-       ll_emma2rh_irq_disable(irq - emma2rh_irq_base);
-}
-
-static void emma2rh_irq_end(unsigned int irq)
-{
-       if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
-               ll_emma2rh_irq_enable(irq - emma2rh_irq_base);
-}
-
 struct irq_chip emma2rh_irq_controller = {
        .typename = "emma2rh_irq",
-       .startup = emma2rh_irq_startup,
-       .shutdown = emma2rh_irq_shutdown,
-       .enable = emma2rh_irq_enable,
-       .disable = emma2rh_irq_disable,
-       .ack = emma2rh_irq_ack,
-       .end = emma2rh_irq_end,
-       .set_affinity = NULL    /* no affinity stuff for UP */
+       .ack = emma2rh_irq_disable,
+       .mask = emma2rh_irq_disable,
+       .mask_ack = emma2rh_irq_disable,
+       .unmask = emma2rh_irq_enable,
 };
 
 void emma2rh_irq_init(u32 irq_base)
 {
        u32 i;
 
-       for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ; i++) {
-               irq_desc[i].status = IRQ_DISABLED;
-               irq_desc[i].action = NULL;
-               irq_desc[i].depth = 1;
-               irq_desc[i].chip = &emma2rh_irq_controller;
-       }
+       for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ; i++)
+               set_irq_chip_and_handler(i, &emma2rh_irq_controller,
+                                        handle_level_irq);
 
        emma2rh_irq_base = irq_base;
 }