MIPS: ATH79: Add irq chip ar7240-misc-intc
[linux-drm-fsl-dcu.git] / arch / mips / ath79 / irq.c
index 2021be20d9d940513baf267a7d20a5cedfca8bd2..eeb3953ed8ac8d8051ccbe3df9af8270915329b3 100644 (file)
@@ -26,7 +26,7 @@
 #include "common.h"
 #include "machtypes.h"
 
-static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc)
+static void ath79_misc_irq_handler(struct irq_desc *desc)
 {
        void __iomem *base = ath79_reset_base;
        u32 pending;
@@ -119,12 +119,10 @@ static void __init ath79_misc_irq_init(void)
        irq_set_chained_handler(ATH79_CPU_IRQ(6), ath79_misc_irq_handler);
 }
 
-static void ar934x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc)
+static void ar934x_ip2_irq_dispatch(struct irq_desc *desc)
 {
        u32 status;
 
-       disable_irq_nosync(irq);
-
        status = ath79_reset_rr(AR934X_RESET_REG_PCIE_WMAC_INT_STATUS);
 
        if (status & AR934X_PCIE_WMAC_INT_PCIE_ALL) {
@@ -136,8 +134,6 @@ static void ar934x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc)
        } else {
                spurious_interrupt();
        }
-
-       enable_irq(irq);
 }
 
 static void ar934x_ip2_irq_init(void)
@@ -152,18 +148,16 @@ static void ar934x_ip2_irq_init(void)
        irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch);
 }
 
-static void qca955x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc)
+static void qca955x_ip2_irq_dispatch(struct irq_desc *desc)
 {
        u32 status;
 
-       disable_irq_nosync(irq);
-
        status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS);
        status &= QCA955X_EXT_INT_PCIE_RC1_ALL | QCA955X_EXT_INT_WMAC_ALL;
 
        if (status == 0) {
                spurious_interrupt();
-               goto enable;
+               return;
        }
 
        if (status & QCA955X_EXT_INT_PCIE_RC1_ALL) {
@@ -175,17 +169,12 @@ static void qca955x_ip2_irq_dispatch(unsigned int irq, struct irq_desc *desc)
                /* TODO: flush DDR? */
                generic_handle_irq(ATH79_IP2_IRQ(1));
        }
-
-enable:
-       enable_irq(irq);
 }
 
-static void qca955x_ip3_irq_dispatch(unsigned int irq, struct irq_desc *desc)
+static void qca955x_ip3_irq_dispatch(struct irq_desc *desc)
 {
        u32 status;
 
-       disable_irq_nosync(irq);
-
        status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS);
        status &= QCA955X_EXT_INT_PCIE_RC2_ALL |
                  QCA955X_EXT_INT_USB1 |
@@ -193,7 +182,7 @@ static void qca955x_ip3_irq_dispatch(unsigned int irq, struct irq_desc *desc)
 
        if (status == 0) {
                spurious_interrupt();
-               goto enable;
+               return;
        }
 
        if (status & QCA955X_EXT_INT_USB1) {
@@ -210,9 +199,6 @@ static void qca955x_ip3_irq_dispatch(unsigned int irq, struct irq_desc *desc)
                /* TODO: flush DDR? */
                generic_handle_irq(ATH79_IP3_IRQ(2));
        }
-
-enable:
-       enable_irq(irq);
 }
 
 static void qca955x_irq_init(void)
@@ -307,8 +293,26 @@ static int __init ath79_misc_intc_of_init(
 
        return 0;
 }
-IRQCHIP_DECLARE(ath79_misc_intc, "qca,ar7100-misc-intc",
-               ath79_misc_intc_of_init);
+
+static int __init ar7100_misc_intc_of_init(
+       struct device_node *node, struct device_node *parent)
+{
+       ath79_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask;
+       return ath79_misc_intc_of_init(node, parent);
+}
+
+IRQCHIP_DECLARE(ar7100_misc_intc, "qca,ar7100-misc-intc",
+               ar7100_misc_intc_of_init);
+
+static int __init ar7240_misc_intc_of_init(
+       struct device_node *node, struct device_node *parent)
+{
+       ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
+       return ath79_misc_intc_of_init(node, parent);
+}
+
+IRQCHIP_DECLARE(ar7240_misc_intc, "qca,ar7240-misc-intc",
+               ar7240_misc_intc_of_init);
 
 static int __init ar79_cpu_intc_of_init(
        struct device_node *node, struct device_node *parent)