Merge ../linus

[linux-drm-fsl-dcu.git] / arch / arm / mm / proc-arm1022.S

diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S
index b0ccff4fadd2559912e5edf50483369726f7fd3a..d2a7c1b9cab928255d2d74bb8be005dbd93296fa 100644 (file)
--- a/arch/arm/mm/proc-arm1022.S
+++ b/arch/arm/mm/proc-arm1022.S
@@ -15,15 +15,16 @@
  * functions on the ARM1022E.
  */
 #include <linux/linkage.h>
-#include <linux/config.h>
 #include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
+#include <asm/elf.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
 #include <asm/ptrace.h>
 
+#include "proc-macros.S"
+
 /*
  * This is the maximum size of an area which will be invalidated
  * using the single invalidate entry instructions.  Anything larger
@@ -404,11 +405,11 @@ __arm1022_setup:
 #ifdef CONFIG_MMU
        mcr     p15, 0, r0, c8, c7              @ invalidate I,D TLBs on v4
 #endif
+       adr     r5, arm1022_crval
+       ldmia   r5, {r5, r6}
        mrc     p15, 0, r0, c1, c0              @ get control register v4
-       ldr     r5, arm1022_cr1_clear
        bic     r0, r0, r5
-       ldr     r5, arm1022_cr1_set
-       orr     r0, r0, r5
+       orr     r0, r0, r6
 #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
        orr     r0, r0, #0x4000                 @ .R..............
 #endif
@@ -421,12 +422,9 @@ __arm1022_setup:
         * .011 1001 ..11 0101
         * 
         */
-       .type   arm1022_cr1_clear, #object
-       .type   arm1022_cr1_set, #object
-arm1022_cr1_clear:
-       .word   0x7f3f
-arm1022_cr1_set:
-       .word   0x3935
+       .type   arm1022_crval, #object
+arm1022_crval:
+       crval   clear=0x00007f3f, mmuset=0x00003935, ucset=0x00001930
 
        __INITDATA
 
@@ -460,25 +458,7 @@ cpu_elf_name:
 
        .type   cpu_arm1022_name, #object
 cpu_arm1022_name:
-       .ascii  "arm1022"
-#ifndef CONFIG_CPU_ICACHE_DISABLE
-       .ascii  "i"
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
-       .ascii  "d"
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
-       .ascii  "(wt)"
-#else
-       .ascii  "(wb)"
-#endif
-#endif
-#ifndef CONFIG_CPU_BPREDICT_DISABLE
-       .ascii  "B"
-#endif
-#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
-       .ascii  "RR"
-#endif
-       .ascii  "\0"
+       .asciz  "ARM1022"
        .size   cpu_arm1022_name, . - cpu_arm1022_name
 
        .align
@@ -489,6 +469,10 @@ cpu_arm1022_name:
 __arm1022_proc_info:
        .long   0x4105a220                      @ ARM 1022E (v5TE)
        .long   0xff0ffff0
+       .long   PMD_TYPE_SECT | \
+               PMD_BIT4 | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        .long   PMD_TYPE_SECT | \
                PMD_BIT4 | \
                PMD_SECT_AP_WRITE | \