Merge ../linus

[linux-drm-fsl-dcu.git] / arch / arm / mach-s3c2410 / gpio.c

diff --git a/arch/arm/mach-s3c2410/gpio.c b/arch/arm/mach-s3c2410/gpio.c
index 23ea3d5fa09c1be9bcc9084c1c8203b72b7c80c4..ba346546150b6b1cbb86ee2588ad15e6eaa0a726 100644 (file)
--- a/arch/arm/mach-s3c2410/gpio.c
+++ b/arch/arm/mach-s3c2410/gpio.c
@@ -3,7 +3,7 @@
  * Copyright (c) 2004-2005 Simtec Electronics
  *     Ben Dooks <ben@simtec.co.uk>
  *
- * S3C2410 GPIO support
+ * S3C24XX GPIO support
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -18,20 +18,7 @@
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- * Changelog
- *     13-Sep-2004  BJD  Implemented change of MISCCR
- *     14-Sep-2004  BJD  Added getpin call
- *     14-Sep-2004  BJD  Fixed bug in setpin() call
- *     30-Sep-2004  BJD  Fixed cfgpin() mask bug
- *     01-Oct-2004  BJD  Added getcfg() to get pin configuration
- *     01-Oct-2004  BJD  Fixed mask bug in pullup() call
- *     01-Oct-2004  BJD  Added getirq() to turn pin into irqno
- *     04-Oct-2004  BJD  Added irq filter controls for GPIO
- *     05-Nov-2004  BJD  EXPORT_SYMBOL() added for all code
- *     13-Mar-2005  BJD  Updates for __iomem
- *     26-Oct-2005  BJD  Added generic configuration types
- */
+*/
 
 
 #include <linux/kernel.h>
@@ -48,7 +35,7 @@
 
 void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function)
 {
-       void __iomem *base = S3C2410_GPIO_BASE(pin);
+       void __iomem *base = S3C24XX_GPIO_BASE(pin);
        unsigned long mask;
        unsigned long con;
        unsigned long flags;
@@ -95,7 +82,7 @@ EXPORT_SYMBOL(s3c2410_gpio_cfgpin);
 
 unsigned int s3c2410_gpio_getcfg(unsigned int pin)
 {
-       void __iomem *base = S3C2410_GPIO_BASE(pin);
+       void __iomem *base = S3C24XX_GPIO_BASE(pin);
        unsigned long mask;
 
        if (pin < S3C2410_GPIO_BANKB) {
@@ -111,7 +98,7 @@ EXPORT_SYMBOL(s3c2410_gpio_getcfg);
 
 void s3c2410_gpio_pullup(unsigned int pin, unsigned int to)
 {
-       void __iomem *base = S3C2410_GPIO_BASE(pin);
+       void __iomem *base = S3C24XX_GPIO_BASE(pin);
        unsigned long offs = S3C2410_GPIO_OFFSET(pin);
        unsigned long flags;
        unsigned long up;
@@ -133,7 +120,7 @@ EXPORT_SYMBOL(s3c2410_gpio_pullup);
 
 void s3c2410_gpio_setpin(unsigned int pin, unsigned int to)
 {
-       void __iomem *base = S3C2410_GPIO_BASE(pin);
+       void __iomem *base = S3C24XX_GPIO_BASE(pin);
        unsigned long offs = S3C2410_GPIO_OFFSET(pin);
        unsigned long flags;
        unsigned long dat;
@@ -152,7 +139,7 @@ EXPORT_SYMBOL(s3c2410_gpio_setpin);
 
 unsigned int s3c2410_gpio_getpin(unsigned int pin)
 {
-       void __iomem *base = S3C2410_GPIO_BASE(pin);
+       void __iomem *base = S3C24XX_GPIO_BASE(pin);
        unsigned long offs = S3C2410_GPIO_OFFSET(pin);
 
        return __raw_readl(base + 0x04) & (1<< offs);
@@ -166,10 +153,10 @@ unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change)
        unsigned long misccr;
 
        local_irq_save(flags);
-       misccr = __raw_readl(S3C2410_MISCCR);
+       misccr = __raw_readl(S3C24XX_MISCCR);
        misccr &= ~clear;
        misccr ^= change;
-       __raw_writel(misccr, S3C2410_MISCCR);
+       __raw_writel(misccr, S3C24XX_MISCCR);
        local_irq_restore(flags);
 
        return misccr;
@@ -179,7 +166,7 @@ EXPORT_SYMBOL(s3c2410_modify_misccr);
 
 int s3c2410_gpio_getirq(unsigned int pin)
 {
-       if (pin < S3C2410_GPF0 || pin > S3C2410_GPG15_EINT23)
+       if (pin < S3C2410_GPF0 || pin > S3C2410_GPG15)
                return -1;      /* not valid interrupts */
 
        if (pin < S3C2410_GPG0 && pin > S3C2410_GPF7)
@@ -195,41 +182,3 @@ int s3c2410_gpio_getirq(unsigned int pin)
 }
 
 EXPORT_SYMBOL(s3c2410_gpio_getirq);
-
-int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on,
-                          unsigned int config)
-{
-       void __iomem *reg = S3C2410_EINFLT0;
-       unsigned long flags;
-       unsigned long val;
-
-       if (pin < S3C2410_GPG8 || pin > S3C2410_GPG15)
-               return -1;
-
-       config &= 0xff;
-
-       pin -= S3C2410_GPG8_EINT16;
-       reg += pin & ~3;
-
-       local_irq_save(flags);
-
-       /* update filter width and clock source */
-
-       val = __raw_readl(reg);
-       val &= ~(0xff << ((pin & 3) * 8));
-       val |= config << ((pin & 3) * 8);
-       __raw_writel(val, reg);
-
-       /* update filter enable */
-
-       val = __raw_readl(S3C2410_EXTINT2);
-       val &= ~(1 << ((pin * 4) + 3));
-       val |= on << ((pin * 4) + 3);
-       __raw_writel(val, S3C2410_EXTINT2);
-
-       local_irq_restore(flags);
-
-       return 0;
-}
-
-EXPORT_SYMBOL(s3c2410_gpio_irqfilter);