Merge master.kernel.org:/pub/scm/linux/kernel/git/herbert/crypto-2.6

[linux-drm-fsl-dcu.git] / arch / arm / mach-pxa / irq.c

diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index d9635ff4b10cb97bd979e7f8022dd346e929ae5e..4619d5fe606c2bad027ee2bf023f6c045d3ab882 100644 (file)
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -15,7 +15,6 @@
 #include <linux/init.h>
 #include <linux/module.h>
 #include <linux/interrupt.h>
-#include <linux/ptrace.h>
 
 #include <asm/hardware.h>
 #include <asm/irq.h>
@@ -39,10 +38,33 @@ static void pxa_unmask_low_irq(unsigned int irq)
        ICMR |= (1 << (irq + PXA_IRQ_SKIP));
 }
 
-static struct irqchip pxa_internal_chip_low = {
+static int pxa_set_wake(unsigned int irq, unsigned int on)
+{
+       u32     mask;
+
+       switch (irq) {
+       case IRQ_RTCAlrm:
+               mask = PWER_RTC;
+               break;
+#ifdef CONFIG_PXA27x
+       /* REVISIT can handle USBH1, USBH2, USB, MSL, USIM, ... */
+#endif
+       default:
+               return -EINVAL;
+       }
+       if (on)
+               PWER |= mask;
+       else
+               PWER &= ~mask;
+       return 0;
+}
+
+static struct irq_chip pxa_internal_chip_low = {
+       .name           = "SC",
        .ack            = pxa_mask_low_irq,
        .mask           = pxa_mask_low_irq,
        .unmask         = pxa_unmask_low_irq,
+       .set_wake       = pxa_set_wake,
 };
 
 #if PXA_INTERNAL_IRQS > 32
@@ -61,7 +83,8 @@ static void pxa_unmask_high_irq(unsigned int irq)
        ICMR2 |= (1 << (irq - 32 + PXA_IRQ_SKIP));
 }
 
-static struct irqchip pxa_internal_chip_high = {
+static struct irq_chip pxa_internal_chip_high = {
+       .name           = "SC-hi",
        .ack            = pxa_mask_high_irq,
        .mask           = pxa_mask_high_irq,
        .unmask         = pxa_unmask_high_irq,
@@ -69,6 +92,26 @@ static struct irqchip pxa_internal_chip_high = {
 
 #endif
 
+/* Note that if an input/irq line ever gets changed to an output during
+ * suspend, the relevant PWER, PRER, and PFER bits should be cleared.
+ */
+#ifdef CONFIG_PXA27x
+
+/* PXA27x:  Various gpios can issue wakeup events.  This logic only
+ * handles the simple cases, not the WEMUX2 and WEMUX3 options
+ */
+#define PXA27x_GPIO_NOWAKE_MASK \
+       ((1 << 8) | (1 << 7) | (1 << 6) | (1 << 5) | (1 << 2))
+#define        WAKEMASK(gpio) \
+       (((gpio) <= 15) \
+               ? ((1 << (gpio)) & ~PXA27x_GPIO_NOWAKE_MASK) \
+               : ((gpio == 35) ? (1 << 24) : 0))
+#else
+
+/* pxa 210, 250, 255, 26x:  gpios 0..15 can issue wakeups */
+#define        WAKEMASK(gpio) (((gpio) <= 15) ? (1 << (gpio)) : 0)
+#endif
+
 /*
  * PXA GPIO edge detection for IRQs:
  * IRQs are generated on Falling-Edge, Rising-Edge, or both.
@@ -82,9 +125,11 @@ static long GPIO_IRQ_mask[4];
 static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
 {
        int gpio, idx;
+       u32 mask;
 
        gpio = IRQ_TO_GPIO(irq);
        idx = gpio >> 5;
+       mask = WAKEMASK(gpio);
 
        if (type == IRQT_PROBE) {
            /* Don't mess with enabled GPIOs using preconfigured edges or
@@ -104,14 +149,20 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type)
        if (type & __IRQT_RISEDGE) {
                /* printk("rising "); */
                __set_bit (gpio, GPIO_IRQ_rising_edge);
-       } else
+               PRER |= mask;
+       } else {
                __clear_bit (gpio, GPIO_IRQ_rising_edge);
+               PRER &= ~mask;
+       }
 
        if (type & __IRQT_FALEDGE) {
                /* printk("falling "); */
                __set_bit (gpio, GPIO_IRQ_falling_edge);
-       } else
+               PFER |= mask;
+       } else {
                __clear_bit (gpio, GPIO_IRQ_falling_edge);
+               PFER &= ~mask;
+       }
 
        /* printk("edges\n"); */
 
@@ -129,19 +180,36 @@ static void pxa_ack_low_gpio(unsigned int irq)
        GEDR0 = (1 << (irq - IRQ_GPIO0));
 }
 
-static struct irqchip pxa_low_gpio_chip = {
+static int pxa_set_gpio_wake(unsigned int irq, unsigned int on)
+{
+       int     gpio = IRQ_TO_GPIO(irq);
+       u32     mask = WAKEMASK(gpio);
+
+       if (!mask)
+               return -EINVAL;
+
+       if (on)
+               PWER |= mask;
+       else
+               PWER &= ~mask;
+       return 0;
+}
+
+
+static struct irq_chip pxa_low_gpio_chip = {
+       .name           = "GPIO-l",
        .ack            = pxa_ack_low_gpio,
        .mask           = pxa_mask_low_irq,
        .unmask         = pxa_unmask_low_irq,
        .set_type       = pxa_gpio_irq_type,
+       .set_wake       = pxa_set_gpio_wake,
 };
 
 /*
  * Demux handler for GPIO>=2 edge detect interrupts
  */
 
-static void pxa_gpio_demux_handler(unsigned int irq, struct irqdesc *desc,
-                                  struct pt_regs *regs)
+static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc)
 {
        unsigned int mask;
        int loop;
@@ -157,7 +225,7 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irqdesc *desc,
                        mask >>= 2;
                        do {
                                if (mask & 1)
-                                       desc_handle_irq(irq, desc, regs);
+                                       desc_handle_irq(irq, desc);
                                irq++;
                                desc++;
                                mask >>= 1;
@@ -172,7 +240,7 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irqdesc *desc,
                        desc = irq_desc + irq;
                        do {
                                if (mask & 1)
-                                       desc_handle_irq(irq, desc, regs);
+                                       desc_handle_irq(irq, desc);
                                irq++;
                                desc++;
                                mask >>= 1;
@@ -187,7 +255,7 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irqdesc *desc,
                        desc = irq_desc + irq;
                        do {
                                if (mask & 1)
-                                       desc_handle_irq(irq, desc, regs);
+                                       desc_handle_irq(irq, desc);
                                irq++;
                                desc++;
                                mask >>= 1;
@@ -203,7 +271,7 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irqdesc *desc,
                        desc = irq_desc + irq;
                        do {
                                if (mask & 1)
-                                       desc_handle_irq(irq, desc, regs);
+                                       desc_handle_irq(irq, desc);
                                irq++;
                                desc++;
                                mask >>= 1;
@@ -237,11 +305,13 @@ static void pxa_unmask_muxed_gpio(unsigned int irq)
        GFER(gpio) = GPIO_IRQ_falling_edge[idx] & GPIO_IRQ_mask[idx];
 }
 
-static struct irqchip pxa_muxed_gpio_chip = {
+static struct irq_chip pxa_muxed_gpio_chip = {
+       .name           = "GPIO",
        .ack            = pxa_ack_muxed_gpio,
        .mask           = pxa_mask_muxed_gpio,
        .unmask         = pxa_unmask_muxed_gpio,
        .set_type       = pxa_gpio_irq_type,
+       .set_wake       = pxa_set_gpio_wake,
 };
 
 
@@ -283,27 +353,27 @@ void __init pxa_init_irq(void)
 
        for (irq = PXA_IRQ(PXA_IRQ_SKIP); irq <= PXA_IRQ(31); irq++) {
                set_irq_chip(irq, &pxa_internal_chip_low);
-               set_irq_handler(irq, do_level_IRQ);
+               set_irq_handler(irq, handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
 
 #if PXA_INTERNAL_IRQS > 32
        for (irq = PXA_IRQ(32); irq < PXA_IRQ(PXA_INTERNAL_IRQS); irq++) {
                set_irq_chip(irq, &pxa_internal_chip_high);
-               set_irq_handler(irq, do_level_IRQ);
+               set_irq_handler(irq, handle_level_irq);
                set_irq_flags(irq, IRQF_VALID);
        }
 #endif
 
        for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
                set_irq_chip(irq, &pxa_low_gpio_chip);
-               set_irq_handler(irq, do_edge_IRQ);
+               set_irq_handler(irq, handle_edge_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
 
        for (irq = IRQ_GPIO(2); irq <= IRQ_GPIO(PXA_LAST_GPIO); irq++) {
                set_irq_chip(irq, &pxa_muxed_gpio_chip);
-               set_irq_handler(irq, do_edge_IRQ);
+               set_irq_handler(irq, handle_edge_irq);
                set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }