drivers/usb/gadget/pxa25x_udc.c

   1 /*
   2  * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
   3  *
   4  * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
   5  * Copyright (C) 2003 Robert Schwebel, Pengutronix
   6  * Copyright (C) 2003 Benedikt Spranger, Pengutronix
   7  * Copyright (C) 2003 David Brownell
   8  * Copyright (C) 2003 Joshua Wise
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  */
  15
  16 /* #define VERBOSE_DEBUG */
  17
  18 #include <linux/device.h>
  19 #include <linux/module.h>
  20 #include <linux/kernel.h>
  21 #include <linux/ioport.h>
  22 #include <linux/types.h>
  23 #include <linux/errno.h>
  24 #include <linux/err.h>
  25 #include <linux/delay.h>
  26 #include <linux/slab.h>
  27 #include <linux/init.h>
  28 #include <linux/timer.h>
  29 #include <linux/list.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/mm.h>
  32 #include <linux/platform_data/pxa2xx_udc.h>
  33 #include <linux/platform_device.h>
  34 #include <linux/dma-mapping.h>
  35 #include <linux/irq.h>
  36 #include <linux/clk.h>
  37 #include <linux/seq_file.h>
  38 #include <linux/debugfs.h>
  39 #include <linux/io.h>
  40 #include <linux/prefetch.h>
  41
  42 #include <asm/byteorder.h>
  43 #include <asm/dma.h>
  44 #include <asm/gpio.h>
  45 #include <asm/mach-types.h>
  46 #include <asm/unaligned.h>
  47
  48 #include <linux/usb/ch9.h>
  49 #include <linux/usb/gadget.h>
  50 #include <linux/usb/otg.h>
  51
  52 /*
  53  * This driver is PXA25x only.  Grab the right register definitions.
  54  */
  55 #ifdef CONFIG_ARCH_PXA
  56 #include <mach/pxa25x-udc.h>
  57 #include <mach/hardware.h>
  58 #endif
  59
  60 #ifdef CONFIG_ARCH_LUBBOCK
  61 #include <mach/lubbock.h>
  62 #endif
  63
  64 /*
  65  * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
  66  * series processors.  The UDC for the IXP 4xx series is very similar.
  67  * There are fifteen endpoints, in addition to ep0.
  68  *
  69  * Such controller drivers work with a gadget driver.  The gadget driver
  70  * returns descriptors, implements configuration and data protocols used
  71  * by the host to interact with this device, and allocates endpoints to
  72  * the different protocol interfaces.  The controller driver virtualizes
  73  * usb hardware so that the gadget drivers will be more portable.
  74  *
  75  * This UDC hardware wants to implement a bit too much USB protocol, so
  76  * it constrains the sorts of USB configuration change events that work.
  77  * The errata for these chips are misleading; some "fixed" bugs from
  78  * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
  79  *
  80  * Note that the UDC hardware supports DMA (except on IXP) but that's
  81  * not used here.  IN-DMA (to host) is simple enough, when the data is
  82  * suitably aligned (16 bytes) ... the network stack doesn't do that,
  83  * other software can.  OUT-DMA is buggy in most chip versions, as well
  84  * as poorly designed (data toggle not automatic).  So this driver won't
  85  * bother using DMA.  (Mostly-working IN-DMA support was available in
  86  * kernels before 2.6.23, but was never enabled or well tested.)
  87  */
  88
  89 #define DRIVER_VERSION  "30-June-2007"
  90 #define DRIVER_DESC     "PXA 25x USB Device Controller driver"
  91
  92
  93 static const char driver_name [] = "pxa25x_udc";
  94
  95 static const char ep0name [] = "ep0";
  96
  97
  98 #ifdef CONFIG_ARCH_IXP4XX
  99
 100 /* cpu-specific register addresses are compiled in to this code */
 101 #ifdef CONFIG_ARCH_PXA
 102 #error "Can't configure both IXP and PXA"
 103 #endif
 104
 105 /* IXP doesn't yet support <linux/clk.h> */
 106 #define clk_get(dev,name)       NULL
 107 #define clk_enable(clk)         do { } while (0)
 108 #define clk_disable(clk)        do { } while (0)
 109 #define clk_put(clk)            do { } while (0)
 110
 111 #endif
 112
 113 #include "pxa25x_udc.h"
 114
 115
 116 #ifdef  CONFIG_USB_PXA25X_SMALL
 117 #define SIZE_STR        " (small)"
 118 #else
 119 #define SIZE_STR        ""
 120 #endif
 121
 122 /* ---------------------------------------------------------------------------
 123  *      endpoint related parts of the api to the usb controller hardware,
 124  *      used by gadget driver; and the inner talker-to-hardware core.
 125  * ---------------------------------------------------------------------------
 126  */
 127
 128 static void pxa25x_ep_fifo_flush (struct usb_ep *ep);
 129 static void nuke (struct pxa25x_ep *, int status);
 130
 131 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
 132 static void pullup_off(void)
 133 {
 134         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
 135         int off_level = mach->gpio_pullup_inverted;
 136
 137         if (gpio_is_valid(mach->gpio_pullup))
 138                 gpio_set_value(mach->gpio_pullup, off_level);
 139         else if (mach->udc_command)
 140                 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
 141 }
 142
 143 static void pullup_on(void)
 144 {
 145         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
 146         int on_level = !mach->gpio_pullup_inverted;
 147
 148         if (gpio_is_valid(mach->gpio_pullup))
 149                 gpio_set_value(mach->gpio_pullup, on_level);
 150         else if (mach->udc_command)
 151                 mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
 152 }
 153
 154 static void pio_irq_enable(int bEndpointAddress)
 155 {
 156         bEndpointAddress &= 0xf;
 157         if (bEndpointAddress < 8)
 158                 UICR0 &= ~(1 << bEndpointAddress);
 159         else {
 160                 bEndpointAddress -= 8;
 161                 UICR1 &= ~(1 << bEndpointAddress);
 162         }
 163 }
 164
 165 static void pio_irq_disable(int bEndpointAddress)
 166 {
 167         bEndpointAddress &= 0xf;
 168         if (bEndpointAddress < 8)
 169                 UICR0 |= 1 << bEndpointAddress;
 170         else {
 171                 bEndpointAddress -= 8;
 172                 UICR1 |= 1 << bEndpointAddress;
 173         }
 174 }
 175
 176 /* The UDCCR reg contains mask and interrupt status bits,
 177  * so using '|=' isn't safe as it may ack an interrupt.
 178  */
 179 #define UDCCR_MASK_BITS         (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
 180
 181 static inline void udc_set_mask_UDCCR(int mask)
 182 {
 183         UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);
 184 }
 185
 186 static inline void udc_clear_mask_UDCCR(int mask)
 187 {
 188         UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);
 189 }
 190
 191 static inline void udc_ack_int_UDCCR(int mask)
 192 {
 193         /* udccr contains the bits we dont want to change */
 194         __u32 udccr = UDCCR & UDCCR_MASK_BITS;
 195
 196         UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);
 197 }
 198
 199 /*
 200  * endpoint enable/disable
 201  *
 202  * we need to verify the descriptors used to enable endpoints.  since pxa25x
 203  * endpoint configurations are fixed, and are pretty much always enabled,
 204  * there's not a lot to manage here.
 205  *
 206  * because pxa25x can't selectively initialize bulk (or interrupt) endpoints,
 207  * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
 208  * for a single interface (with only the default altsetting) and for gadget
 209  * drivers that don't halt endpoints (not reset by set_interface).  that also
 210  * means that if you use ISO, you must violate the USB spec rule that all
 211  * iso endpoints must be in non-default altsettings.
 212  */
 213 static int pxa25x_ep_enable (struct usb_ep *_ep,
 214                 const struct usb_endpoint_descriptor *desc)
 215 {
 216         struct pxa25x_ep        *ep;
 217         struct pxa25x_udc       *dev;
 218
 219         ep = container_of (_ep, struct pxa25x_ep, ep);
 220         if (!_ep || !desc || _ep->name == ep0name
 221                         || desc->bDescriptorType != USB_DT_ENDPOINT
 222                         || ep->bEndpointAddress != desc->bEndpointAddress
 223                         || ep->fifo_size < usb_endpoint_maxp (desc)) {
 224                 DMSG("%s, bad ep or descriptor\n", __func__);
 225                 return -EINVAL;
 226         }
 227
 228         /* xfer types must match, except that interrupt ~= bulk */
 229         if (ep->bmAttributes != desc->bmAttributes
 230                         && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
 231                         && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
 232                 DMSG("%s, %s type mismatch\n", __func__, _ep->name);
 233                 return -EINVAL;
 234         }
 235
 236         /* hardware _could_ do smaller, but driver doesn't */
 237         if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
 238                                 && usb_endpoint_maxp (desc)
 239                                                 != BULK_FIFO_SIZE)
 240                         || !desc->wMaxPacketSize) {
 241                 DMSG("%s, bad %s maxpacket\n", __func__, _ep->name);
 242                 return -ERANGE;
 243         }
 244
 245         dev = ep->dev;
 246         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
 247                 DMSG("%s, bogus device state\n", __func__);
 248                 return -ESHUTDOWN;
 249         }
 250
 251         ep->ep.desc = desc;
 252         ep->stopped = 0;
 253         ep->pio_irqs = 0;
 254         ep->ep.maxpacket = usb_endpoint_maxp (desc);
 255
 256         /* flush fifo (mostly for OUT buffers) */
 257         pxa25x_ep_fifo_flush (_ep);
 258
 259         /* ... reset halt state too, if we could ... */
 260
 261         DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);
 262         return 0;
 263 }
 264
 265 static int pxa25x_ep_disable (struct usb_ep *_ep)
 266 {
 267         struct pxa25x_ep        *ep;
 268         unsigned long           flags;
 269
 270         ep = container_of (_ep, struct pxa25x_ep, ep);
 271         if (!_ep || !ep->ep.desc) {
 272                 DMSG("%s, %s not enabled\n", __func__,
 273                         _ep ? ep->ep.name : NULL);
 274                 return -EINVAL;
 275         }
 276         local_irq_save(flags);
 277
 278         nuke (ep, -ESHUTDOWN);
 279
 280         /* flush fifo (mostly for IN buffers) */
 281         pxa25x_ep_fifo_flush (_ep);
 282
 283         ep->ep.desc = NULL;
 284         ep->stopped = 1;
 285
 286         local_irq_restore(flags);
 287         DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);
 288         return 0;
 289 }
 290
 291 /*-------------------------------------------------------------------------*/
 292
 293 /* for the pxa25x, these can just wrap kmalloc/kfree.  gadget drivers
 294  * must still pass correctly initialized endpoints, since other controller
 295  * drivers may care about how it's currently set up (dma issues etc).
 296  */
 297
 298 /*
 299  *      pxa25x_ep_alloc_request - allocate a request data structure
 300  */
 301 static struct usb_request *
 302 pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
 303 {
 304         struct pxa25x_request *req;
 305
 306         req = kzalloc(sizeof(*req), gfp_flags);
 307         if (!req)
 308                 return NULL;
 309
 310         INIT_LIST_HEAD (&req->queue);
 311         return &req->req;
 312 }
 313
 314
 315 /*
 316  *      pxa25x_ep_free_request - deallocate a request data structure
 317  */
 318 static void
 319 pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
 320 {
 321         struct pxa25x_request   *req;
 322
 323         req = container_of (_req, struct pxa25x_request, req);
 324         WARN_ON(!list_empty (&req->queue));
 325         kfree(req);
 326 }
 327
 328 /*-------------------------------------------------------------------------*/
 329
 330 /*
 331  *      done - retire a request; caller blocked irqs
 332  */
 333 static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status)
 334 {
 335         unsigned                stopped = ep->stopped;
 336
 337         list_del_init(&req->queue);
 338
 339         if (likely (req->req.status == -EINPROGRESS))
 340                 req->req.status = status;
 341         else
 342                 status = req->req.status;
 343
 344         if (status && status != -ESHUTDOWN)
 345                 DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",
 346                         ep->ep.name, &req->req, status,
 347                         req->req.actual, req->req.length);
 348
 349         /* don't modify queue heads during completion callback */
 350         ep->stopped = 1;
 351         req->req.complete(&ep->ep, &req->req);
 352         ep->stopped = stopped;
 353 }
 354
 355
 356 static inline void ep0_idle (struct pxa25x_udc *dev)
 357 {
 358         dev->ep0state = EP0_IDLE;
 359 }
 360
 361 static int
 362 write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max)
 363 {
 364         u8              *buf;
 365         unsigned        length, count;
 366
 367         buf = req->req.buf + req->req.actual;
 368         prefetch(buf);
 369
 370         /* how big will this packet be? */
 371         length = min(req->req.length - req->req.actual, max);
 372         req->req.actual += length;
 373
 374         count = length;
 375         while (likely(count--))
 376                 *uddr = *buf++;
 377
 378         return length;
 379 }
 380
 381 /*
 382  * write to an IN endpoint fifo, as many packets as possible.
 383  * irqs will use this to write the rest later.
 384  * caller guarantees at least one packet buffer is ready (or a zlp).
 385  */
 386 static int
 387 write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 388 {
 389         unsigned                max;
 390
 391         max = usb_endpoint_maxp(ep->ep.desc);
 392         do {
 393                 unsigned        count;
 394                 int             is_last, is_short;
 395
 396                 count = write_packet(ep->reg_uddr, req, max);
 397
 398                 /* last packet is usually short (or a zlp) */
 399                 if (unlikely (count != max))
 400                         is_last = is_short = 1;
 401                 else {
 402                         if (likely(req->req.length != req->req.actual)
 403                                         || req->req.zero)
 404                                 is_last = 0;
 405                         else
 406                                 is_last = 1;
 407                         /* interrupt/iso maxpacket may not fill the fifo */
 408                         is_short = unlikely (max < ep->fifo_size);
 409                 }
 410
 411                 DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",
 412                         ep->ep.name, count,
 413                         is_last ? "/L" : "", is_short ? "/S" : "",
 414                         req->req.length - req->req.actual, req);
 415
 416                 /* let loose that packet. maybe try writing another one,
 417                  * double buffering might work.  TSP, TPC, and TFS
 418                  * bit values are the same for all normal IN endpoints.
 419                  */
 420                 *ep->reg_udccs = UDCCS_BI_TPC;
 421                 if (is_short)
 422                         *ep->reg_udccs = UDCCS_BI_TSP;
 423
 424                 /* requests complete when all IN data is in the FIFO */
 425                 if (is_last) {
 426                         done (ep, req, 0);
 427                         if (list_empty(&ep->queue))
 428                                 pio_irq_disable (ep->bEndpointAddress);
 429                         return 1;
 430                 }
 431
 432                 // TODO experiment: how robust can fifo mode tweaking be?
 433                 // double buffering is off in the default fifo mode, which
 434                 // prevents TFS from being set here.
 435
 436         } while (*ep->reg_udccs & UDCCS_BI_TFS);
 437         return 0;
 438 }
 439
 440 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
 441  * ep0 data stage.  these chips want very simple state transitions.
 442  */
 443 static inline
 444 void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)
 445 {
 446         UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
 447         USIR0 = USIR0_IR0;
 448         dev->req_pending = 0;
 449         DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
 450                 __func__, tag, UDCCS0, flags);
 451 }
 452
 453 static int
 454 write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 455 {
 456         unsigned        count;
 457         int             is_short;
 458
 459         count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);
 460         ep->dev->stats.write.bytes += count;
 461
 462         /* last packet "must be" short (or a zlp) */
 463         is_short = (count != EP0_FIFO_SIZE);
 464
 465         DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,
 466                 req->req.length - req->req.actual, req);
 467
 468         if (unlikely (is_short)) {
 469                 if (ep->dev->req_pending)
 470                         ep0start(ep->dev, UDCCS0_IPR, "short IN");
 471                 else
 472                         UDCCS0 = UDCCS0_IPR;
 473
 474                 count = req->req.length;
 475                 done (ep, req, 0);
 476                 ep0_idle(ep->dev);
 477 #ifndef CONFIG_ARCH_IXP4XX
 478 #if 1
 479                 /* This seems to get rid of lost status irqs in some cases:
 480                  * host responds quickly, or next request involves config
 481                  * change automagic, or should have been hidden, or ...
 482                  *
 483                  * FIXME get rid of all udelays possible...
 484                  */
 485                 if (count >= EP0_FIFO_SIZE) {
 486                         count = 100;
 487                         do {
 488                                 if ((UDCCS0 & UDCCS0_OPR) != 0) {
 489                                         /* clear OPR, generate ack */
 490                                         UDCCS0 = UDCCS0_OPR;
 491                                         break;
 492                                 }
 493                                 count--;
 494                                 udelay(1);
 495                         } while (count);
 496                 }
 497 #endif
 498 #endif
 499         } else if (ep->dev->req_pending)
 500                 ep0start(ep->dev, 0, "IN");
 501         return is_short;
 502 }
 503
 504
 505 /*
 506  * read_fifo -  unload packet(s) from the fifo we use for usb OUT
 507  * transfers and put them into the request.  caller should have made
 508  * sure there's at least one packet ready.
 509  *
 510  * returns true if the request completed because of short packet or the
 511  * request buffer having filled (and maybe overran till end-of-packet).
 512  */
 513 static int
 514 read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 515 {
 516         for (;;) {
 517                 u32             udccs;
 518                 u8              *buf;
 519                 unsigned        bufferspace, count, is_short;
 520
 521                 /* make sure there's a packet in the FIFO.
 522                  * UDCCS_{BO,IO}_RPC are all the same bit value.
 523                  * UDCCS_{BO,IO}_RNE are all the same bit value.
 524                  */
 525                 udccs = *ep->reg_udccs;
 526                 if (unlikely ((udccs & UDCCS_BO_RPC) == 0))
 527                         break;
 528                 buf = req->req.buf + req->req.actual;
 529                 prefetchw(buf);
 530                 bufferspace = req->req.length - req->req.actual;
 531
 532                 /* read all bytes from this packet */
 533                 if (likely (udccs & UDCCS_BO_RNE)) {
 534                         count = 1 + (0x0ff & *ep->reg_ubcr);
 535                         req->req.actual += min (count, bufferspace);
 536                 } else /* zlp */
 537                         count = 0;
 538                 is_short = (count < ep->ep.maxpacket);
 539                 DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",
 540                         ep->ep.name, udccs, count,
 541                         is_short ? "/S" : "",
 542                         req, req->req.actual, req->req.length);
 543                 while (likely (count-- != 0)) {
 544                         u8      byte = (u8) *ep->reg_uddr;
 545
 546                         if (unlikely (bufferspace == 0)) {
 547                                 /* this happens when the driver's buffer
 548                                  * is smaller than what the host sent.
 549                                  * discard the extra data.
 550                                  */
 551                                 if (req->req.status != -EOVERFLOW)
 552                                         DMSG("%s overflow %d\n",
 553                                                 ep->ep.name, count);
 554                                 req->req.status = -EOVERFLOW;
 555                         } else {
 556                                 *buf++ = byte;
 557                                 bufferspace--;
 558                         }
 559                 }
 560                 *ep->reg_udccs =  UDCCS_BO_RPC;
 561                 /* RPC/RSP/RNE could now reflect the other packet buffer */
 562
 563                 /* iso is one request per packet */
 564                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 565                         if (udccs & UDCCS_IO_ROF)
 566                                 req->req.status = -EHOSTUNREACH;
 567                         /* more like "is_done" */
 568                         is_short = 1;
 569                 }
 570
 571                 /* completion */
 572                 if (is_short || req->req.actual == req->req.length) {
 573                         done (ep, req, 0);
 574                         if (list_empty(&ep->queue))
 575                                 pio_irq_disable (ep->bEndpointAddress);
 576                         return 1;
 577                 }
 578
 579                 /* finished that packet.  the next one may be waiting... */
 580         }
 581         return 0;
 582 }
 583
 584 /*
 585  * special ep0 version of the above.  no UBCR0 or double buffering; status
 586  * handshaking is magic.  most device protocols don't need control-OUT.
 587  * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
 588  * protocols do use them.
 589  */
 590 static int
 591 read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 592 {
 593         u8              *buf, byte;
 594         unsigned        bufferspace;
 595
 596         buf = req->req.buf + req->req.actual;
 597         bufferspace = req->req.length - req->req.actual;
 598
 599         while (UDCCS0 & UDCCS0_RNE) {
 600                 byte = (u8) UDDR0;
 601
 602                 if (unlikely (bufferspace == 0)) {
 603                         /* this happens when the driver's buffer
 604                          * is smaller than what the host sent.
 605                          * discard the extra data.
 606                          */
 607                         if (req->req.status != -EOVERFLOW)
 608                                 DMSG("%s overflow\n", ep->ep.name);
 609                         req->req.status = -EOVERFLOW;
 610                 } else {
 611                         *buf++ = byte;
 612                         req->req.actual++;
 613                         bufferspace--;
 614                 }
 615         }
 616
 617         UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;
 618
 619         /* completion */
 620         if (req->req.actual >= req->req.length)
 621                 return 1;
 622
 623         /* finished that packet.  the next one may be waiting... */
 624         return 0;
 625 }
 626
 627 /*-------------------------------------------------------------------------*/
 628
 629 static int
 630 pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 631 {
 632         struct pxa25x_request   *req;
 633         struct pxa25x_ep        *ep;
 634         struct pxa25x_udc       *dev;
 635         unsigned long           flags;
 636
 637         req = container_of(_req, struct pxa25x_request, req);
 638         if (unlikely (!_req || !_req->complete || !_req->buf
 639                         || !list_empty(&req->queue))) {
 640                 DMSG("%s, bad params\n", __func__);
 641                 return -EINVAL;
 642         }
 643
 644         ep = container_of(_ep, struct pxa25x_ep, ep);
 645         if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
 646                 DMSG("%s, bad ep\n", __func__);
 647                 return -EINVAL;
 648         }
 649
 650         dev = ep->dev;
 651         if (unlikely (!dev->driver
 652                         || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
 653                 DMSG("%s, bogus device state\n", __func__);
 654                 return -ESHUTDOWN;
 655         }
 656
 657         /* iso is always one packet per request, that's the only way
 658          * we can report per-packet status.  that also helps with dma.
 659          */
 660         if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
 661                         && req->req.length > usb_endpoint_maxp(ep->ep.desc)))
 662                 return -EMSGSIZE;
 663
 664         DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",
 665                 _ep->name, _req, _req->length, _req->buf);
 666
 667         local_irq_save(flags);
 668
 669         _req->status = -EINPROGRESS;
 670         _req->actual = 0;
 671
 672         /* kickstart this i/o queue? */
 673         if (list_empty(&ep->queue) && !ep->stopped) {
 674                 if (ep->ep.desc == NULL/* ep0 */) {
 675                         unsigned        length = _req->length;
 676
 677                         switch (dev->ep0state) {
 678                         case EP0_IN_DATA_PHASE:
 679                                 dev->stats.write.ops++;
 680                                 if (write_ep0_fifo(ep, req))
 681                                         req = NULL;
 682                                 break;
 683
 684                         case EP0_OUT_DATA_PHASE:
 685                                 dev->stats.read.ops++;
 686                                 /* messy ... */
 687                                 if (dev->req_config) {
 688                                         DBG(DBG_VERBOSE, "ep0 config ack%s\n",
 689                                                 dev->has_cfr ?  "" : " raced");
 690                                         if (dev->has_cfr)
 691                                                 UDCCFR = UDCCFR_AREN|UDCCFR_ACM
 692                                                         |UDCCFR_MB1;
 693                                         done(ep, req, 0);
 694                                         dev->ep0state = EP0_END_XFER;
 695                                         local_irq_restore (flags);
 696                                         return 0;
 697                                 }
 698                                 if (dev->req_pending)
 699                                         ep0start(dev, UDCCS0_IPR, "OUT");
 700                                 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0
 701                                                 && read_ep0_fifo(ep, req))) {
 702                                         ep0_idle(dev);
 703                                         done(ep, req, 0);
 704                                         req = NULL;
 705                                 }
 706                                 break;
 707
 708                         default:
 709                                 DMSG("ep0 i/o, odd state %d\n", dev->ep0state);
 710                                 local_irq_restore (flags);
 711                                 return -EL2HLT;
 712                         }
 713                 /* can the FIFO can satisfy the request immediately? */
 714                 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
 715                         if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0
 716                                         && write_fifo(ep, req))
 717                                 req = NULL;
 718                 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0
 719                                 && read_fifo(ep, req)) {
 720                         req = NULL;
 721                 }
 722
 723                 if (likely(req && ep->ep.desc))
 724                         pio_irq_enable(ep->bEndpointAddress);
 725         }
 726
 727         /* pio or dma irq handler advances the queue. */
 728         if (likely(req != NULL))
 729                 list_add_tail(&req->queue, &ep->queue);
 730         local_irq_restore(flags);
 731
 732         return 0;
 733 }
 734
 735
 736 /*
 737  *      nuke - dequeue ALL requests
 738  */
 739 static void nuke(struct pxa25x_ep *ep, int status)
 740 {
 741         struct pxa25x_request *req;
 742
 743         /* called with irqs blocked */
 744         while (!list_empty(&ep->queue)) {
 745                 req = list_entry(ep->queue.next,
 746                                 struct pxa25x_request,
 747                                 queue);
 748                 done(ep, req, status);
 749         }
 750         if (ep->ep.desc)
 751                 pio_irq_disable (ep->bEndpointAddress);
 752 }
 753
 754
 755 /* dequeue JUST ONE request */
 756 static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 757 {
 758         struct pxa25x_ep        *ep;
 759         struct pxa25x_request   *req;
 760         unsigned long           flags;
 761
 762         ep = container_of(_ep, struct pxa25x_ep, ep);
 763         if (!_ep || ep->ep.name == ep0name)
 764                 return -EINVAL;
 765
 766         local_irq_save(flags);
 767
 768         /* make sure it's actually queued on this endpoint */
 769         list_for_each_entry (req, &ep->queue, queue) {
 770                 if (&req->req == _req)
 771                         break;
 772         }
 773         if (&req->req != _req) {
 774                 local_irq_restore(flags);
 775                 return -EINVAL;
 776         }
 777
 778         done(ep, req, -ECONNRESET);
 779
 780         local_irq_restore(flags);
 781         return 0;
 782 }
 783
 784 /*-------------------------------------------------------------------------*/
 785
 786 static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)
 787 {
 788         struct pxa25x_ep        *ep;
 789         unsigned long           flags;
 790
 791         ep = container_of(_ep, struct pxa25x_ep, ep);
 792         if (unlikely (!_ep
 793                         || (!ep->ep.desc && ep->ep.name != ep0name))
 794                         || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 795                 DMSG("%s, bad ep\n", __func__);
 796                 return -EINVAL;
 797         }
 798         if (value == 0) {
 799                 /* this path (reset toggle+halt) is needed to implement
 800                  * SET_INTERFACE on normal hardware.  but it can't be
 801                  * done from software on the PXA UDC, and the hardware
 802                  * forgets to do it as part of SET_INTERFACE automagic.
 803                  */
 804                 DMSG("only host can clear %s halt\n", _ep->name);
 805                 return -EROFS;
 806         }
 807
 808         local_irq_save(flags);
 809
 810         if ((ep->bEndpointAddress & USB_DIR_IN) != 0
 811                         && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0
 812                            || !list_empty(&ep->queue))) {
 813                 local_irq_restore(flags);
 814                 return -EAGAIN;
 815         }
 816
 817         /* FST bit is the same for control, bulk in, bulk out, interrupt in */
 818         *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;
 819
 820         /* ep0 needs special care */
 821         if (!ep->ep.desc) {
 822                 start_watchdog(ep->dev);
 823                 ep->dev->req_pending = 0;
 824                 ep->dev->ep0state = EP0_STALL;
 825
 826         /* and bulk/intr endpoints like dropping stalls too */
 827         } else {
 828                 unsigned i;
 829                 for (i = 0; i < 1000; i += 20) {
 830                         if (*ep->reg_udccs & UDCCS_BI_SST)
 831                                 break;
 832                         udelay(20);
 833                 }
 834         }
 835         local_irq_restore(flags);
 836
 837         DBG(DBG_VERBOSE, "%s halt\n", _ep->name);
 838         return 0;
 839 }
 840
 841 static int pxa25x_ep_fifo_status(struct usb_ep *_ep)
 842 {
 843         struct pxa25x_ep        *ep;
 844
 845         ep = container_of(_ep, struct pxa25x_ep, ep);
 846         if (!_ep) {
 847                 DMSG("%s, bad ep\n", __func__);
 848                 return -ENODEV;
 849         }
 850         /* pxa can't report unclaimed bytes from IN fifos */
 851         if ((ep->bEndpointAddress & USB_DIR_IN) != 0)
 852                 return -EOPNOTSUPP;
 853         if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
 854                         || (*ep->reg_udccs & UDCCS_BO_RFS) == 0)
 855                 return 0;
 856         else
 857                 return (*ep->reg_ubcr & 0xfff) + 1;
 858 }
 859
 860 static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)
 861 {
 862         struct pxa25x_ep        *ep;
 863
 864         ep = container_of(_ep, struct pxa25x_ep, ep);
 865         if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
 866                 DMSG("%s, bad ep\n", __func__);
 867                 return;
 868         }
 869
 870         /* toggle and halt bits stay unchanged */
 871
 872         /* for OUT, just read and discard the FIFO contents. */
 873         if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {
 874                 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)
 875                         (void) *ep->reg_uddr;
 876                 return;
 877         }
 878
 879         /* most IN status is the same, but ISO can't stall */
 880         *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
 881                 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
 882                         ? 0 : UDCCS_BI_SST);
 883 }
 884
 885
 886 static struct usb_ep_ops pxa25x_ep_ops = {
 887         .enable         = pxa25x_ep_enable,
 888         .disable        = pxa25x_ep_disable,
 889
 890         .alloc_request  = pxa25x_ep_alloc_request,
 891         .free_request   = pxa25x_ep_free_request,
 892
 893         .queue          = pxa25x_ep_queue,
 894         .dequeue        = pxa25x_ep_dequeue,
 895
 896         .set_halt       = pxa25x_ep_set_halt,
 897         .fifo_status    = pxa25x_ep_fifo_status,
 898         .fifo_flush     = pxa25x_ep_fifo_flush,
 899 };
 900
 901
 902 /* ---------------------------------------------------------------------------
 903  *      device-scoped parts of the api to the usb controller hardware
 904  * ---------------------------------------------------------------------------
 905  */
 906
 907 static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)
 908 {
 909         return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
 910 }
 911
 912 static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)
 913 {
 914         /* host may not have enabled remote wakeup */
 915         if ((UDCCS0 & UDCCS0_DRWF) == 0)
 916                 return -EHOSTUNREACH;
 917         udc_set_mask_UDCCR(UDCCR_RSM);
 918         return 0;
 919 }
 920
 921 static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *);
 922 static void udc_enable (struct pxa25x_udc *);
 923 static void udc_disable(struct pxa25x_udc *);
 924
 925 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
 926  * in active use.
 927  */
 928 static int pullup(struct pxa25x_udc *udc)
 929 {
 930         int is_active = udc->vbus && udc->pullup && !udc->suspended;
 931         DMSG("%s\n", is_active ? "active" : "inactive");
 932         if (is_active) {
 933                 if (!udc->active) {
 934                         udc->active = 1;
 935                         /* Enable clock for USB device */
 936                         clk_enable(udc->clk);
 937                         udc_enable(udc);
 938                 }
 939         } else {
 940                 if (udc->active) {
 941                         if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
 942                                 DMSG("disconnect %s\n", udc->driver
 943                                         ? udc->driver->driver.name
 944                                         : "(no driver)");
 945                                 stop_activity(udc, udc->driver);
 946                         }
 947                         udc_disable(udc);
 948                         /* Disable clock for USB device */
 949                         clk_disable(udc->clk);
 950                         udc->active = 0;
 951                 }
 952
 953         }
 954         return 0;
 955 }
 956
 957 /* VBUS reporting logically comes from a transceiver */
 958 static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
 959 {
 960         struct pxa25x_udc       *udc;
 961
 962         udc = container_of(_gadget, struct pxa25x_udc, gadget);
 963         udc->vbus = is_active;
 964         DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
 965         pullup(udc);
 966         return 0;
 967 }
 968
 969 /* drivers may have software control over D+ pullup */
 970 static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active)
 971 {
 972         struct pxa25x_udc       *udc;
 973
 974         udc = container_of(_gadget, struct pxa25x_udc, gadget);
 975
 976         /* not all boards support pullup control */
 977         if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
 978                 return -EOPNOTSUPP;
 979
 980         udc->pullup = (is_active != 0);
 981         pullup(udc);
 982         return 0;
 983 }
 984
 985 /* boards may consume current from VBUS, up to 100-500mA based on config.
 986  * the 500uA suspend ceiling means that exclusively vbus-powered PXA designs
 987  * violate USB specs.
 988  */
 989 static int pxa25x_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
 990 {
 991         struct pxa25x_udc       *udc;
 992
 993         udc = container_of(_gadget, struct pxa25x_udc, gadget);
 994
 995         if (!IS_ERR_OR_NULL(udc->transceiver))
 996                 return usb_phy_set_power(udc->transceiver, mA);
 997         return -EOPNOTSUPP;
 998 }
 999
1000 static int pxa25x_udc_start(struct usb_gadget *g,
1001                 struct usb_gadget_driver *driver);
1002 static int pxa25x_udc_stop(struct usb_gadget *g,
1003                 struct usb_gadget_driver *driver);
1004
1005 static const struct usb_gadget_ops pxa25x_udc_ops = {
1006         .get_frame      = pxa25x_udc_get_frame,
1007         .wakeup         = pxa25x_udc_wakeup,
1008         .vbus_session   = pxa25x_udc_vbus_session,
1009         .pullup         = pxa25x_udc_pullup,
1010         .vbus_draw      = pxa25x_udc_vbus_draw,
1011         .udc_start      = pxa25x_udc_start,
1012         .udc_stop       = pxa25x_udc_stop,
1013 };
1014
1015 /*-------------------------------------------------------------------------*/
1016
1017 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1018
1019 static int
1020 udc_seq_show(struct seq_file *m, void *_d)
1021 {
1022         struct pxa25x_udc       *dev = m->private;
1023         unsigned long           flags;
1024         int                     i;
1025         u32                     tmp;
1026
1027         local_irq_save(flags);
1028
1029         /* basic device status */
1030         seq_printf(m, DRIVER_DESC "\n"
1031                 "%s version: %s\nGadget driver: %s\nHost %s\n\n",
1032                 driver_name, DRIVER_VERSION SIZE_STR "(pio)",
1033                 dev->driver ? dev->driver->driver.name : "(none)",
1034                 dev->gadget.speed == USB_SPEED_FULL ? "full speed" : "disconnected");
1035
1036         /* registers for device and ep0 */
1037         seq_printf(m,
1038                 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1039                 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
1040
1041         tmp = UDCCR;
1042         seq_printf(m,
1043                 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,
1044                 (tmp & UDCCR_REM) ? " rem" : "",
1045                 (tmp & UDCCR_RSTIR) ? " rstir" : "",
1046                 (tmp & UDCCR_SRM) ? " srm" : "",
1047                 (tmp & UDCCR_SUSIR) ? " susir" : "",
1048                 (tmp & UDCCR_RESIR) ? " resir" : "",
1049                 (tmp & UDCCR_RSM) ? " rsm" : "",
1050                 (tmp & UDCCR_UDA) ? " uda" : "",
1051                 (tmp & UDCCR_UDE) ? " ude" : "");
1052
1053         tmp = UDCCS0;
1054         seq_printf(m,
1055                 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,
1056                 (tmp & UDCCS0_SA) ? " sa" : "",
1057                 (tmp & UDCCS0_RNE) ? " rne" : "",
1058                 (tmp & UDCCS0_FST) ? " fst" : "",
1059                 (tmp & UDCCS0_SST) ? " sst" : "",
1060                 (tmp & UDCCS0_DRWF) ? " dwrf" : "",
1061                 (tmp & UDCCS0_FTF) ? " ftf" : "",
1062                 (tmp & UDCCS0_IPR) ? " ipr" : "",
1063                 (tmp & UDCCS0_OPR) ? " opr" : "");
1064
1065         if (dev->has_cfr) {
1066                 tmp = UDCCFR;
1067                 seq_printf(m,
1068                         "udccfr %02X =%s%s\n", tmp,
1069                         (tmp & UDCCFR_AREN) ? " aren" : "",
1070                         (tmp & UDCCFR_ACM) ? " acm" : "");
1071         }
1072
1073         if (dev->gadget.speed != USB_SPEED_FULL || !dev->driver)
1074                 goto done;
1075
1076         seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1077                 dev->stats.write.bytes, dev->stats.write.ops,
1078                 dev->stats.read.bytes, dev->stats.read.ops,
1079                 dev->stats.irqs);
1080
1081         /* dump endpoint queues */
1082         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1083                 struct pxa25x_ep        *ep = &dev->ep [i];
1084                 struct pxa25x_request   *req;
1085
1086                 if (i != 0) {
1087                         const struct usb_endpoint_descriptor    *desc;
1088
1089                         desc = ep->ep.desc;
1090                         if (!desc)
1091                                 continue;
1092                         tmp = *dev->ep [i].reg_udccs;
1093                         seq_printf(m,
1094                                 "%s max %d %s udccs %02x irqs %lu\n",
1095                                 ep->ep.name, usb_endpoint_maxp(desc),
1096                                 "pio", tmp, ep->pio_irqs);
1097                         /* TODO translate all five groups of udccs bits! */
1098
1099                 } else /* ep0 should only have one transfer queued */
1100                         seq_printf(m, "ep0 max 16 pio irqs %lu\n",
1101                                 ep->pio_irqs);
1102
1103                 if (list_empty(&ep->queue)) {
1104                         seq_printf(m, "\t(nothing queued)\n");
1105                         continue;
1106                 }
1107                 list_for_each_entry(req, &ep->queue, queue) {
1108                         seq_printf(m,
1109                                         "\treq %p len %d/%d buf %p\n",
1110                                         &req->req, req->req.actual,
1111                                         req->req.length, req->req.buf);
1112                 }
1113         }
1114
1115 done:
1116         local_irq_restore(flags);
1117         return 0;
1118 }
1119
1120 static int
1121 udc_debugfs_open(struct inode *inode, struct file *file)
1122 {
1123         return single_open(file, udc_seq_show, inode->i_private);
1124 }
1125
1126 static const struct file_operations debug_fops = {
1127         .open           = udc_debugfs_open,
1128         .read           = seq_read,
1129         .llseek         = seq_lseek,
1130         .release        = single_release,
1131         .owner          = THIS_MODULE,
1132 };
1133
1134 #define create_debug_files(dev) \
1135         do { \
1136                 dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \
1137                         S_IRUGO, NULL, dev, &debug_fops); \
1138         } while (0)
1139 #define remove_debug_files(dev) \
1140         do { \
1141                 if (dev->debugfs_udc) \
1142                         debugfs_remove(dev->debugfs_udc); \
1143         } while (0)
1144
1145 #else   /* !CONFIG_USB_GADGET_DEBUG_FILES */
1146
1147 #define create_debug_files(dev) do {} while (0)
1148 #define remove_debug_files(dev) do {} while (0)
1149
1150 #endif  /* CONFIG_USB_GADGET_DEBUG_FILES */
1151
1152 /*-------------------------------------------------------------------------*/
1153
1154 /*
1155  *      udc_disable - disable USB device controller
1156  */
1157 static void udc_disable(struct pxa25x_udc *dev)
1158 {
1159         /* block all irqs */
1160         udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
1161         UICR0 = UICR1 = 0xff;
1162         UFNRH = UFNRH_SIM;
1163
1164         /* if hardware supports it, disconnect from usb */
1165         pullup_off();
1166
1167         udc_clear_mask_UDCCR(UDCCR_UDE);
1168
1169         ep0_idle (dev);
1170         dev->gadget.speed = USB_SPEED_UNKNOWN;
1171 }
1172
1173
1174 /*
1175  *      udc_reinit - initialize software state
1176  */
1177 static void udc_reinit(struct pxa25x_udc *dev)
1178 {
1179         u32     i;
1180
1181         /* device/ep0 records init */
1182         INIT_LIST_HEAD (&dev->gadget.ep_list);
1183         INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1184         dev->ep0state = EP0_IDLE;
1185
1186         /* basic endpoint records init */
1187         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1188                 struct pxa25x_ep *ep = &dev->ep[i];
1189
1190                 if (i != 0)
1191                         list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1192
1193                 ep->ep.desc = NULL;
1194                 ep->stopped = 0;
1195                 INIT_LIST_HEAD (&ep->queue);
1196                 ep->pio_irqs = 0;
1197         }
1198
1199         /* the rest was statically initialized, and is read-only */
1200 }
1201
1202 /* until it's enabled, this UDC should be completely invisible
1203  * to any USB host.
1204  */
1205 static void udc_enable (struct pxa25x_udc *dev)
1206 {
1207         udc_clear_mask_UDCCR(UDCCR_UDE);
1208
1209         /* try to clear these bits before we enable the udc */
1210         udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
1211
1212         ep0_idle(dev);
1213         dev->gadget.speed = USB_SPEED_UNKNOWN;
1214         dev->stats.irqs = 0;
1215
1216         /*
1217          * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1218          * - enable UDC
1219          * - if RESET is already in progress, ack interrupt
1220          * - unmask reset interrupt
1221          */
1222         udc_set_mask_UDCCR(UDCCR_UDE);
1223         if (!(UDCCR & UDCCR_UDA))
1224                 udc_ack_int_UDCCR(UDCCR_RSTIR);
1225
1226         if (dev->has_cfr /* UDC_RES2 is defined */) {
1227                 /* pxa255 (a0+) can avoid a set_config race that could
1228                  * prevent gadget drivers from configuring correctly
1229                  */
1230                 UDCCFR = UDCCFR_ACM | UDCCFR_MB1;
1231         } else {
1232                 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1233                  * which could result in missing packets and interrupts.
1234                  * supposedly one bit per endpoint, controlling whether it
1235                  * double buffers or not; ACM/AREN bits fit into the holes.
1236                  * zero bits (like USIR0_IRx) disable double buffering.
1237                  */
1238                 UDC_RES1 = 0x00;
1239                 UDC_RES2 = 0x00;
1240         }
1241
1242         /* enable suspend/resume and reset irqs */
1243         udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);
1244
1245         /* enable ep0 irqs */
1246         UICR0 &= ~UICR0_IM0;
1247
1248         /* if hardware supports it, pullup D+ and wait for reset */
1249         pullup_on();
1250 }
1251
1252
1253 /* when a driver is successfully registered, it will receive
1254  * control requests including set_configuration(), which enables
1255  * non-control requests.  then usb traffic follows until a
1256  * disconnect is reported.  then a host may connect again, or
1257  * the driver might get unbound.
1258  */
1259 static int pxa25x_udc_start(struct usb_gadget *g,
1260                 struct usb_gadget_driver *driver)
1261 {
1262         struct pxa25x_udc       *dev = to_pxa25x(g);
1263         int                     retval;
1264
1265         /* first hook up the driver ... */
1266         dev->driver = driver;
1267         dev->pullup = 1;
1268
1269         /* ... then enable host detection and ep0; and we're ready
1270          * for set_configuration as well as eventual disconnect.
1271          */
1272         /* connect to bus through transceiver */
1273         if (!IS_ERR_OR_NULL(dev->transceiver)) {
1274                 retval = otg_set_peripheral(dev->transceiver->otg,
1275                                                 &dev->gadget);
1276                 if (retval)
1277                         goto bind_fail;
1278         }
1279
1280         pullup(dev);
1281         dump_state(dev);
1282         return 0;
1283 bind_fail:
1284         return retval;
1285 }
1286
1287 static void
1288 stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)
1289 {
1290         int i;
1291
1292         /* don't disconnect drivers more than once */
1293         if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1294                 driver = NULL;
1295         dev->gadget.speed = USB_SPEED_UNKNOWN;
1296
1297         /* prevent new request submissions, kill any outstanding requests  */
1298         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1299                 struct pxa25x_ep *ep = &dev->ep[i];
1300
1301                 ep->stopped = 1;
1302                 nuke(ep, -ESHUTDOWN);
1303         }
1304         del_timer_sync(&dev->timer);
1305
1306         /* report disconnect; the driver is already quiesced */
1307         if (driver)
1308                 driver->disconnect(&dev->gadget);
1309
1310         /* re-init driver-visible data structures */
1311         udc_reinit(dev);
1312 }
1313
1314 static int pxa25x_udc_stop(struct usb_gadget*g,
1315                 struct usb_gadget_driver *driver)
1316 {
1317         struct pxa25x_udc       *dev = to_pxa25x(g);
1318
1319         local_irq_disable();
1320         dev->pullup = 0;
1321         pullup(dev);
1322         stop_activity(dev, driver);
1323         local_irq_enable();
1324
1325         if (!IS_ERR_OR_NULL(dev->transceiver))
1326                 (void) otg_set_peripheral(dev->transceiver->otg, NULL);
1327
1328         dev->driver = NULL;
1329
1330         dump_state(dev);
1331
1332         return 0;
1333 }
1334
1335 /*-------------------------------------------------------------------------*/
1336
1337 #ifdef CONFIG_ARCH_LUBBOCK
1338
1339 /* Lubbock has separate connect and disconnect irqs.  More typical designs
1340  * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1341  */
1342
1343 static irqreturn_t
1344 lubbock_vbus_irq(int irq, void *_dev)
1345 {
1346         struct pxa25x_udc       *dev = _dev;
1347         int                     vbus;
1348
1349         dev->stats.irqs++;
1350         switch (irq) {
1351         case LUBBOCK_USB_IRQ:
1352                 vbus = 1;
1353                 disable_irq(LUBBOCK_USB_IRQ);
1354                 enable_irq(LUBBOCK_USB_DISC_IRQ);
1355                 break;
1356         case LUBBOCK_USB_DISC_IRQ:
1357                 vbus = 0;
1358                 disable_irq(LUBBOCK_USB_DISC_IRQ);
1359                 enable_irq(LUBBOCK_USB_IRQ);
1360                 break;
1361         default:
1362                 return IRQ_NONE;
1363         }
1364
1365         pxa25x_udc_vbus_session(&dev->gadget, vbus);
1366         return IRQ_HANDLED;
1367 }
1368
1369 #endif
1370
1371
1372 /*-------------------------------------------------------------------------*/
1373
1374 static inline void clear_ep_state (struct pxa25x_udc *dev)
1375 {
1376         unsigned i;
1377
1378         /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1379          * fifos, and pending transactions mustn't be continued in any case.
1380          */
1381         for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)
1382                 nuke(&dev->ep[i], -ECONNABORTED);
1383 }
1384
1385 static void udc_watchdog(unsigned long _dev)
1386 {
1387         struct pxa25x_udc       *dev = (void *)_dev;
1388
1389         local_irq_disable();
1390         if (dev->ep0state == EP0_STALL
1391                         && (UDCCS0 & UDCCS0_FST) == 0
1392                         && (UDCCS0 & UDCCS0_SST) == 0) {
1393                 UDCCS0 = UDCCS0_FST|UDCCS0_FTF;
1394                 DBG(DBG_VERBOSE, "ep0 re-stall\n");
1395                 start_watchdog(dev);
1396         }
1397         local_irq_enable();
1398 }
1399
1400 static void handle_ep0 (struct pxa25x_udc *dev)
1401 {
1402         u32                     udccs0 = UDCCS0;
1403         struct pxa25x_ep        *ep = &dev->ep [0];
1404         struct pxa25x_request   *req;
1405         union {
1406                 struct usb_ctrlrequest  r;
1407                 u8                      raw [8];
1408                 u32                     word [2];
1409         } u;
1410
1411         if (list_empty(&ep->queue))
1412                 req = NULL;
1413         else
1414                 req = list_entry(ep->queue.next, struct pxa25x_request, queue);
1415
1416         /* clear stall status */
1417         if (udccs0 & UDCCS0_SST) {
1418                 nuke(ep, -EPIPE);
1419                 UDCCS0 = UDCCS0_SST;
1420                 del_timer(&dev->timer);
1421                 ep0_idle(dev);
1422         }
1423
1424         /* previous request unfinished?  non-error iff back-to-back ... */
1425         if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {
1426                 nuke(ep, 0);
1427                 del_timer(&dev->timer);
1428                 ep0_idle(dev);
1429         }
1430
1431         switch (dev->ep0state) {
1432         case EP0_IDLE:
1433                 /* late-breaking status? */
1434                 udccs0 = UDCCS0;
1435
1436                 /* start control request? */
1437                 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
1438                                 == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {
1439                         int i;
1440
1441                         nuke (ep, -EPROTO);
1442
1443                         /* read SETUP packet */
1444                         for (i = 0; i < 8; i++) {
1445                                 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {
1446 bad_setup:
1447                                         DMSG("SETUP %d!\n", i);
1448                                         goto stall;
1449                                 }
1450                                 u.raw [i] = (u8) UDDR0;
1451                         }
1452                         if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))
1453                                 goto bad_setup;
1454
1455 got_setup:
1456                         DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1457                                 u.r.bRequestType, u.r.bRequest,
1458                                 le16_to_cpu(u.r.wValue),
1459                                 le16_to_cpu(u.r.wIndex),
1460                                 le16_to_cpu(u.r.wLength));
1461
1462                         /* cope with automagic for some standard requests. */
1463                         dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)
1464                                                 == USB_TYPE_STANDARD;
1465                         dev->req_config = 0;
1466                         dev->req_pending = 1;
1467                         switch (u.r.bRequest) {
1468                         /* hardware restricts gadget drivers here! */
1469                         case USB_REQ_SET_CONFIGURATION:
1470                                 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1471                                         /* reflect hardware's automagic
1472                                          * up to the gadget driver.
1473                                          */
1474 config_change:
1475                                         dev->req_config = 1;
1476                                         clear_ep_state(dev);
1477                                         /* if !has_cfr, there's no synch
1478                                          * else use AREN (later) not SA|OPR
1479                                          * USIR0_IR0 acts edge sensitive
1480                                          */
1481                                 }
1482                                 break;
1483                         /* ... and here, even more ... */
1484                         case USB_REQ_SET_INTERFACE:
1485                                 if (u.r.bRequestType == USB_RECIP_INTERFACE) {
1486                                         /* udc hardware is broken by design:
1487                                          *  - altsetting may only be zero;
1488                                          *  - hw resets all interfaces' eps;
1489                                          *  - ep reset doesn't include halt(?).
1490                                          */
1491                                         DMSG("broken set_interface (%d/%d)\n",
1492                                                 le16_to_cpu(u.r.wIndex),
1493                                                 le16_to_cpu(u.r.wValue));
1494                                         goto config_change;
1495                                 }
1496                                 break;
1497                         /* hardware was supposed to hide this */
1498                         case USB_REQ_SET_ADDRESS:
1499                                 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1500                                         ep0start(dev, 0, "address");
1501                                         return;
1502                                 }
1503                                 break;
1504                         }
1505
1506                         if (u.r.bRequestType & USB_DIR_IN)
1507                                 dev->ep0state = EP0_IN_DATA_PHASE;
1508                         else
1509                                 dev->ep0state = EP0_OUT_DATA_PHASE;
1510
1511                         i = dev->driver->setup(&dev->gadget, &u.r);
1512                         if (i < 0) {
1513                                 /* hardware automagic preventing STALL... */
1514                                 if (dev->req_config) {
1515                                         /* hardware sometimes neglects to tell
1516                                          * tell us about config change events,
1517                                          * so later ones may fail...
1518                                          */
1519                                         WARNING("config change %02x fail %d?\n",
1520                                                 u.r.bRequest, i);
1521                                         return;
1522                                         /* TODO experiment:  if has_cfr,
1523                                          * hardware didn't ACK; maybe we
1524                                          * could actually STALL!
1525                                          */
1526                                 }
1527                                 DBG(DBG_VERBOSE, "protocol STALL, "
1528                                         "%02x err %d\n", UDCCS0, i);
1529 stall:
1530                                 /* the watchdog timer helps deal with cases
1531                                  * where udc seems to clear FST wrongly, and
1532                                  * then NAKs instead of STALLing.
1533                                  */
1534                                 ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");
1535                                 start_watchdog(dev);
1536                                 dev->ep0state = EP0_STALL;
1537
1538                         /* deferred i/o == no response yet */
1539                         } else if (dev->req_pending) {
1540                                 if (likely(dev->ep0state == EP0_IN_DATA_PHASE
1541                                                 || dev->req_std || u.r.wLength))
1542                                         ep0start(dev, 0, "defer");
1543                                 else
1544                                         ep0start(dev, UDCCS0_IPR, "defer/IPR");
1545                         }
1546
1547                         /* expect at least one data or status stage irq */
1548                         return;
1549
1550                 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))
1551                                 == (UDCCS0_OPR|UDCCS0_SA))) {
1552                         unsigned i;
1553
1554                         /* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1555                          * still observed on a pxa255 a0.
1556                          */
1557                         DBG(DBG_VERBOSE, "e131\n");
1558                         nuke(ep, -EPROTO);
1559
1560                         /* read SETUP data, but don't trust it too much */
1561                         for (i = 0; i < 8; i++)
1562                                 u.raw [i] = (u8) UDDR0;
1563                         if ((u.r.bRequestType & USB_RECIP_MASK)
1564                                         > USB_RECIP_OTHER)
1565                                 goto stall;
1566                         if (u.word [0] == 0 && u.word [1] == 0)
1567                                 goto stall;
1568                         goto got_setup;
1569                 } else {
1570                         /* some random early IRQ:
1571                          * - we acked FST
1572                          * - IPR cleared
1573                          * - OPR got set, without SA (likely status stage)
1574                          */
1575                         UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);
1576                 }
1577                 break;
1578         case EP0_IN_DATA_PHASE:                 /* GET_DESCRIPTOR etc */
1579                 if (udccs0 & UDCCS0_OPR) {
1580                         UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;
1581                         DBG(DBG_VERBOSE, "ep0in premature status\n");
1582                         if (req)
1583                                 done(ep, req, 0);
1584                         ep0_idle(dev);
1585                 } else /* irq was IPR clearing */ {
1586                         if (req) {
1587                                 /* this IN packet might finish the request */
1588                                 (void) write_ep0_fifo(ep, req);
1589                         } /* else IN token before response was written */
1590                 }
1591                 break;
1592         case EP0_OUT_DATA_PHASE:                /* SET_DESCRIPTOR etc */
1593                 if (udccs0 & UDCCS0_OPR) {
1594                         if (req) {
1595                                 /* this OUT packet might finish the request */
1596                                 if (read_ep0_fifo(ep, req))
1597                                         done(ep, req, 0);
1598                                 /* else more OUT packets expected */
1599                         } /* else OUT token before read was issued */
1600                 } else /* irq was IPR clearing */ {
1601                         DBG(DBG_VERBOSE, "ep0out premature status\n");
1602                         if (req)
1603                                 done(ep, req, 0);
1604                         ep0_idle(dev);
1605                 }
1606                 break;
1607         case EP0_END_XFER:
1608                 if (req)
1609                         done(ep, req, 0);
1610                 /* ack control-IN status (maybe in-zlp was skipped)
1611                  * also appears after some config change events.
1612                  */
1613                 if (udccs0 & UDCCS0_OPR)
1614                         UDCCS0 = UDCCS0_OPR;
1615                 ep0_idle(dev);
1616                 break;
1617         case EP0_STALL:
1618                 UDCCS0 = UDCCS0_FST;
1619                 break;
1620         }
1621         USIR0 = USIR0_IR0;
1622 }
1623
1624 static void handle_ep(struct pxa25x_ep *ep)
1625 {
1626         struct pxa25x_request   *req;
1627         int                     is_in = ep->bEndpointAddress & USB_DIR_IN;
1628         int                     completed;
1629         u32                     udccs, tmp;
1630
1631         do {
1632                 completed = 0;
1633                 if (likely (!list_empty(&ep->queue)))
1634                         req = list_entry(ep->queue.next,
1635                                         struct pxa25x_request, queue);
1636                 else
1637                         req = NULL;
1638
1639                 // TODO check FST handling
1640
1641                 udccs = *ep->reg_udccs;
1642                 if (unlikely(is_in)) {  /* irq from TPC, SST, or (ISO) TUR */
1643                         tmp = UDCCS_BI_TUR;
1644                         if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1645                                 tmp |= UDCCS_BI_SST;
1646                         tmp &= udccs;
1647                         if (likely (tmp))
1648                                 *ep->reg_udccs = tmp;
1649                         if (req && likely ((udccs & UDCCS_BI_TFS) != 0))
1650                                 completed = write_fifo(ep, req);
1651
1652                 } else {        /* irq from RPC (or for ISO, ROF) */
1653                         if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1654                                 tmp = UDCCS_BO_SST | UDCCS_BO_DME;
1655                         else
1656                                 tmp = UDCCS_IO_ROF | UDCCS_IO_DME;
1657                         tmp &= udccs;
1658                         if (likely(tmp))
1659                                 *ep->reg_udccs = tmp;
1660
1661                         /* fifos can hold packets, ready for reading... */
1662                         if (likely(req)) {
1663                                 completed = read_fifo(ep, req);
1664                         } else
1665                                 pio_irq_disable (ep->bEndpointAddress);
1666                 }
1667                 ep->pio_irqs++;
1668         } while (completed);
1669 }
1670
1671 /*
1672  *      pxa25x_udc_irq - interrupt handler
1673  *
1674  * avoid delays in ep0 processing. the control handshaking isn't always
1675  * under software control (pxa250c0 and the pxa255 are better), and delays
1676  * could cause usb protocol errors.
1677  */
1678 static irqreturn_t
1679 pxa25x_udc_irq(int irq, void *_dev)
1680 {
1681         struct pxa25x_udc       *dev = _dev;
1682         int                     handled;
1683
1684         dev->stats.irqs++;
1685         do {
1686                 u32             udccr = UDCCR;
1687
1688                 handled = 0;
1689
1690                 /* SUSpend Interrupt Request */
1691                 if (unlikely(udccr & UDCCR_SUSIR)) {
1692                         udc_ack_int_UDCCR(UDCCR_SUSIR);
1693                         handled = 1;
1694                         DBG(DBG_VERBOSE, "USB suspend\n");
1695
1696                         if (dev->gadget.speed != USB_SPEED_UNKNOWN
1697                                         && dev->driver
1698                                         && dev->driver->suspend)
1699                                 dev->driver->suspend(&dev->gadget);
1700                         ep0_idle (dev);
1701                 }
1702
1703                 /* RESume Interrupt Request */
1704                 if (unlikely(udccr & UDCCR_RESIR)) {
1705                         udc_ack_int_UDCCR(UDCCR_RESIR);
1706                         handled = 1;
1707                         DBG(DBG_VERBOSE, "USB resume\n");
1708
1709                         if (dev->gadget.speed != USB_SPEED_UNKNOWN
1710                                         && dev->driver
1711                                         && dev->driver->resume)
1712                                 dev->driver->resume(&dev->gadget);
1713                 }
1714
1715                 /* ReSeT Interrupt Request - USB reset */
1716                 if (unlikely(udccr & UDCCR_RSTIR)) {
1717                         udc_ack_int_UDCCR(UDCCR_RSTIR);
1718                         handled = 1;
1719
1720                         if ((UDCCR & UDCCR_UDA) == 0) {
1721                                 DBG(DBG_VERBOSE, "USB reset start\n");
1722
1723                                 /* reset driver and endpoints,
1724                                  * in case that's not yet done
1725                                  */
1726                                 stop_activity (dev, dev->driver);
1727
1728                         } else {
1729                                 DBG(DBG_VERBOSE, "USB reset end\n");
1730                                 dev->gadget.speed = USB_SPEED_FULL;
1731                                 memset(&dev->stats, 0, sizeof dev->stats);
1732                                 /* driver and endpoints are still reset */
1733                         }
1734
1735                 } else {
1736                         u32     usir0 = USIR0 & ~UICR0;
1737                         u32     usir1 = USIR1 & ~UICR1;
1738                         int     i;
1739
1740                         if (unlikely (!usir0 && !usir1))
1741                                 continue;
1742
1743                         DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);
1744
1745                         /* control traffic */
1746                         if (usir0 & USIR0_IR0) {
1747                                 dev->ep[0].pio_irqs++;
1748                                 handle_ep0(dev);
1749                                 handled = 1;
1750                         }
1751
1752                         /* endpoint data transfers */
1753                         for (i = 0; i < 8; i++) {
1754                                 u32     tmp = 1 << i;
1755
1756                                 if (i && (usir0 & tmp)) {
1757                                         handle_ep(&dev->ep[i]);
1758                                         USIR0 |= tmp;
1759                                         handled = 1;
1760                                 }
1761 #ifndef CONFIG_USB_PXA25X_SMALL
1762                                 if (usir1 & tmp) {
1763                                         handle_ep(&dev->ep[i+8]);
1764                                         USIR1 |= tmp;
1765                                         handled = 1;
1766                                 }
1767 #endif
1768                         }
1769                 }
1770
1771                 /* we could also ask for 1 msec SOF (SIR) interrupts */
1772
1773         } while (handled);
1774         return IRQ_HANDLED;
1775 }
1776
1777 /*-------------------------------------------------------------------------*/
1778
1779 static void nop_release (struct device *dev)
1780 {
1781         DMSG("%s %s\n", __func__, dev_name(dev));
1782 }
1783
1784 /* this uses load-time allocation and initialization (instead of
1785  * doing it at run-time) to save code, eliminate fault paths, and
1786  * be more obviously correct.
1787  */
1788 static struct pxa25x_udc memory = {
1789         .gadget = {
1790                 .ops            = &pxa25x_udc_ops,
1791                 .ep0            = &memory.ep[0].ep,
1792                 .name           = driver_name,
1793                 .dev = {
1794                         .init_name      = "gadget",
1795                         .release        = nop_release,
1796                 },
1797         },
1798
1799         /* control endpoint */
1800         .ep[0] = {
1801                 .ep = {
1802                         .name           = ep0name,
1803                         .ops            = &pxa25x_ep_ops,
1804                         .maxpacket      = EP0_FIFO_SIZE,
1805                 },
1806                 .dev            = &memory,
1807                 .reg_udccs      = &UDCCS0,
1808                 .reg_uddr       = &UDDR0,
1809         },
1810
1811         /* first group of endpoints */
1812         .ep[1] = {
1813                 .ep = {
1814                         .name           = "ep1in-bulk",
1815                         .ops            = &pxa25x_ep_ops,
1816                         .maxpacket      = BULK_FIFO_SIZE,
1817                 },
1818                 .dev            = &memory,
1819                 .fifo_size      = BULK_FIFO_SIZE,
1820                 .bEndpointAddress = USB_DIR_IN | 1,
1821                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1822                 .reg_udccs      = &UDCCS1,
1823                 .reg_uddr       = &UDDR1,
1824         },
1825         .ep[2] = {
1826                 .ep = {
1827                         .name           = "ep2out-bulk",
1828                         .ops            = &pxa25x_ep_ops,
1829                         .maxpacket      = BULK_FIFO_SIZE,
1830                 },
1831                 .dev            = &memory,
1832                 .fifo_size      = BULK_FIFO_SIZE,
1833                 .bEndpointAddress = 2,
1834                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1835                 .reg_udccs      = &UDCCS2,
1836                 .reg_ubcr       = &UBCR2,
1837                 .reg_uddr       = &UDDR2,
1838         },
1839 #ifndef CONFIG_USB_PXA25X_SMALL
1840         .ep[3] = {
1841                 .ep = {
1842                         .name           = "ep3in-iso",
1843                         .ops            = &pxa25x_ep_ops,
1844                         .maxpacket      = ISO_FIFO_SIZE,
1845                 },
1846                 .dev            = &memory,
1847                 .fifo_size      = ISO_FIFO_SIZE,
1848                 .bEndpointAddress = USB_DIR_IN | 3,
1849                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1850                 .reg_udccs      = &UDCCS3,
1851                 .reg_uddr       = &UDDR3,
1852         },
1853         .ep[4] = {
1854                 .ep = {
1855                         .name           = "ep4out-iso",
1856                         .ops            = &pxa25x_ep_ops,
1857                         .maxpacket      = ISO_FIFO_SIZE,
1858                 },
1859                 .dev            = &memory,
1860                 .fifo_size      = ISO_FIFO_SIZE,
1861                 .bEndpointAddress = 4,
1862                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1863                 .reg_udccs      = &UDCCS4,
1864                 .reg_ubcr       = &UBCR4,
1865                 .reg_uddr       = &UDDR4,
1866         },
1867         .ep[5] = {
1868                 .ep = {
1869                         .name           = "ep5in-int",
1870                         .ops            = &pxa25x_ep_ops,
1871                         .maxpacket      = INT_FIFO_SIZE,
1872                 },
1873                 .dev            = &memory,
1874                 .fifo_size      = INT_FIFO_SIZE,
1875                 .bEndpointAddress = USB_DIR_IN | 5,
1876                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
1877                 .reg_udccs      = &UDCCS5,
1878                 .reg_uddr       = &UDDR5,
1879         },
1880
1881         /* second group of endpoints */
1882         .ep[6] = {
1883                 .ep = {
1884                         .name           = "ep6in-bulk",
1885                         .ops            = &pxa25x_ep_ops,
1886                         .maxpacket      = BULK_FIFO_SIZE,
1887                 },
1888                 .dev            = &memory,
1889                 .fifo_size      = BULK_FIFO_SIZE,
1890                 .bEndpointAddress = USB_DIR_IN | 6,
1891                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1892                 .reg_udccs      = &UDCCS6,
1893                 .reg_uddr       = &UDDR6,
1894         },
1895         .ep[7] = {
1896                 .ep = {
1897                         .name           = "ep7out-bulk",
1898                         .ops            = &pxa25x_ep_ops,
1899                         .maxpacket      = BULK_FIFO_SIZE,
1900                 },
1901                 .dev            = &memory,
1902                 .fifo_size      = BULK_FIFO_SIZE,
1903                 .bEndpointAddress = 7,
1904                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1905                 .reg_udccs      = &UDCCS7,
1906                 .reg_ubcr       = &UBCR7,
1907                 .reg_uddr       = &UDDR7,
1908         },
1909         .ep[8] = {
1910                 .ep = {
1911                         .name           = "ep8in-iso",
1912                         .ops            = &pxa25x_ep_ops,
1913                         .maxpacket      = ISO_FIFO_SIZE,
1914                 },
1915                 .dev            = &memory,
1916                 .fifo_size      = ISO_FIFO_SIZE,
1917                 .bEndpointAddress = USB_DIR_IN | 8,
1918                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1919                 .reg_udccs      = &UDCCS8,
1920                 .reg_uddr       = &UDDR8,
1921         },
1922         .ep[9] = {
1923                 .ep = {
1924                         .name           = "ep9out-iso",
1925                         .ops            = &pxa25x_ep_ops,
1926                         .maxpacket      = ISO_FIFO_SIZE,
1927                 },
1928                 .dev            = &memory,
1929                 .fifo_size      = ISO_FIFO_SIZE,
1930                 .bEndpointAddress = 9,
1931                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1932                 .reg_udccs      = &UDCCS9,
1933                 .reg_ubcr       = &UBCR9,
1934                 .reg_uddr       = &UDDR9,
1935         },
1936         .ep[10] = {
1937                 .ep = {
1938                         .name           = "ep10in-int",
1939                         .ops            = &pxa25x_ep_ops,
1940                         .maxpacket      = INT_FIFO_SIZE,
1941                 },
1942                 .dev            = &memory,
1943                 .fifo_size      = INT_FIFO_SIZE,
1944                 .bEndpointAddress = USB_DIR_IN | 10,
1945                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
1946                 .reg_udccs      = &UDCCS10,
1947                 .reg_uddr       = &UDDR10,
1948         },
1949
1950         /* third group of endpoints */
1951         .ep[11] = {
1952                 .ep = {
1953                         .name           = "ep11in-bulk",
1954                         .ops            = &pxa25x_ep_ops,
1955                         .maxpacket      = BULK_FIFO_SIZE,
1956                 },
1957                 .dev            = &memory,
1958                 .fifo_size      = BULK_FIFO_SIZE,
1959                 .bEndpointAddress = USB_DIR_IN | 11,
1960                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1961                 .reg_udccs      = &UDCCS11,
1962                 .reg_uddr       = &UDDR11,
1963         },
1964         .ep[12] = {
1965                 .ep = {
1966                         .name           = "ep12out-bulk",
1967                         .ops            = &pxa25x_ep_ops,
1968                         .maxpacket      = BULK_FIFO_SIZE,
1969                 },
1970                 .dev            = &memory,
1971                 .fifo_size      = BULK_FIFO_SIZE,
1972                 .bEndpointAddress = 12,
1973                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1974                 .reg_udccs      = &UDCCS12,
1975                 .reg_ubcr       = &UBCR12,
1976                 .reg_uddr       = &UDDR12,
1977         },
1978         .ep[13] = {
1979                 .ep = {
1980                         .name           = "ep13in-iso",
1981                         .ops            = &pxa25x_ep_ops,
1982                         .maxpacket      = ISO_FIFO_SIZE,
1983                 },
1984                 .dev            = &memory,
1985                 .fifo_size      = ISO_FIFO_SIZE,
1986                 .bEndpointAddress = USB_DIR_IN | 13,
1987                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1988                 .reg_udccs      = &UDCCS13,
1989                 .reg_uddr       = &UDDR13,
1990         },
1991         .ep[14] = {
1992                 .ep = {
1993                         .name           = "ep14out-iso",
1994                         .ops            = &pxa25x_ep_ops,
1995                         .maxpacket      = ISO_FIFO_SIZE,
1996                 },
1997                 .dev            = &memory,
1998                 .fifo_size      = ISO_FIFO_SIZE,
1999                 .bEndpointAddress = 14,
2000                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
2001                 .reg_udccs      = &UDCCS14,
2002                 .reg_ubcr       = &UBCR14,
2003                 .reg_uddr       = &UDDR14,
2004         },
2005         .ep[15] = {
2006                 .ep = {
2007                         .name           = "ep15in-int",
2008                         .ops            = &pxa25x_ep_ops,
2009                         .maxpacket      = INT_FIFO_SIZE,
2010                 },
2011                 .dev            = &memory,
2012                 .fifo_size      = INT_FIFO_SIZE,
2013                 .bEndpointAddress = USB_DIR_IN | 15,
2014                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
2015                 .reg_udccs      = &UDCCS15,
2016                 .reg_uddr       = &UDDR15,
2017         },
2018 #endif /* !CONFIG_USB_PXA25X_SMALL */
2019 };
2020
2021 #define CP15R0_VENDOR_MASK      0xffffe000
2022
2023 #if     defined(CONFIG_ARCH_PXA)
2024 #define CP15R0_XSCALE_VALUE     0x69052000      /* intel/arm/xscale */
2025
2026 #elif   defined(CONFIG_ARCH_IXP4XX)
2027 #define CP15R0_XSCALE_VALUE     0x69054000      /* intel/arm/ixp4xx */
2028
2029 #endif
2030
2031 #define CP15R0_PROD_MASK        0x000003f0
2032 #define PXA25x                  0x00000100      /* and PXA26x */
2033 #define PXA210                  0x00000120
2034
2035 #define CP15R0_REV_MASK         0x0000000f
2036
2037 #define CP15R0_PRODREV_MASK     (CP15R0_PROD_MASK | CP15R0_REV_MASK)
2038
2039 #define PXA255_A0               0x00000106      /* or PXA260_B1 */
2040 #define PXA250_C0               0x00000105      /* or PXA26x_B0 */
2041 #define PXA250_B2               0x00000104
2042 #define PXA250_B1               0x00000103      /* or PXA260_A0 */
2043 #define PXA250_B0               0x00000102
2044 #define PXA250_A1               0x00000101
2045 #define PXA250_A0               0x00000100
2046
2047 #define PXA210_C0               0x00000125
2048 #define PXA210_B2               0x00000124
2049 #define PXA210_B1               0x00000123
2050 #define PXA210_B0               0x00000122
2051 #define IXP425_A0               0x000001c1
2052 #define IXP425_B0               0x000001f1
2053 #define IXP465_AD               0x00000200
2054
2055 /*
2056  *      probe - binds to the platform device
2057  */
2058 static int pxa25x_udc_probe(struct platform_device *pdev)
2059 {
2060         struct pxa25x_udc *dev = &memory;
2061         int retval, irq;
2062         u32 chiprev;
2063
2064         pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);
2065
2066         /* insist on Intel/ARM/XScale */
2067         asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
2068         if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
2069                 pr_err("%s: not XScale!\n", driver_name);
2070                 return -ENODEV;
2071         }
2072
2073         /* trigger chiprev-specific logic */
2074         switch (chiprev & CP15R0_PRODREV_MASK) {
2075 #if     defined(CONFIG_ARCH_PXA)
2076         case PXA255_A0:
2077                 dev->has_cfr = 1;
2078                 break;
2079         case PXA250_A0:
2080         case PXA250_A1:
2081                 /* A0/A1 "not released"; ep 13, 15 unusable */
2082                 /* fall through */
2083         case PXA250_B2: case PXA210_B2:
2084         case PXA250_B1: case PXA210_B1:
2085         case PXA250_B0: case PXA210_B0:
2086                 /* OUT-DMA is broken ... */
2087                 /* fall through */
2088         case PXA250_C0: case PXA210_C0:
2089                 break;
2090 #elif   defined(CONFIG_ARCH_IXP4XX)
2091         case IXP425_A0:
2092         case IXP425_B0:
2093         case IXP465_AD:
2094                 dev->has_cfr = 1;
2095                 break;
2096 #endif
2097         default:
2098                 pr_err("%s: unrecognized processor: %08x\n",
2099                         driver_name, chiprev);
2100                 /* iop3xx, ixp4xx, ... */
2101                 return -ENODEV;
2102         }
2103
2104         irq = platform_get_irq(pdev, 0);
2105         if (irq < 0)
2106                 return -ENODEV;
2107
2108         dev->clk = clk_get(&pdev->dev, NULL);
2109         if (IS_ERR(dev->clk)) {
2110                 retval = PTR_ERR(dev->clk);
2111                 goto err_clk;
2112         }
2113
2114         pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,
2115                 dev->has_cfr ? "" : " (!cfr)",
2116                 SIZE_STR "(pio)"
2117                 );
2118
2119         /* other non-static parts of init */
2120         dev->dev = &pdev->dev;
2121         dev->mach = dev_get_platdata(&pdev->dev);
2122
2123         dev->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
2124
2125         if (gpio_is_valid(dev->mach->gpio_pullup)) {
2126                 if ((retval = gpio_request(dev->mach->gpio_pullup,
2127                                 "pca25x_udc GPIO PULLUP"))) {
2128                         dev_dbg(&pdev->dev,
2129                                 "can't get pullup gpio %d, err: %d\n",
2130                                 dev->mach->gpio_pullup, retval);
2131                         goto err_gpio_pullup;
2132                 }
2133                 gpio_direction_output(dev->mach->gpio_pullup, 0);
2134         }
2135
2136         init_timer(&dev->timer);
2137         dev->timer.function = udc_watchdog;
2138         dev->timer.data = (unsigned long) dev;
2139
2140         the_controller = dev;
2141         platform_set_drvdata(pdev, dev);
2142
2143         udc_disable(dev);
2144         udc_reinit(dev);
2145
2146         dev->vbus = 0;
2147
2148         /* irq setup after old hardware state is cleaned up */
2149         retval = request_irq(irq, pxa25x_udc_irq,
2150                         0, driver_name, dev);
2151         if (retval != 0) {
2152                 pr_err("%s: can't get irq %d, err %d\n",
2153                         driver_name, irq, retval);
2154                 goto err_irq1;
2155         }
2156         dev->got_irq = 1;
2157
2158 #ifdef CONFIG_ARCH_LUBBOCK
2159         if (machine_is_lubbock()) {
2160                 retval = request_irq(LUBBOCK_USB_DISC_IRQ, lubbock_vbus_irq,
2161                                      0, driver_name, dev);
2162                 if (retval != 0) {
2163                         pr_err("%s: can't get irq %i, err %d\n",
2164                                 driver_name, LUBBOCK_USB_DISC_IRQ, retval);
2165                         goto err_irq_lub;
2166                 }
2167                 retval = request_irq(LUBBOCK_USB_IRQ, lubbock_vbus_irq,
2168                                      0, driver_name, dev);
2169                 if (retval != 0) {
2170                         pr_err("%s: can't get irq %i, err %d\n",
2171                                 driver_name, LUBBOCK_USB_IRQ, retval);
2172                         goto lubbock_fail0;
2173                 }
2174         } else
2175 #endif
2176         create_debug_files(dev);
2177
2178         retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget);
2179         if (!retval)
2180                 return retval;
2181
2182         remove_debug_files(dev);
2183 #ifdef  CONFIG_ARCH_LUBBOCK
2184 lubbock_fail0:
2185         free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2186  err_irq_lub:
2187         free_irq(irq, dev);
2188 #endif
2189  err_irq1:
2190         if (gpio_is_valid(dev->mach->gpio_pullup))
2191                 gpio_free(dev->mach->gpio_pullup);
2192  err_gpio_pullup:
2193         if (!IS_ERR_OR_NULL(dev->transceiver)) {
2194                 usb_put_phy(dev->transceiver);
2195                 dev->transceiver = NULL;
2196         }
2197         clk_put(dev->clk);
2198  err_clk:
2199         return retval;
2200 }
2201
2202 static void pxa25x_udc_shutdown(struct platform_device *_dev)
2203 {
2204         pullup_off();
2205 }
2206
2207 static int pxa25x_udc_remove(struct platform_device *pdev)
2208 {
2209         struct pxa25x_udc *dev = platform_get_drvdata(pdev);
2210
2211         if (dev->driver)
2212                 return -EBUSY;
2213
2214         usb_del_gadget_udc(&dev->gadget);
2215         dev->pullup = 0;
2216         pullup(dev);
2217
2218         remove_debug_files(dev);
2219
2220         if (dev->got_irq) {
2221                 free_irq(platform_get_irq(pdev, 0), dev);
2222                 dev->got_irq = 0;
2223         }
2224 #ifdef CONFIG_ARCH_LUBBOCK
2225         if (machine_is_lubbock()) {
2226                 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2227                 free_irq(LUBBOCK_USB_IRQ, dev);
2228         }
2229 #endif
2230         if (gpio_is_valid(dev->mach->gpio_pullup))
2231                 gpio_free(dev->mach->gpio_pullup);
2232
2233         clk_put(dev->clk);
2234
2235         if (!IS_ERR_OR_NULL(dev->transceiver)) {
2236                 usb_put_phy(dev->transceiver);
2237                 dev->transceiver = NULL;
2238         }
2239
2240         the_controller = NULL;
2241         return 0;
2242 }
2243
2244 /*-------------------------------------------------------------------------*/
2245
2246 #ifdef  CONFIG_PM
2247
2248 /* USB suspend (controlled by the host) and system suspend (controlled
2249  * by the PXA) don't necessarily work well together.  If USB is active,
2250  * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2251  * mode, or any deeper PM saving state.
2252  *
2253  * For now, we punt and forcibly disconnect from the USB host when PXA
2254  * enters any suspend state.  While we're disconnected, we always disable
2255  * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2256  * Boards without software pullup control shouldn't use those states.
2257  * VBUS IRQs should probably be ignored so that the PXA device just acts
2258  * "dead" to USB hosts until system resume.
2259  */
2260 static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state)
2261 {
2262         struct pxa25x_udc       *udc = platform_get_drvdata(dev);
2263         unsigned long flags;
2264
2265         if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
2266                 WARNING("USB host won't detect disconnect!\n");
2267         udc->suspended = 1;
2268
2269         local_irq_save(flags);
2270         pullup(udc);
2271         local_irq_restore(flags);
2272
2273         return 0;
2274 }
2275
2276 static int pxa25x_udc_resume(struct platform_device *dev)
2277 {
2278         struct pxa25x_udc       *udc = platform_get_drvdata(dev);
2279         unsigned long flags;
2280
2281         udc->suspended = 0;
2282         local_irq_save(flags);
2283         pullup(udc);
2284         local_irq_restore(flags);
2285
2286         return 0;
2287 }
2288
2289 #else
2290 #define pxa25x_udc_suspend      NULL
2291 #define pxa25x_udc_resume       NULL
2292 #endif
2293
2294 /*-------------------------------------------------------------------------*/
2295
2296 static struct platform_driver udc_driver = {
2297         .shutdown       = pxa25x_udc_shutdown,
2298         .probe          = pxa25x_udc_probe,
2299         .remove         = pxa25x_udc_remove,
2300         .suspend        = pxa25x_udc_suspend,
2301         .resume         = pxa25x_udc_resume,
2302         .driver         = {
2303                 .owner  = THIS_MODULE,
2304                 .name   = "pxa25x-udc",
2305         },
2306 };
2307
2308 module_platform_driver(udc_driver);
2309
2310 MODULE_DESCRIPTION(DRIVER_DESC);
2311 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2312 MODULE_LICENSE("GPL");
2313 MODULE_ALIAS("platform:pxa25x-udc");