2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
21 * Purpose: driver entry for initial, open, close, tx and rx.
29 * vt6655_probe - module initial (insmod) driver entry
30 * vt6655_remove - module remove entry
31 * vt6655_init_info - device structure resource allocation function
32 * device_free_info - device structure resource free function
33 * device_get_pci_info - get allocated pci io/mem resource
34 * device_print_info - print out resource
35 * device_rx_srv - rx service function
36 * device_alloc_rx_buf - rx buffer pre-allocated function
37 * device_free_tx_buf - free tx buffer function
38 * device_init_rd0_ring- initial rd dma0 ring
39 * device_init_rd1_ring- initial rd dma1 ring
40 * device_init_td0_ring- initial tx dma0 ring buffer
41 * device_init_td1_ring- initial tx dma1 ring buffer
42 * device_init_registers- initial MAC & BBP & RF internal registers.
43 * device_init_rings- initial tx/rx ring buffer
44 * device_free_rings- free all allocated ring buffer
45 * device_tx_srv- tx interrupt service function
51 #include <linux/file.h>
61 #include <linux/delay.h>
62 #include <linux/kthread.h>
63 #include <linux/slab.h>
65 /*--------------------- Static Definitions -------------------------*/
67 * Define module options
69 MODULE_AUTHOR("VIA Networking Technologies, Inc., <lyndonchen@vntek.com.tw>");
70 MODULE_LICENSE("GPL");
71 MODULE_DESCRIPTION("VIA Networking Solomon-A/B/G Wireless LAN Adapter Driver");
73 #define DEVICE_PARAM(N, D)
75 #define RX_DESC_MIN0 16
76 #define RX_DESC_MAX0 128
77 #define RX_DESC_DEF0 32
78 DEVICE_PARAM(RxDescriptors0, "Number of receive descriptors0");
80 #define RX_DESC_MIN1 16
81 #define RX_DESC_MAX1 128
82 #define RX_DESC_DEF1 32
83 DEVICE_PARAM(RxDescriptors1, "Number of receive descriptors1");
85 #define TX_DESC_MIN0 16
86 #define TX_DESC_MAX0 128
87 #define TX_DESC_DEF0 32
88 DEVICE_PARAM(TxDescriptors0, "Number of transmit descriptors0");
90 #define TX_DESC_MIN1 16
91 #define TX_DESC_MAX1 128
92 #define TX_DESC_DEF1 64
93 DEVICE_PARAM(TxDescriptors1, "Number of transmit descriptors1");
95 #define INT_WORKS_DEF 20
96 #define INT_WORKS_MIN 10
97 #define INT_WORKS_MAX 64
99 DEVICE_PARAM(int_works, "Number of packets per interrupt services");
101 #define RTS_THRESH_DEF 2347
103 #define FRAG_THRESH_DEF 2346
105 #define SHORT_RETRY_MIN 0
106 #define SHORT_RETRY_MAX 31
107 #define SHORT_RETRY_DEF 8
109 DEVICE_PARAM(ShortRetryLimit, "Short frame retry limits");
111 #define LONG_RETRY_MIN 0
112 #define LONG_RETRY_MAX 15
113 #define LONG_RETRY_DEF 4
115 DEVICE_PARAM(LongRetryLimit, "long frame retry limits");
117 /* BasebandType[] baseband type selected
118 0: indicate 802.11a type
119 1: indicate 802.11b type
120 2: indicate 802.11g type
122 #define BBP_TYPE_MIN 0
123 #define BBP_TYPE_MAX 2
124 #define BBP_TYPE_DEF 2
126 DEVICE_PARAM(BasebandType, "baseband type");
129 * Static vars definitions
131 static CHIP_INFO chip_info_table[] = {
132 { VT3253, "VIA Networking Solomon-A/B/G Wireless LAN Adapter ",
133 256, 1, DEVICE_FLAGS_IP_ALIGN|DEVICE_FLAGS_TX_ALIGN },
137 static const struct pci_device_id vt6655_pci_id_table[] = {
138 { PCI_VDEVICE(VIA, 0x3253), (kernel_ulong_t)chip_info_table},
142 /*--------------------- Static Functions --------------------------*/
144 static int vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent);
145 static void vt6655_init_info(struct pci_dev *pcid,
146 struct vnt_private **ppDevice, PCHIP_INFO);
147 static void device_free_info(struct vnt_private *pDevice);
148 static bool device_get_pci_info(struct vnt_private *, struct pci_dev *pcid);
149 static void device_print_info(struct vnt_private *pDevice);
151 static void device_init_rd0_ring(struct vnt_private *pDevice);
152 static void device_init_rd1_ring(struct vnt_private *pDevice);
153 static void device_init_td0_ring(struct vnt_private *pDevice);
154 static void device_init_td1_ring(struct vnt_private *pDevice);
156 static int device_rx_srv(struct vnt_private *pDevice, unsigned int uIdx);
157 static int device_tx_srv(struct vnt_private *pDevice, unsigned int uIdx);
158 static bool device_alloc_rx_buf(struct vnt_private *pDevice, PSRxDesc pDesc);
159 static void device_init_registers(struct vnt_private *pDevice);
160 static void device_free_tx_buf(struct vnt_private *pDevice, PSTxDesc pDesc);
161 static void device_free_td0_ring(struct vnt_private *pDevice);
162 static void device_free_td1_ring(struct vnt_private *pDevice);
163 static void device_free_rd0_ring(struct vnt_private *pDevice);
164 static void device_free_rd1_ring(struct vnt_private *pDevice);
165 static void device_free_rings(struct vnt_private *pDevice);
167 /*--------------------- Export Variables --------------------------*/
169 /*--------------------- Export Functions --------------------------*/
171 static char *get_chip_name(int chip_id)
175 for (i = 0; chip_info_table[i].name != NULL; i++)
176 if (chip_info_table[i].chip_id == chip_id)
178 return chip_info_table[i].name;
181 static void vt6655_remove(struct pci_dev *pcid)
183 struct vnt_private *pDevice = pci_get_drvdata(pcid);
187 device_free_info(pDevice);
190 static void device_get_options(struct vnt_private *pDevice)
192 POPTIONS pOpts = &(pDevice->sOpts);
194 pOpts->nRxDescs0 = RX_DESC_DEF0;
195 pOpts->nRxDescs1 = RX_DESC_DEF1;
196 pOpts->nTxDescs[0] = TX_DESC_DEF0;
197 pOpts->nTxDescs[1] = TX_DESC_DEF1;
198 pOpts->int_works = INT_WORKS_DEF;
200 pOpts->short_retry = SHORT_RETRY_DEF;
201 pOpts->long_retry = LONG_RETRY_DEF;
202 pOpts->bbp_type = BBP_TYPE_DEF;
206 device_set_options(struct vnt_private *pDevice)
208 pDevice->byShortRetryLimit = pDevice->sOpts.short_retry;
209 pDevice->byLongRetryLimit = pDevice->sOpts.long_retry;
210 pDevice->byBBType = pDevice->sOpts.bbp_type;
211 pDevice->byPacketType = pDevice->byBBType;
212 pDevice->byAutoFBCtrl = AUTO_FB_0;
213 pDevice->bUpdateBBVGA = true;
214 pDevice->byPreambleType = 0;
216 pr_debug(" byShortRetryLimit= %d\n", (int)pDevice->byShortRetryLimit);
217 pr_debug(" byLongRetryLimit= %d\n", (int)pDevice->byLongRetryLimit);
218 pr_debug(" byPreambleType= %d\n", (int)pDevice->byPreambleType);
219 pr_debug(" byShortPreamble= %d\n", (int)pDevice->byShortPreamble);
220 pr_debug(" byBBType= %d\n", (int)pDevice->byBBType);
224 * Initialisation of MAC & BBP registers
227 static void device_init_registers(struct vnt_private *pDevice)
231 unsigned char byValue;
232 unsigned char byCCKPwrdBm = 0;
233 unsigned char byOFDMPwrdBm = 0;
235 MACbShutdown(pDevice->PortOffset);
236 BBvSoftwareReset(pDevice);
238 /* Do MACbSoftwareReset in MACvInitialize */
239 MACbSoftwareReset(pDevice->PortOffset);
241 pDevice->bAES = false;
243 /* Only used in 11g type, sync with ERP IE */
244 pDevice->bProtectMode = false;
246 pDevice->bNonERPPresent = false;
247 pDevice->bBarkerPreambleMd = false;
248 pDevice->wCurrentRate = RATE_1M;
249 pDevice->byTopOFDMBasicRate = RATE_24M;
250 pDevice->byTopCCKBasicRate = RATE_1M;
252 /* Target to IF pin while programming to RF chip. */
253 pDevice->byRevId = 0;
256 MACvInitialize(pDevice->PortOffset);
259 VNSvInPortB(pDevice->PortOffset + MAC_REG_LOCALID, &pDevice->byLocalID);
261 spin_lock_irqsave(&pDevice->lock, flags);
263 SROMvReadAllContents(pDevice->PortOffset, pDevice->abyEEPROM);
265 spin_unlock_irqrestore(&pDevice->lock, flags);
267 /* Get Channel range */
268 pDevice->byMinChannel = 1;
269 pDevice->byMaxChannel = CB_MAX_CHANNEL;
272 byValue = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_ANTENNA);
273 if (byValue & EEP_ANTINV)
274 pDevice->bTxRxAntInv = true;
276 pDevice->bTxRxAntInv = false;
278 byValue &= (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
279 /* if not set default is All */
281 byValue = (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN);
283 if (byValue == (EEP_ANTENNA_AUX | EEP_ANTENNA_MAIN)) {
284 pDevice->byAntennaCount = 2;
285 pDevice->byTxAntennaMode = ANT_B;
286 pDevice->dwTxAntennaSel = 1;
287 pDevice->dwRxAntennaSel = 1;
289 if (pDevice->bTxRxAntInv)
290 pDevice->byRxAntennaMode = ANT_A;
292 pDevice->byRxAntennaMode = ANT_B;
294 pDevice->byAntennaCount = 1;
295 pDevice->dwTxAntennaSel = 0;
296 pDevice->dwRxAntennaSel = 0;
298 if (byValue & EEP_ANTENNA_AUX) {
299 pDevice->byTxAntennaMode = ANT_A;
301 if (pDevice->bTxRxAntInv)
302 pDevice->byRxAntennaMode = ANT_B;
304 pDevice->byRxAntennaMode = ANT_A;
306 pDevice->byTxAntennaMode = ANT_B;
308 if (pDevice->bTxRxAntInv)
309 pDevice->byRxAntennaMode = ANT_A;
311 pDevice->byRxAntennaMode = ANT_B;
315 /* Set initial antenna mode */
316 BBvSetTxAntennaMode(pDevice, pDevice->byTxAntennaMode);
317 BBvSetRxAntennaMode(pDevice, pDevice->byRxAntennaMode);
319 /* zonetype initial */
320 pDevice->byOriginalZonetype = pDevice->abyEEPROM[EEP_OFS_ZONETYPE];
322 if (!pDevice->bZoneRegExist)
323 pDevice->byZoneType = pDevice->abyEEPROM[EEP_OFS_ZONETYPE];
325 pr_debug("pDevice->byZoneType = %x\n", pDevice->byZoneType);
330 /* Get Desire Power Value */
331 pDevice->byCurPwr = 0xFF;
332 pDevice->byCCKPwr = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_PWR_CCK);
333 pDevice->byOFDMPwrG = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_PWR_OFDMG);
335 /* Load power Table */
336 for (ii = 0; ii < CB_MAX_CHANNEL_24G; ii++) {
337 pDevice->abyCCKPwrTbl[ii + 1] =
338 SROMbyReadEmbedded(pDevice->PortOffset,
339 (unsigned char)(ii + EEP_OFS_CCK_PWR_TBL));
340 if (pDevice->abyCCKPwrTbl[ii + 1] == 0)
341 pDevice->abyCCKPwrTbl[ii+1] = pDevice->byCCKPwr;
343 pDevice->abyOFDMPwrTbl[ii + 1] =
344 SROMbyReadEmbedded(pDevice->PortOffset,
345 (unsigned char)(ii + EEP_OFS_OFDM_PWR_TBL));
346 if (pDevice->abyOFDMPwrTbl[ii + 1] == 0)
347 pDevice->abyOFDMPwrTbl[ii + 1] = pDevice->byOFDMPwrG;
349 pDevice->abyCCKDefaultPwr[ii + 1] = byCCKPwrdBm;
350 pDevice->abyOFDMDefaultPwr[ii + 1] = byOFDMPwrdBm;
353 /* recover 12,13 ,14channel for EUROPE by 11 channel */
354 for (ii = 11; ii < 14; ii++) {
355 pDevice->abyCCKPwrTbl[ii] = pDevice->abyCCKPwrTbl[10];
356 pDevice->abyOFDMPwrTbl[ii] = pDevice->abyOFDMPwrTbl[10];
359 /* Load OFDM A Power Table */
360 for (ii = 0; ii < CB_MAX_CHANNEL_5G; ii++) {
361 pDevice->abyOFDMPwrTbl[ii + CB_MAX_CHANNEL_24G + 1] =
362 SROMbyReadEmbedded(pDevice->PortOffset,
363 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_TBL));
365 pDevice->abyOFDMDefaultPwr[ii + CB_MAX_CHANNEL_24G + 1] =
366 SROMbyReadEmbedded(pDevice->PortOffset,
367 (unsigned char)(ii + EEP_OFS_OFDMA_PWR_dBm));
370 if (pDevice->byLocalID > REV_ID_VT3253_B1) {
371 MACvSelectPage1(pDevice->PortOffset);
373 VNSvOutPortB(pDevice->PortOffset + MAC_REG_MSRCTL + 1,
374 (MSRCTL1_TXPWR | MSRCTL1_CSAPAREN));
376 MACvSelectPage0(pDevice->PortOffset);
379 /* use relative tx timeout and 802.11i D4 */
380 MACvWordRegBitsOn(pDevice->PortOffset,
381 MAC_REG_CFG, (CFG_TKIPOPT | CFG_NOTXTIMEOUT));
383 /* set performance parameter by registry */
384 MACvSetShortRetryLimit(pDevice->PortOffset, pDevice->byShortRetryLimit);
385 MACvSetLongRetryLimit(pDevice->PortOffset, pDevice->byLongRetryLimit);
387 /* reset TSF counter */
388 VNSvOutPortB(pDevice->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
389 /* enable TSF counter */
390 VNSvOutPortB(pDevice->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
392 /* initialize BBP registers */
393 BBbVT3253Init(pDevice);
395 if (pDevice->bUpdateBBVGA) {
396 pDevice->byBBVGACurrent = pDevice->abyBBVGA[0];
397 pDevice->byBBVGANew = pDevice->byBBVGACurrent;
398 BBvSetVGAGainOffset(pDevice, pDevice->abyBBVGA[0]);
401 BBvSetRxAntennaMode(pDevice, pDevice->byRxAntennaMode);
402 BBvSetTxAntennaMode(pDevice, pDevice->byTxAntennaMode);
404 /* Set BB and packet type at the same time. */
405 /* Set Short Slot Time, xIFS, and RSPINF. */
406 pDevice->wCurrentRate = RATE_54M;
408 pDevice->bRadioOff = false;
410 pDevice->byRadioCtl = SROMbyReadEmbedded(pDevice->PortOffset,
412 pDevice->bHWRadioOff = false;
414 if (pDevice->byRadioCtl & EEP_RADIOCTL_ENABLE) {
416 MACvGPIOIn(pDevice->PortOffset, &pDevice->byGPIO);
418 if (((pDevice->byGPIO & GPIO0_DATA) &&
419 !(pDevice->byRadioCtl & EEP_RADIOCTL_INV)) ||
420 (!(pDevice->byGPIO & GPIO0_DATA) &&
421 (pDevice->byRadioCtl & EEP_RADIOCTL_INV)))
422 pDevice->bHWRadioOff = true;
425 if (pDevice->bHWRadioOff || pDevice->bRadioControlOff)
426 CARDbRadioPowerOff(pDevice);
428 /* get Permanent network address */
429 SROMvReadEtherAddress(pDevice->PortOffset, pDevice->abyCurrentNetAddr);
430 pr_debug("Network address = %pM\n", pDevice->abyCurrentNetAddr);
432 /* reset Tx pointer */
433 CARDvSafeResetRx(pDevice);
434 /* reset Rx pointer */
435 CARDvSafeResetTx(pDevice);
437 if (pDevice->byLocalID <= REV_ID_VT3253_A1)
438 MACvRegBitsOn(pDevice->PortOffset, MAC_REG_RCR, RCR_WPAERR);
441 MACvReceive0(pDevice->PortOffset);
442 MACvReceive1(pDevice->PortOffset);
444 /* start the adapter */
445 MACvStart(pDevice->PortOffset);
448 static void device_print_info(struct vnt_private *pDevice)
450 dev_info(&pDevice->pcid->dev, "%s\n", get_chip_name(pDevice->chip_id));
452 dev_info(&pDevice->pcid->dev, "MAC=%pM IO=0x%lx Mem=0x%lx IRQ=%d\n",
453 pDevice->abyCurrentNetAddr, (unsigned long)pDevice->ioaddr,
454 (unsigned long)pDevice->PortOffset, pDevice->pcid->irq);
457 static void vt6655_init_info(struct pci_dev *pcid,
458 struct vnt_private **ppDevice,
459 PCHIP_INFO pChip_info)
461 memset(*ppDevice, 0, sizeof(**ppDevice));
463 (*ppDevice)->pcid = pcid;
464 (*ppDevice)->chip_id = pChip_info->chip_id;
465 (*ppDevice)->io_size = pChip_info->io_size;
466 (*ppDevice)->nTxQueues = pChip_info->nTxQueue;
467 (*ppDevice)->multicast_limit = 32;
469 spin_lock_init(&((*ppDevice)->lock));
472 static bool device_get_pci_info(struct vnt_private *pDevice,
473 struct pci_dev *pcid)
477 unsigned int cis_addr;
479 pci_read_config_byte(pcid, PCI_REVISION_ID, &pDevice->byRevId);
480 pci_read_config_word(pcid, PCI_SUBSYSTEM_ID, &pDevice->SubSystemID);
481 pci_read_config_word(pcid, PCI_SUBSYSTEM_VENDOR_ID, &pDevice->SubVendorID);
482 pci_read_config_word(pcid, PCI_COMMAND, (u16 *)&(pci_cmd));
484 pci_set_master(pcid);
486 pDevice->memaddr = pci_resource_start(pcid, 0);
487 pDevice->ioaddr = pci_resource_start(pcid, 1);
489 cis_addr = pci_resource_start(pcid, 2);
491 pDevice->pcid = pcid;
493 pci_read_config_byte(pcid, PCI_COMMAND, &b);
494 pci_write_config_byte(pcid, PCI_COMMAND, (b|PCI_COMMAND_MASTER));
499 static void device_free_info(struct vnt_private *pDevice)
505 ieee80211_unregister_hw(pDevice->hw);
507 if (pDevice->PortOffset)
508 iounmap(pDevice->PortOffset);
511 pci_release_regions(pDevice->pcid);
514 ieee80211_free_hw(pDevice->hw);
517 static bool device_init_rings(struct vnt_private *pDevice)
521 /*allocate all RD/TD rings a single pool*/
522 vir_pool = dma_zalloc_coherent(&pDevice->pcid->dev,
523 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
524 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
525 pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
526 pDevice->sOpts.nTxDescs[1] * sizeof(STxDesc),
527 &pDevice->pool_dma, GFP_ATOMIC);
528 if (vir_pool == NULL) {
529 dev_err(&pDevice->pcid->dev, "allocate desc dma memory failed\n");
533 pDevice->aRD0Ring = vir_pool;
534 pDevice->aRD1Ring = vir_pool +
535 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc);
537 pDevice->rd0_pool_dma = pDevice->pool_dma;
538 pDevice->rd1_pool_dma = pDevice->rd0_pool_dma +
539 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc);
541 pDevice->tx0_bufs = dma_zalloc_coherent(&pDevice->pcid->dev,
542 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ +
543 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ +
546 &pDevice->tx_bufs_dma0,
548 if (pDevice->tx0_bufs == NULL) {
549 dev_err(&pDevice->pcid->dev, "allocate buf dma memory failed\n");
551 dma_free_coherent(&pDevice->pcid->dev,
552 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
553 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
554 pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
555 pDevice->sOpts.nTxDescs[1] * sizeof(STxDesc),
556 vir_pool, pDevice->pool_dma
561 pDevice->td0_pool_dma = pDevice->rd1_pool_dma +
562 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc);
564 pDevice->td1_pool_dma = pDevice->td0_pool_dma +
565 pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc);
567 /* vir_pool: pvoid type */
568 pDevice->apTD0Rings = vir_pool
569 + pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc)
570 + pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc);
572 pDevice->apTD1Rings = vir_pool
573 + pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc)
574 + pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc)
575 + pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc);
577 pDevice->tx1_bufs = pDevice->tx0_bufs +
578 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ;
580 pDevice->tx_beacon_bufs = pDevice->tx1_bufs +
581 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ;
583 pDevice->pbyTmpBuff = pDevice->tx_beacon_bufs +
586 pDevice->tx_bufs_dma1 = pDevice->tx_bufs_dma0 +
587 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ;
589 pDevice->tx_beacon_dma = pDevice->tx_bufs_dma1 +
590 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ;
595 static void device_free_rings(struct vnt_private *pDevice)
597 dma_free_coherent(&pDevice->pcid->dev,
598 pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
599 pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
600 pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
601 pDevice->sOpts.nTxDescs[1] * sizeof(STxDesc)
603 pDevice->aRD0Ring, pDevice->pool_dma
606 if (pDevice->tx0_bufs)
607 dma_free_coherent(&pDevice->pcid->dev,
608 pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ +
609 pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ +
612 pDevice->tx0_bufs, pDevice->tx_bufs_dma0
616 static void device_init_rd0_ring(struct vnt_private *pDevice)
619 dma_addr_t curr = pDevice->rd0_pool_dma;
622 /* Init the RD0 ring entries */
623 for (i = 0; i < pDevice->sOpts.nRxDescs0; i ++, curr += sizeof(SRxDesc)) {
624 pDesc = &(pDevice->aRD0Ring[i]);
625 pDesc->pRDInfo = alloc_rd_info();
626 ASSERT(pDesc->pRDInfo);
627 if (!device_alloc_rx_buf(pDevice, pDesc))
628 dev_err(&pDevice->pcid->dev, "can not alloc rx bufs\n");
630 pDesc->next = &(pDevice->aRD0Ring[(i+1) % pDevice->sOpts.nRxDescs0]);
631 pDesc->pRDInfo->curr_desc = cpu_to_le32(curr);
632 pDesc->next_desc = cpu_to_le32(curr + sizeof(SRxDesc));
636 pDevice->aRD0Ring[i-1].next_desc = cpu_to_le32(pDevice->rd0_pool_dma);
637 pDevice->pCurrRD[0] = &(pDevice->aRD0Ring[0]);
640 static void device_init_rd1_ring(struct vnt_private *pDevice)
643 dma_addr_t curr = pDevice->rd1_pool_dma;
646 /* Init the RD1 ring entries */
647 for (i = 0; i < pDevice->sOpts.nRxDescs1; i ++, curr += sizeof(SRxDesc)) {
648 pDesc = &(pDevice->aRD1Ring[i]);
649 pDesc->pRDInfo = alloc_rd_info();
650 ASSERT(pDesc->pRDInfo);
651 if (!device_alloc_rx_buf(pDevice, pDesc))
652 dev_err(&pDevice->pcid->dev, "can not alloc rx bufs\n");
654 pDesc->next = &(pDevice->aRD1Ring[(i+1) % pDevice->sOpts.nRxDescs1]);
655 pDesc->pRDInfo->curr_desc = cpu_to_le32(curr);
656 pDesc->next_desc = cpu_to_le32(curr + sizeof(SRxDesc));
660 pDevice->aRD1Ring[i-1].next_desc = cpu_to_le32(pDevice->rd1_pool_dma);
661 pDevice->pCurrRD[1] = &(pDevice->aRD1Ring[0]);
664 static void device_free_rd0_ring(struct vnt_private *pDevice)
668 for (i = 0; i < pDevice->sOpts.nRxDescs0; i++) {
669 PSRxDesc pDesc = &(pDevice->aRD0Ring[i]);
670 PDEVICE_RD_INFO pRDInfo = pDesc->pRDInfo;
672 dma_unmap_single(&pDevice->pcid->dev, pRDInfo->skb_dma,
673 pDevice->rx_buf_sz, DMA_FROM_DEVICE);
675 dev_kfree_skb(pRDInfo->skb);
677 kfree(pDesc->pRDInfo);
681 static void device_free_rd1_ring(struct vnt_private *pDevice)
685 for (i = 0; i < pDevice->sOpts.nRxDescs1; i++) {
686 PSRxDesc pDesc = &(pDevice->aRD1Ring[i]);
687 PDEVICE_RD_INFO pRDInfo = pDesc->pRDInfo;
689 dma_unmap_single(&pDevice->pcid->dev, pRDInfo->skb_dma,
690 pDevice->rx_buf_sz, DMA_FROM_DEVICE);
692 dev_kfree_skb(pRDInfo->skb);
694 kfree(pDesc->pRDInfo);
698 static void device_init_td0_ring(struct vnt_private *pDevice)
704 curr = pDevice->td0_pool_dma;
705 for (i = 0; i < pDevice->sOpts.nTxDescs[0]; i++, curr += sizeof(STxDesc)) {
706 pDesc = &(pDevice->apTD0Rings[i]);
707 pDesc->pTDInfo = alloc_td_info();
708 ASSERT(pDesc->pTDInfo);
709 if (pDevice->flags & DEVICE_FLAGS_TX_ALIGN) {
710 pDesc->pTDInfo->buf = pDevice->tx0_bufs + (i)*PKT_BUF_SZ;
711 pDesc->pTDInfo->buf_dma = pDevice->tx_bufs_dma0 + (i)*PKT_BUF_SZ;
713 pDesc->next = &(pDevice->apTD0Rings[(i+1) % pDevice->sOpts.nTxDescs[0]]);
714 pDesc->pTDInfo->curr_desc = cpu_to_le32(curr);
715 pDesc->next_desc = cpu_to_le32(curr+sizeof(STxDesc));
719 pDevice->apTD0Rings[i-1].next_desc = cpu_to_le32(pDevice->td0_pool_dma);
720 pDevice->apTailTD[0] = pDevice->apCurrTD[0] = &(pDevice->apTD0Rings[0]);
723 static void device_init_td1_ring(struct vnt_private *pDevice)
729 /* Init the TD ring entries */
730 curr = pDevice->td1_pool_dma;
731 for (i = 0; i < pDevice->sOpts.nTxDescs[1]; i++, curr += sizeof(STxDesc)) {
732 pDesc = &(pDevice->apTD1Rings[i]);
733 pDesc->pTDInfo = alloc_td_info();
734 ASSERT(pDesc->pTDInfo);
735 if (pDevice->flags & DEVICE_FLAGS_TX_ALIGN) {
736 pDesc->pTDInfo->buf = pDevice->tx1_bufs + (i) * PKT_BUF_SZ;
737 pDesc->pTDInfo->buf_dma = pDevice->tx_bufs_dma1 + (i) * PKT_BUF_SZ;
739 pDesc->next = &(pDevice->apTD1Rings[(i + 1) % pDevice->sOpts.nTxDescs[1]]);
740 pDesc->pTDInfo->curr_desc = cpu_to_le32(curr);
741 pDesc->next_desc = cpu_to_le32(curr+sizeof(STxDesc));
745 pDevice->apTD1Rings[i-1].next_desc = cpu_to_le32(pDevice->td1_pool_dma);
746 pDevice->apTailTD[1] = pDevice->apCurrTD[1] = &(pDevice->apTD1Rings[0]);
749 static void device_free_td0_ring(struct vnt_private *pDevice)
753 for (i = 0; i < pDevice->sOpts.nTxDescs[0]; i++) {
754 PSTxDesc pDesc = &(pDevice->apTD0Rings[i]);
755 PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
757 if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma))
758 dma_unmap_single(&pDevice->pcid->dev, pTDInfo->skb_dma,
759 pTDInfo->skb->len, DMA_TO_DEVICE);
762 dev_kfree_skb(pTDInfo->skb);
764 kfree(pDesc->pTDInfo);
768 static void device_free_td1_ring(struct vnt_private *pDevice)
772 for (i = 0; i < pDevice->sOpts.nTxDescs[1]; i++) {
773 PSTxDesc pDesc = &(pDevice->apTD1Rings[i]);
774 PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
776 if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma))
777 dma_unmap_single(&pDevice->pcid->dev, pTDInfo->skb_dma,
778 pTDInfo->skb->len, DMA_TO_DEVICE);
781 dev_kfree_skb(pTDInfo->skb);
783 kfree(pDesc->pTDInfo);
787 /*-----------------------------------------------------------------*/
789 static int device_rx_srv(struct vnt_private *pDevice, unsigned int uIdx)
794 for (pRD = pDevice->pCurrRD[uIdx];
795 pRD->m_rd0RD0.f1Owner == OWNED_BY_HOST;
800 if (!pRD->pRDInfo->skb)
803 if (vnt_receive_frame(pDevice, pRD)) {
804 if (!device_alloc_rx_buf(pDevice, pRD)) {
805 dev_err(&pDevice->pcid->dev,
806 "can not allocate rx buf\n");
810 pRD->m_rd0RD0.f1Owner = OWNED_BY_NIC;
813 pDevice->pCurrRD[uIdx] = pRD;
818 static bool device_alloc_rx_buf(struct vnt_private *pDevice, PSRxDesc pRD)
820 PDEVICE_RD_INFO pRDInfo = pRD->pRDInfo;
822 pRDInfo->skb = dev_alloc_skb((int)pDevice->rx_buf_sz);
823 if (pRDInfo->skb == NULL)
825 ASSERT(pRDInfo->skb);
828 dma_map_single(&pDevice->pcid->dev,
829 skb_put(pRDInfo->skb, skb_tailroom(pRDInfo->skb)),
830 pDevice->rx_buf_sz, DMA_FROM_DEVICE);
832 *((unsigned int *)&(pRD->m_rd0RD0)) = 0; /* FIX cast */
834 pRD->m_rd0RD0.wResCount = cpu_to_le16(pDevice->rx_buf_sz);
835 pRD->m_rd0RD0.f1Owner = OWNED_BY_NIC;
836 pRD->m_rd1RD1.wReqCount = cpu_to_le16(pDevice->rx_buf_sz);
837 pRD->buff_addr = cpu_to_le32(pRDInfo->skb_dma);
842 static const u8 fallback_rate0[5][5] = {
843 {RATE_18M, RATE_18M, RATE_12M, RATE_12M, RATE_12M},
844 {RATE_24M, RATE_24M, RATE_18M, RATE_12M, RATE_12M},
845 {RATE_36M, RATE_36M, RATE_24M, RATE_18M, RATE_18M},
846 {RATE_48M, RATE_48M, RATE_36M, RATE_24M, RATE_24M},
847 {RATE_54M, RATE_54M, RATE_48M, RATE_36M, RATE_36M}
850 static const u8 fallback_rate1[5][5] = {
851 {RATE_18M, RATE_18M, RATE_12M, RATE_6M, RATE_6M},
852 {RATE_24M, RATE_24M, RATE_18M, RATE_6M, RATE_6M},
853 {RATE_36M, RATE_36M, RATE_24M, RATE_12M, RATE_12M},
854 {RATE_48M, RATE_48M, RATE_24M, RATE_12M, RATE_12M},
855 {RATE_54M, RATE_54M, RATE_36M, RATE_18M, RATE_18M}
858 static int vnt_int_report_rate(struct vnt_private *priv,
859 PDEVICE_TD_INFO context, u8 tsr0, u8 tsr1)
861 struct vnt_tx_fifo_head *fifo_head;
862 struct ieee80211_tx_info *info;
863 struct ieee80211_rate *rate;
865 u8 tx_retry = (tsr0 & TSR0_NCR);
874 fifo_head = (struct vnt_tx_fifo_head *)context->buf;
875 fb_option = (le16_to_cpu(fifo_head->fifo_ctl) &
876 (FIFOCTL_AUTO_FB_0 | FIFOCTL_AUTO_FB_1));
878 info = IEEE80211_SKB_CB(context->skb);
879 idx = info->control.rates[0].idx;
881 if (fb_option && !(tsr1 & TSR1_TERR)) {
885 rate = ieee80211_get_tx_rate(priv->hw, info);
886 tx_rate = rate->hw_value - RATE_18M;
891 if (fb_option & FIFOCTL_AUTO_FB_0)
892 tx_rate = fallback_rate0[tx_rate][retry];
893 else if (fb_option & FIFOCTL_AUTO_FB_1)
894 tx_rate = fallback_rate1[tx_rate][retry];
896 if (info->band == IEEE80211_BAND_5GHZ)
897 idx = tx_rate - RATE_6M;
902 ieee80211_tx_info_clear_status(info);
904 info->status.rates[0].count = tx_retry;
906 if (!(tsr1 & TSR1_TERR)) {
907 info->status.rates[0].idx = idx;
909 if (info->flags & IEEE80211_TX_CTL_NO_ACK)
910 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
912 info->flags |= IEEE80211_TX_STAT_ACK;
918 static int device_tx_srv(struct vnt_private *pDevice, unsigned int uIdx)
922 unsigned char byTsr0;
923 unsigned char byTsr1;
925 for (pTD = pDevice->apTailTD[uIdx]; pDevice->iTDUsed[uIdx] > 0; pTD = pTD->next) {
926 if (pTD->m_td0TD0.f1Owner == OWNED_BY_NIC)
931 byTsr0 = pTD->m_td0TD0.byTSR0;
932 byTsr1 = pTD->m_td0TD0.byTSR1;
934 /* Only the status of first TD in the chain is correct */
935 if (pTD->m_td1TD1.byTCR & TCR_STP) {
936 if ((pTD->pTDInfo->byFlags & TD_FLAGS_NETIF_SKB) != 0) {
937 if (!(byTsr1 & TSR1_TERR)) {
939 pr_debug(" Tx[%d] OK but has error. tsr1[%02X] tsr0[%02X]\n",
944 pr_debug(" Tx[%d] dropped & tsr1[%02X] tsr0[%02X]\n",
945 (int)uIdx, byTsr1, byTsr0);
949 if (byTsr1 & TSR1_TERR) {
950 if ((pTD->pTDInfo->byFlags & TD_FLAGS_PRIV_SKB) != 0) {
951 pr_debug(" Tx[%d] fail has error. tsr1[%02X] tsr0[%02X]\n",
952 (int)uIdx, byTsr1, byTsr0);
956 vnt_int_report_rate(pDevice, pTD->pTDInfo, byTsr0, byTsr1);
958 device_free_tx_buf(pDevice, pTD);
959 pDevice->iTDUsed[uIdx]--;
963 pDevice->apTailTD[uIdx] = pTD;
968 static void device_error(struct vnt_private *pDevice, unsigned short status)
970 if (status & ISR_FETALERR) {
971 dev_err(&pDevice->pcid->dev, "Hardware fatal error\n");
973 MACbShutdown(pDevice->PortOffset);
978 static void device_free_tx_buf(struct vnt_private *pDevice, PSTxDesc pDesc)
980 PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
981 struct sk_buff *skb = pTDInfo->skb;
983 /* pre-allocated buf_dma can't be unmapped. */
984 if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma)) {
985 dma_unmap_single(&pDevice->pcid->dev, pTDInfo->skb_dma,
986 skb->len, DMA_TO_DEVICE);
990 ieee80211_tx_status_irqsafe(pDevice->hw, skb);
992 pTDInfo->skb_dma = 0;
994 pTDInfo->byFlags = 0;
997 static void vnt_check_bb_vga(struct vnt_private *priv)
1002 if (!priv->bUpdateBBVGA)
1005 if (priv->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1008 if (!(priv->vif->bss_conf.assoc && priv->uCurrRSSI))
1011 RFvRSSITodBm(priv, (u8)priv->uCurrRSSI, &dbm);
1013 for (i = 0; i < BB_VGA_LEVEL; i++) {
1014 if (dbm < priv->ldBmThreshold[i]) {
1015 priv->byBBVGANew = priv->abyBBVGA[i];
1020 if (priv->byBBVGANew == priv->byBBVGACurrent) {
1021 priv->uBBVGADiffCount = 1;
1025 priv->uBBVGADiffCount++;
1027 if (priv->uBBVGADiffCount == 1) {
1028 /* first VGA diff gain */
1029 BBvSetVGAGainOffset(priv, priv->byBBVGANew);
1031 dev_dbg(&priv->pcid->dev,
1032 "First RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
1033 (int)dbm, priv->byBBVGANew,
1034 priv->byBBVGACurrent,
1035 (int)priv->uBBVGADiffCount);
1038 if (priv->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD) {
1039 dev_dbg(&priv->pcid->dev,
1040 "RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n",
1041 (int)dbm, priv->byBBVGANew,
1042 priv->byBBVGACurrent,
1043 (int)priv->uBBVGADiffCount);
1045 BBvSetVGAGainOffset(priv, priv->byBBVGANew);
1049 static void vnt_interrupt_process(struct vnt_private *priv)
1051 struct ieee80211_low_level_stats *low_stats = &priv->low_stats;
1055 unsigned long flags;
1057 MACvReadISR(priv->PortOffset, &isr);
1062 if (isr == 0xffffffff) {
1063 pr_debug("isr = 0xffff\n");
1067 MACvIntDisable(priv->PortOffset);
1069 spin_lock_irqsave(&priv->lock, flags);
1071 /* Read low level stats */
1072 MACvReadMIBCounter(priv->PortOffset, &mib_counter);
1074 low_stats->dot11RTSSuccessCount += mib_counter & 0xff;
1075 low_stats->dot11RTSFailureCount += (mib_counter >> 8) & 0xff;
1076 low_stats->dot11ACKFailureCount += (mib_counter >> 16) & 0xff;
1077 low_stats->dot11FCSErrorCount += (mib_counter >> 24) & 0xff;
1081 * Must do this after doing rx/tx, cause ISR bit is slow
1082 * than RD/TD write back
1083 * update ISR counter
1085 while (isr && priv->vif) {
1086 MACvWriteISR(priv->PortOffset, isr);
1088 if (isr & ISR_FETALERR) {
1089 pr_debug(" ISR_FETALERR\n");
1090 VNSvOutPortB(priv->PortOffset + MAC_REG_SOFTPWRCTL, 0);
1091 VNSvOutPortW(priv->PortOffset +
1092 MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPECTI);
1093 device_error(priv, isr);
1096 if (isr & ISR_TBTT) {
1097 if (priv->op_mode != NL80211_IFTYPE_ADHOC)
1098 vnt_check_bb_vga(priv);
1100 priv->bBeaconSent = false;
1101 if (priv->bEnablePSMode)
1102 PSbIsNextTBTTWakeUp((void *)priv);
1104 if ((priv->op_mode == NL80211_IFTYPE_AP ||
1105 priv->op_mode == NL80211_IFTYPE_ADHOC) &&
1106 priv->vif->bss_conf.enable_beacon) {
1107 MACvOneShotTimer1MicroSec(priv->PortOffset,
1108 (priv->vif->bss_conf.beacon_int - MAKE_BEACON_RESERVED) << 10);
1111 /* TODO: adhoc PS mode */
1115 if (isr & ISR_BNTX) {
1116 if (priv->op_mode == NL80211_IFTYPE_ADHOC) {
1117 priv->bIsBeaconBufReadySet = false;
1118 priv->cbBeaconBufReadySetCnt = 0;
1121 priv->bBeaconSent = true;
1124 if (isr & ISR_RXDMA0)
1125 max_count += device_rx_srv(priv, TYPE_RXDMA0);
1127 if (isr & ISR_RXDMA1)
1128 max_count += device_rx_srv(priv, TYPE_RXDMA1);
1130 if (isr & ISR_TXDMA0)
1131 max_count += device_tx_srv(priv, TYPE_TXDMA0);
1133 if (isr & ISR_AC0DMA)
1134 max_count += device_tx_srv(priv, TYPE_AC0DMA);
1136 if (isr & ISR_SOFTTIMER1) {
1137 if (priv->vif->bss_conf.enable_beacon)
1138 vnt_beacon_make(priv, priv->vif);
1141 /* If both buffers available wake the queue */
1142 if (AVAIL_TD(priv, TYPE_TXDMA0) &&
1143 AVAIL_TD(priv, TYPE_AC0DMA) &&
1144 ieee80211_queue_stopped(priv->hw, 0))
1145 ieee80211_wake_queues(priv->hw);
1147 MACvReadISR(priv->PortOffset, &isr);
1149 MACvReceive0(priv->PortOffset);
1150 MACvReceive1(priv->PortOffset);
1152 if (max_count > priv->sOpts.int_works)
1156 spin_unlock_irqrestore(&priv->lock, flags);
1158 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE);
1161 static void vnt_interrupt_work(struct work_struct *work)
1163 struct vnt_private *priv =
1164 container_of(work, struct vnt_private, interrupt_work);
1167 vnt_interrupt_process(priv);
1170 static irqreturn_t vnt_interrupt(int irq, void *arg)
1172 struct vnt_private *priv = arg;
1175 schedule_work(&priv->interrupt_work);
1180 static int vnt_tx_packet(struct vnt_private *priv, struct sk_buff *skb)
1182 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1185 unsigned long flags;
1187 spin_lock_irqsave(&priv->lock, flags);
1189 if (ieee80211_is_data(hdr->frame_control))
1190 dma_idx = TYPE_AC0DMA;
1192 dma_idx = TYPE_TXDMA0;
1194 if (AVAIL_TD(priv, dma_idx) < 1) {
1195 spin_unlock_irqrestore(&priv->lock, flags);
1199 head_td = priv->apCurrTD[dma_idx];
1201 head_td->m_td1TD1.byTCR = 0;
1203 head_td->pTDInfo->skb = skb;
1205 if (dma_idx == TYPE_AC0DMA)
1206 head_td->pTDInfo->byFlags = TD_FLAGS_NETIF_SKB;
1208 priv->apCurrTD[dma_idx] = head_td->next;
1210 spin_unlock_irqrestore(&priv->lock, flags);
1212 vnt_generate_fifo_header(priv, dma_idx, head_td, skb);
1214 if (MACbIsRegBitsOn(priv->PortOffset, MAC_REG_PSCTL, PSCTL_PS))
1215 MACbPSWakeup(priv->PortOffset);
1217 spin_lock_irqsave(&priv->lock, flags);
1219 priv->bPWBitOn = false;
1221 /* Set TSR1 & ReqCount in TxDescHead */
1222 head_td->m_td1TD1.byTCR |= (TCR_STP | TCR_EDP | EDMSDU);
1223 head_td->m_td1TD1.wReqCount =
1224 cpu_to_le16((u16)head_td->pTDInfo->dwReqCount);
1226 head_td->buff_addr = cpu_to_le32(head_td->pTDInfo->skb_dma);
1228 /* Poll Transmit the adapter */
1230 head_td->m_td0TD0.f1Owner = OWNED_BY_NIC;
1231 wmb(); /* second memory barrier */
1233 if (head_td->pTDInfo->byFlags & TD_FLAGS_NETIF_SKB)
1234 MACvTransmitAC0(priv->PortOffset);
1236 MACvTransmit0(priv->PortOffset);
1238 priv->iTDUsed[dma_idx]++;
1240 spin_unlock_irqrestore(&priv->lock, flags);
1245 static void vnt_tx_80211(struct ieee80211_hw *hw,
1246 struct ieee80211_tx_control *control,
1247 struct sk_buff *skb)
1249 struct vnt_private *priv = hw->priv;
1251 ieee80211_stop_queues(hw);
1253 if (vnt_tx_packet(priv, skb)) {
1254 ieee80211_free_txskb(hw, skb);
1256 ieee80211_wake_queues(hw);
1260 static int vnt_start(struct ieee80211_hw *hw)
1262 struct vnt_private *priv = hw->priv;
1265 priv->rx_buf_sz = PKT_BUF_SZ;
1266 if (!device_init_rings(priv))
1269 ret = request_irq(priv->pcid->irq, &vnt_interrupt,
1270 IRQF_SHARED, "vt6655", priv);
1272 dev_dbg(&priv->pcid->dev, "failed to start irq\n");
1276 dev_dbg(&priv->pcid->dev, "call device init rd0 ring\n");
1277 device_init_rd0_ring(priv);
1278 device_init_rd1_ring(priv);
1279 device_init_td0_ring(priv);
1280 device_init_td1_ring(priv);
1282 device_init_registers(priv);
1284 dev_dbg(&priv->pcid->dev, "call MACvIntEnable\n");
1285 MACvIntEnable(priv->PortOffset, IMR_MASK_VALUE);
1287 ieee80211_wake_queues(hw);
1292 static void vnt_stop(struct ieee80211_hw *hw)
1294 struct vnt_private *priv = hw->priv;
1296 ieee80211_stop_queues(hw);
1298 cancel_work_sync(&priv->interrupt_work);
1300 MACbShutdown(priv->PortOffset);
1301 MACbSoftwareReset(priv->PortOffset);
1302 CARDbRadioPowerOff(priv);
1304 device_free_td0_ring(priv);
1305 device_free_td1_ring(priv);
1306 device_free_rd0_ring(priv);
1307 device_free_rd1_ring(priv);
1308 device_free_rings(priv);
1310 free_irq(priv->pcid->irq, priv);
1313 static int vnt_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1315 struct vnt_private *priv = hw->priv;
1319 switch (vif->type) {
1320 case NL80211_IFTYPE_STATION:
1322 case NL80211_IFTYPE_ADHOC:
1323 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1325 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1328 case NL80211_IFTYPE_AP:
1329 MACvRegBitsOff(priv->PortOffset, MAC_REG_RCR, RCR_UNICAST);
1331 MACvRegBitsOn(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1338 priv->op_mode = vif->type;
1343 static void vnt_remove_interface(struct ieee80211_hw *hw,
1344 struct ieee80211_vif *vif)
1346 struct vnt_private *priv = hw->priv;
1348 switch (vif->type) {
1349 case NL80211_IFTYPE_STATION:
1351 case NL80211_IFTYPE_ADHOC:
1352 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1353 MACvRegBitsOff(priv->PortOffset,
1354 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1355 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_ADHOC);
1357 case NL80211_IFTYPE_AP:
1358 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR, TCR_AUTOBCNTX);
1359 MACvRegBitsOff(priv->PortOffset,
1360 MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
1361 MACvRegBitsOff(priv->PortOffset, MAC_REG_HOSTCR, HOSTCR_AP);
1367 priv->op_mode = NL80211_IFTYPE_UNSPECIFIED;
1371 static int vnt_config(struct ieee80211_hw *hw, u32 changed)
1373 struct vnt_private *priv = hw->priv;
1374 struct ieee80211_conf *conf = &hw->conf;
1377 if (changed & IEEE80211_CONF_CHANGE_PS) {
1378 if (conf->flags & IEEE80211_CONF_PS)
1379 PSvEnablePowerSaving(priv, conf->listen_interval);
1381 PSvDisablePowerSaving(priv);
1384 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) ||
1385 (conf->flags & IEEE80211_CONF_OFFCHANNEL)) {
1386 set_channel(priv, conf->chandef.chan);
1388 if (conf->chandef.chan->band == IEEE80211_BAND_5GHZ)
1389 bb_type = BB_TYPE_11A;
1391 bb_type = BB_TYPE_11G;
1393 if (priv->byBBType != bb_type) {
1394 priv->byBBType = bb_type;
1396 CARDbSetPhyParameter(priv, priv->byBBType);
1400 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1401 if (priv->byBBType == BB_TYPE_11B)
1402 priv->wCurrentRate = RATE_1M;
1404 priv->wCurrentRate = RATE_54M;
1406 RFbSetPower(priv, priv->wCurrentRate,
1407 conf->chandef.chan->hw_value);
1413 static void vnt_bss_info_changed(struct ieee80211_hw *hw,
1414 struct ieee80211_vif *vif, struct ieee80211_bss_conf *conf,
1417 struct vnt_private *priv = hw->priv;
1419 priv->current_aid = conf->aid;
1421 if (changed & BSS_CHANGED_BSSID && conf->bssid) {
1422 unsigned long flags;
1424 spin_lock_irqsave(&priv->lock, flags);
1426 MACvWriteBSSIDAddress(priv->PortOffset, (u8 *)conf->bssid);
1428 spin_unlock_irqrestore(&priv->lock, flags);
1431 if (changed & BSS_CHANGED_BASIC_RATES) {
1432 priv->basic_rates = conf->basic_rates;
1434 CARDvUpdateBasicTopRate(priv);
1436 dev_dbg(&priv->pcid->dev,
1437 "basic rates %x\n", conf->basic_rates);
1440 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1441 if (conf->use_short_preamble) {
1442 MACvEnableBarkerPreambleMd(priv->PortOffset);
1443 priv->byPreambleType = true;
1445 MACvDisableBarkerPreambleMd(priv->PortOffset);
1446 priv->byPreambleType = false;
1450 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1451 if (conf->use_cts_prot)
1452 MACvEnableProtectMD(priv->PortOffset);
1454 MACvDisableProtectMD(priv->PortOffset);
1457 if (changed & BSS_CHANGED_ERP_SLOT) {
1458 if (conf->use_short_slot)
1459 priv->bShortSlotTime = true;
1461 priv->bShortSlotTime = false;
1463 CARDbSetPhyParameter(priv, priv->byBBType);
1464 BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]);
1467 if (changed & BSS_CHANGED_TXPOWER)
1468 RFbSetPower(priv, priv->wCurrentRate,
1469 conf->chandef.chan->hw_value);
1471 if (changed & BSS_CHANGED_BEACON_ENABLED) {
1472 dev_dbg(&priv->pcid->dev,
1473 "Beacon enable %d\n", conf->enable_beacon);
1475 if (conf->enable_beacon) {
1476 vnt_beacon_enable(priv, vif, conf);
1478 MACvRegBitsOn(priv->PortOffset, MAC_REG_TCR,
1481 MACvRegBitsOff(priv->PortOffset, MAC_REG_TCR,
1486 if (changed & BSS_CHANGED_ASSOC && priv->op_mode != NL80211_IFTYPE_AP) {
1488 CARDbUpdateTSF(priv, conf->beacon_rate->hw_value,
1491 CARDbSetBeaconPeriod(priv, conf->beacon_int);
1493 CARDvSetFirstNextTBTT(priv, conf->beacon_int);
1495 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1497 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL,
1503 static u64 vnt_prepare_multicast(struct ieee80211_hw *hw,
1504 struct netdev_hw_addr_list *mc_list)
1506 struct vnt_private *priv = hw->priv;
1507 struct netdev_hw_addr *ha;
1511 netdev_hw_addr_list_for_each(ha, mc_list) {
1512 bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1514 mc_filter |= 1ULL << (bit_nr & 0x3f);
1517 priv->mc_list_count = mc_list->count;
1522 static void vnt_configure(struct ieee80211_hw *hw,
1523 unsigned int changed_flags, unsigned int *total_flags, u64 multicast)
1525 struct vnt_private *priv = hw->priv;
1528 *total_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC;
1530 VNSvInPortB(priv->PortOffset + MAC_REG_RCR, &rx_mode);
1532 dev_dbg(&priv->pcid->dev, "rx mode in = %x\n", rx_mode);
1534 if (changed_flags & FIF_ALLMULTI) {
1535 if (*total_flags & FIF_ALLMULTI) {
1536 unsigned long flags;
1538 spin_lock_irqsave(&priv->lock, flags);
1540 if (priv->mc_list_count > 2) {
1541 MACvSelectPage1(priv->PortOffset);
1543 VNSvOutPortD(priv->PortOffset +
1544 MAC_REG_MAR0, 0xffffffff);
1545 VNSvOutPortD(priv->PortOffset +
1546 MAC_REG_MAR0 + 4, 0xffffffff);
1548 MACvSelectPage0(priv->PortOffset);
1550 MACvSelectPage1(priv->PortOffset);
1552 VNSvOutPortD(priv->PortOffset +
1553 MAC_REG_MAR0, (u32)multicast);
1554 VNSvOutPortD(priv->PortOffset +
1556 (u32)(multicast >> 32));
1558 MACvSelectPage0(priv->PortOffset);
1561 spin_unlock_irqrestore(&priv->lock, flags);
1563 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1565 rx_mode &= ~(RCR_MULTICAST | RCR_BROADCAST);
1569 if (changed_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)) {
1570 rx_mode |= RCR_MULTICAST | RCR_BROADCAST;
1572 if (*total_flags & (FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC))
1573 rx_mode &= ~RCR_BSSID;
1575 rx_mode |= RCR_BSSID;
1578 VNSvOutPortB(priv->PortOffset + MAC_REG_RCR, rx_mode);
1580 dev_dbg(&priv->pcid->dev, "rx mode out= %x\n", rx_mode);
1583 static int vnt_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
1584 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
1585 struct ieee80211_key_conf *key)
1587 struct vnt_private *priv = hw->priv;
1591 if (vnt_set_keys(hw, sta, vif, key))
1595 if (test_bit(key->hw_key_idx, &priv->key_entry_inuse))
1596 clear_bit(key->hw_key_idx, &priv->key_entry_inuse);
1604 static int vnt_get_stats(struct ieee80211_hw *hw,
1605 struct ieee80211_low_level_stats *stats)
1607 struct vnt_private *priv = hw->priv;
1609 memcpy(stats, &priv->low_stats, sizeof(*stats));
1614 static u64 vnt_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1616 struct vnt_private *priv = hw->priv;
1619 CARDbGetCurrentTSF(priv, &tsf);
1624 static void vnt_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1627 struct vnt_private *priv = hw->priv;
1629 CARDvUpdateNextTBTT(priv, tsf, vif->bss_conf.beacon_int);
1632 static void vnt_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1634 struct vnt_private *priv = hw->priv;
1636 /* reset TSF counter */
1637 VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
1640 static const struct ieee80211_ops vnt_mac_ops = {
1644 .add_interface = vnt_add_interface,
1645 .remove_interface = vnt_remove_interface,
1646 .config = vnt_config,
1647 .bss_info_changed = vnt_bss_info_changed,
1648 .prepare_multicast = vnt_prepare_multicast,
1649 .configure_filter = vnt_configure,
1650 .set_key = vnt_set_key,
1651 .get_stats = vnt_get_stats,
1652 .get_tsf = vnt_get_tsf,
1653 .set_tsf = vnt_set_tsf,
1654 .reset_tsf = vnt_reset_tsf,
1657 static int vnt_init(struct vnt_private *priv)
1659 SET_IEEE80211_PERM_ADDR(priv->hw, priv->abyCurrentNetAddr);
1661 vnt_init_bands(priv);
1663 if (ieee80211_register_hw(priv->hw))
1666 priv->mac_hw = true;
1668 CARDbRadioPowerOff(priv);
1674 vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent)
1676 PCHIP_INFO pChip_info = (PCHIP_INFO)ent->driver_data;
1677 struct vnt_private *priv;
1678 struct ieee80211_hw *hw;
1679 struct wiphy *wiphy;
1682 dev_notice(&pcid->dev,
1683 "%s Ver. %s\n", DEVICE_FULL_DRV_NAM, DEVICE_VERSION);
1685 dev_notice(&pcid->dev,
1686 "Copyright (c) 2003 VIA Networking Technologies, Inc.\n");
1688 hw = ieee80211_alloc_hw(sizeof(*priv), &vnt_mac_ops);
1690 dev_err(&pcid->dev, "could not register ieee80211_hw\n");
1696 vt6655_init_info(pcid, &priv, pChip_info);
1700 SET_IEEE80211_DEV(priv->hw, &pcid->dev);
1702 if (pci_enable_device(pcid)) {
1703 device_free_info(priv);
1708 "Before get pci_info memaddr is %x\n", priv->memaddr);
1710 if (!device_get_pci_info(priv, pcid)) {
1711 dev_err(&pcid->dev, ": Failed to find PCI device.\n");
1712 device_free_info(priv);
1718 "after get pci_info memaddr is %x, io addr is %x,io_size is %d\n",
1719 priv->memaddr, priv->ioaddr, priv->io_size);
1731 for (i = 0; address[i]; i++) {
1732 pci_read_config_dword(pcid, address[i], &bar);
1734 dev_dbg(&pcid->dev, "bar %d is %x\n", i, bar);
1738 "bar %d not implemented\n", i);
1742 if (bar & PCI_BASE_ADDRESS_SPACE_IO) {
1745 len = bar & (PCI_BASE_ADDRESS_IO_MASK & 0xffff);
1746 len = len & ~(len - 1);
1749 "IO space: len in IO %x, BAR %d\n",
1752 len = bar & 0xfffffff0;
1756 "len in MEM %x, BAR %d\n", len, i);
1762 priv->PortOffset = ioremap(priv->memaddr & PCI_BASE_ADDRESS_MEM_MASK,
1764 if (!priv->PortOffset) {
1765 dev_err(&pcid->dev, ": Failed to IO remapping ..\n");
1766 device_free_info(priv);
1770 rc = pci_request_regions(pcid, DEVICE_NAME);
1772 dev_err(&pcid->dev, ": Failed to find PCI device\n");
1773 device_free_info(priv);
1777 INIT_WORK(&priv->interrupt_work, vnt_interrupt_work);
1780 if (!MACbSoftwareReset(priv->PortOffset)) {
1781 dev_err(&pcid->dev, ": Failed to access MAC hardware..\n");
1782 device_free_info(priv);
1785 /* initial to reload eeprom */
1786 MACvInitialize(priv->PortOffset);
1787 MACvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr);
1790 priv->byRFType = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_RFTYPE);
1791 priv->byRFType &= RF_MASK;
1793 dev_dbg(&pcid->dev, "RF Type = %x\n", priv->byRFType);
1795 device_get_options(priv);
1796 device_set_options(priv);
1797 /* Mask out the options cannot be set to the chip */
1798 priv->sOpts.flags &= pChip_info->flags;
1800 /* Enable the chip specified capabilities */
1801 priv->flags = priv->sOpts.flags | (pChip_info->flags & 0xff000000UL);
1803 wiphy = priv->hw->wiphy;
1805 wiphy->frag_threshold = FRAG_THRESH_DEF;
1806 wiphy->rts_threshold = RTS_THRESH_DEF;
1807 wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1808 BIT(NL80211_IFTYPE_ADHOC) | BIT(NL80211_IFTYPE_AP);
1810 ieee80211_hw_set(priv->hw, TIMING_BEACON_ONLY);
1811 ieee80211_hw_set(priv->hw, SIGNAL_DBM);
1812 ieee80211_hw_set(priv->hw, RX_INCLUDES_FCS);
1813 ieee80211_hw_set(priv->hw, REPORTS_TX_ACK_STATUS);
1815 priv->hw->max_signal = 100;
1820 device_print_info(priv);
1821 pci_set_drvdata(pcid, priv);
1826 /*------------------------------------------------------------------*/
1829 static int vt6655_suspend(struct pci_dev *pcid, pm_message_t state)
1831 struct vnt_private *priv = pci_get_drvdata(pcid);
1832 unsigned long flags;
1834 spin_lock_irqsave(&priv->lock, flags);
1836 pci_save_state(pcid);
1838 MACbShutdown(priv->PortOffset);
1840 pci_disable_device(pcid);
1841 pci_set_power_state(pcid, pci_choose_state(pcid, state));
1843 spin_unlock_irqrestore(&priv->lock, flags);
1848 static int vt6655_resume(struct pci_dev *pcid)
1851 pci_set_power_state(pcid, PCI_D0);
1852 pci_enable_wake(pcid, PCI_D0, 0);
1853 pci_restore_state(pcid);
1859 MODULE_DEVICE_TABLE(pci, vt6655_pci_id_table);
1861 static struct pci_driver device_driver = {
1862 .name = DEVICE_NAME,
1863 .id_table = vt6655_pci_id_table,
1864 .probe = vt6655_probe,
1865 .remove = vt6655_remove,
1867 .suspend = vt6655_suspend,
1868 .resume = vt6655_resume,
1872 module_pci_driver(device_driver);