2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
29 /* Version Information */
30 #define DRIVER_VERSION "v1.07.0 (2014/10/09)"
31 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
32 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
33 #define MODULENAME "r8152"
35 #define R8152_PHY_ID 32
37 #define PLA_IDR 0xc000
38 #define PLA_RCR 0xc010
39 #define PLA_RMS 0xc016
40 #define PLA_RXFIFO_CTRL0 0xc0a0
41 #define PLA_RXFIFO_CTRL1 0xc0a4
42 #define PLA_RXFIFO_CTRL2 0xc0a8
43 #define PLA_FMC 0xc0b4
44 #define PLA_CFG_WOL 0xc0b6
45 #define PLA_TEREDO_CFG 0xc0bc
46 #define PLA_MAR 0xcd00
47 #define PLA_BACKUP 0xd000
48 #define PAL_BDC_CR 0xd1a0
49 #define PLA_TEREDO_TIMER 0xd2cc
50 #define PLA_REALWOW_TIMER 0xd2e8
51 #define PLA_LEDSEL 0xdd90
52 #define PLA_LED_FEATURE 0xdd92
53 #define PLA_PHYAR 0xde00
54 #define PLA_BOOT_CTRL 0xe004
55 #define PLA_GPHY_INTR_IMR 0xe022
56 #define PLA_EEE_CR 0xe040
57 #define PLA_EEEP_CR 0xe080
58 #define PLA_MAC_PWR_CTRL 0xe0c0
59 #define PLA_MAC_PWR_CTRL2 0xe0ca
60 #define PLA_MAC_PWR_CTRL3 0xe0cc
61 #define PLA_MAC_PWR_CTRL4 0xe0ce
62 #define PLA_WDT6_CTRL 0xe428
63 #define PLA_TCR0 0xe610
64 #define PLA_TCR1 0xe612
65 #define PLA_MTPS 0xe615
66 #define PLA_TXFIFO_CTRL 0xe618
67 #define PLA_RSTTALLY 0xe800
69 #define PLA_CRWECR 0xe81c
70 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
71 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
72 #define PLA_CONFIG5 0xe822
73 #define PLA_PHY_PWR 0xe84c
74 #define PLA_OOB_CTRL 0xe84f
75 #define PLA_CPCR 0xe854
76 #define PLA_MISC_0 0xe858
77 #define PLA_MISC_1 0xe85a
78 #define PLA_OCP_GPHY_BASE 0xe86c
79 #define PLA_TALLYCNT 0xe890
80 #define PLA_SFF_STS_7 0xe8de
81 #define PLA_PHYSTATUS 0xe908
82 #define PLA_BP_BA 0xfc26
83 #define PLA_BP_0 0xfc28
84 #define PLA_BP_1 0xfc2a
85 #define PLA_BP_2 0xfc2c
86 #define PLA_BP_3 0xfc2e
87 #define PLA_BP_4 0xfc30
88 #define PLA_BP_5 0xfc32
89 #define PLA_BP_6 0xfc34
90 #define PLA_BP_7 0xfc36
91 #define PLA_BP_EN 0xfc38
93 #define USB_U2P3_CTRL 0xb460
94 #define USB_DEV_STAT 0xb808
95 #define USB_USB_CTRL 0xd406
96 #define USB_PHY_CTRL 0xd408
97 #define USB_TX_AGG 0xd40a
98 #define USB_RX_BUF_TH 0xd40c
99 #define USB_USB_TIMER 0xd428
100 #define USB_RX_EARLY_AGG 0xd42c
101 #define USB_PM_CTRL_STATUS 0xd432
102 #define USB_TX_DMA 0xd434
103 #define USB_TOLERANCE 0xd490
104 #define USB_LPM_CTRL 0xd41a
105 #define USB_UPS_CTRL 0xd800
106 #define USB_MISC_0 0xd81a
107 #define USB_POWER_CUT 0xd80a
108 #define USB_AFE_CTRL2 0xd824
109 #define USB_WDT11_CTRL 0xe43c
110 #define USB_BP_BA 0xfc26
111 #define USB_BP_0 0xfc28
112 #define USB_BP_1 0xfc2a
113 #define USB_BP_2 0xfc2c
114 #define USB_BP_3 0xfc2e
115 #define USB_BP_4 0xfc30
116 #define USB_BP_5 0xfc32
117 #define USB_BP_6 0xfc34
118 #define USB_BP_7 0xfc36
119 #define USB_BP_EN 0xfc38
122 #define OCP_ALDPS_CONFIG 0x2010
123 #define OCP_EEE_CONFIG1 0x2080
124 #define OCP_EEE_CONFIG2 0x2092
125 #define OCP_EEE_CONFIG3 0x2094
126 #define OCP_BASE_MII 0xa400
127 #define OCP_EEE_AR 0xa41a
128 #define OCP_EEE_DATA 0xa41c
129 #define OCP_PHY_STATUS 0xa420
130 #define OCP_POWER_CFG 0xa430
131 #define OCP_EEE_CFG 0xa432
132 #define OCP_SRAM_ADDR 0xa436
133 #define OCP_SRAM_DATA 0xa438
134 #define OCP_DOWN_SPEED 0xa442
135 #define OCP_EEE_ABLE 0xa5c4
136 #define OCP_EEE_ADV 0xa5d0
137 #define OCP_EEE_LPABLE 0xa5d2
138 #define OCP_ADC_CFG 0xbc06
141 #define SRAM_LPF_CFG 0x8012
142 #define SRAM_10M_AMP1 0x8080
143 #define SRAM_10M_AMP2 0x8082
144 #define SRAM_IMPEDANCE 0x8084
147 #define RCR_AAP 0x00000001
148 #define RCR_APM 0x00000002
149 #define RCR_AM 0x00000004
150 #define RCR_AB 0x00000008
151 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
153 /* PLA_RXFIFO_CTRL0 */
154 #define RXFIFO_THR1_NORMAL 0x00080002
155 #define RXFIFO_THR1_OOB 0x01800003
157 /* PLA_RXFIFO_CTRL1 */
158 #define RXFIFO_THR2_FULL 0x00000060
159 #define RXFIFO_THR2_HIGH 0x00000038
160 #define RXFIFO_THR2_OOB 0x0000004a
161 #define RXFIFO_THR2_NORMAL 0x00a0
163 /* PLA_RXFIFO_CTRL2 */
164 #define RXFIFO_THR3_FULL 0x00000078
165 #define RXFIFO_THR3_HIGH 0x00000048
166 #define RXFIFO_THR3_OOB 0x0000005a
167 #define RXFIFO_THR3_NORMAL 0x0110
169 /* PLA_TXFIFO_CTRL */
170 #define TXFIFO_THR_NORMAL 0x00400008
171 #define TXFIFO_THR_NORMAL2 0x01000008
174 #define FMC_FCR_MCU_EN 0x0001
177 #define EEEP_CR_EEEP_TX 0x0002
180 #define WDT6_SET_MODE 0x0010
183 #define TCR0_TX_EMPTY 0x0800
184 #define TCR0_AUTO_FIFO 0x0080
187 #define VERSION_MASK 0x7cf0
190 #define MTPS_JUMBO (12 * 1024 / 64)
191 #define MTPS_DEFAULT (6 * 1024 / 64)
194 #define TALLY_RESET 0x0001
202 #define CRWECR_NORAML 0x00
203 #define CRWECR_CONFIG 0xc0
206 #define NOW_IS_OOB 0x80
207 #define TXFIFO_EMPTY 0x20
208 #define RXFIFO_EMPTY 0x10
209 #define LINK_LIST_READY 0x02
210 #define DIS_MCU_CLROOB 0x01
211 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
214 #define RXDY_GATED_EN 0x0008
217 #define RE_INIT_LL 0x8000
218 #define MCU_BORW_EN 0x4000
221 #define CPCR_RX_VLAN 0x0040
224 #define MAGIC_EN 0x0001
227 #define TEREDO_SEL 0x8000
228 #define TEREDO_WAKE_MASK 0x7f00
229 #define TEREDO_RS_EVENT_MASK 0x00fe
230 #define OOB_TEREDO_EN 0x0001
233 #define ALDPS_PROXY_MODE 0x0001
236 #define LINK_ON_WAKE_EN 0x0010
237 #define LINK_OFF_WAKE_EN 0x0008
240 #define BWF_EN 0x0040
241 #define MWF_EN 0x0020
242 #define UWF_EN 0x0010
243 #define LAN_WAKE_EN 0x0002
245 /* PLA_LED_FEATURE */
246 #define LED_MODE_MASK 0x0700
249 #define TX_10M_IDLE_EN 0x0080
250 #define PFM_PWM_SWITCH 0x0040
252 /* PLA_MAC_PWR_CTRL */
253 #define D3_CLK_GATED_EN 0x00004000
254 #define MCU_CLK_RATIO 0x07010f07
255 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
256 #define ALDPS_SPDWN_RATIO 0x0f87
258 /* PLA_MAC_PWR_CTRL2 */
259 #define EEE_SPDWN_RATIO 0x8007
261 /* PLA_MAC_PWR_CTRL3 */
262 #define PKT_AVAIL_SPDWN_EN 0x0100
263 #define SUSPEND_SPDWN_EN 0x0004
264 #define U1U2_SPDWN_EN 0x0002
265 #define L1_SPDWN_EN 0x0001
267 /* PLA_MAC_PWR_CTRL4 */
268 #define PWRSAVE_SPDWN_EN 0x1000
269 #define RXDV_SPDWN_EN 0x0800
270 #define TX10MIDLE_EN 0x0100
271 #define TP100_SPDWN_EN 0x0020
272 #define TP500_SPDWN_EN 0x0010
273 #define TP1000_SPDWN_EN 0x0008
274 #define EEE_SPDWN_EN 0x0001
276 /* PLA_GPHY_INTR_IMR */
277 #define GPHY_STS_MSK 0x0001
278 #define SPEED_DOWN_MSK 0x0002
279 #define SPDWN_RXDV_MSK 0x0004
280 #define SPDWN_LINKCHG_MSK 0x0008
283 #define PHYAR_FLAG 0x80000000
286 #define EEE_RX_EN 0x0001
287 #define EEE_TX_EN 0x0002
290 #define AUTOLOAD_DONE 0x0002
293 #define STAT_SPEED_MASK 0x0006
294 #define STAT_SPEED_HIGH 0x0000
295 #define STAT_SPEED_FULL 0x0002
298 #define TX_AGG_MAX_THRESHOLD 0x03
301 #define RX_THR_SUPPER 0x0c350180
302 #define RX_THR_HIGH 0x7a120180
303 #define RX_THR_SLOW 0xffff0180
306 #define TEST_MODE_DISABLE 0x00000001
307 #define TX_SIZE_ADJUST1 0x00000100
310 #define POWER_CUT 0x0100
312 /* USB_PM_CTRL_STATUS */
313 #define RESUME_INDICATE 0x0001
316 #define RX_AGG_DISABLE 0x0010
319 #define U2P3_ENABLE 0x0001
322 #define PWR_EN 0x0001
323 #define PHASE2_EN 0x0008
326 #define PCUT_STATUS 0x0001
328 /* USB_RX_EARLY_AGG */
329 #define EARLY_AGG_SUPPER 0x0e832981
330 #define EARLY_AGG_HIGH 0x0e837a12
331 #define EARLY_AGG_SLOW 0x0e83ffff
334 #define TIMER11_EN 0x0001
337 #define LPM_TIMER_MASK 0x0c
338 #define LPM_TIMER_500MS 0x04 /* 500 ms */
339 #define LPM_TIMER_500US 0x0c /* 500 us */
342 #define SEN_VAL_MASK 0xf800
343 #define SEN_VAL_NORMAL 0xa000
344 #define SEL_RXIDLE 0x0100
346 /* OCP_ALDPS_CONFIG */
347 #define ENPWRSAVE 0x8000
348 #define ENPDNPS 0x0200
349 #define LINKENA 0x0100
350 #define DIS_SDSAVE 0x0010
353 #define PHY_STAT_MASK 0x0007
354 #define PHY_STAT_LAN_ON 3
355 #define PHY_STAT_PWRDN 5
358 #define EEE_CLKDIV_EN 0x8000
359 #define EN_ALDPS 0x0004
360 #define EN_10M_PLLOFF 0x0001
362 /* OCP_EEE_CONFIG1 */
363 #define RG_TXLPI_MSK_HFDUP 0x8000
364 #define RG_MATCLR_EN 0x4000
365 #define EEE_10_CAP 0x2000
366 #define EEE_NWAY_EN 0x1000
367 #define TX_QUIET_EN 0x0200
368 #define RX_QUIET_EN 0x0100
369 #define sd_rise_time_mask 0x0070
370 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
371 #define RG_RXLPI_MSK_HFDUP 0x0008
372 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
374 /* OCP_EEE_CONFIG2 */
375 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
376 #define RG_DACQUIET_EN 0x0400
377 #define RG_LDVQUIET_EN 0x0200
378 #define RG_CKRSEL 0x0020
379 #define RG_EEEPRG_EN 0x0010
381 /* OCP_EEE_CONFIG3 */
382 #define fast_snr_mask 0xff80
383 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
384 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
385 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
388 /* bit[15:14] function */
389 #define FUN_ADDR 0x0000
390 #define FUN_DATA 0x4000
391 /* bit[4:0] device addr */
394 #define CTAP_SHORT_EN 0x0040
395 #define EEE10_EN 0x0010
398 #define EN_10M_BGOFF 0x0080
401 #define CKADSEL_L 0x0100
402 #define ADC_EN 0x0080
403 #define EN_EMI_L 0x0040
406 #define LPF_AUTO_TUNE 0x8000
409 #define GDAC_IB_UPALL 0x0008
412 #define AMP_DN 0x0200
415 #define RX_DRIVING_MASK 0x6000
417 enum rtl_register_content {
425 #define RTL8152_MAX_TX 4
426 #define RTL8152_MAX_RX 10
432 #define INTR_LINK 0x0004
434 #define RTL8152_REQT_READ 0xc0
435 #define RTL8152_REQT_WRITE 0x40
436 #define RTL8152_REQ_GET_REGS 0x05
437 #define RTL8152_REQ_SET_REGS 0x05
439 #define BYTE_EN_DWORD 0xff
440 #define BYTE_EN_WORD 0x33
441 #define BYTE_EN_BYTE 0x11
442 #define BYTE_EN_SIX_BYTES 0x3f
443 #define BYTE_EN_START_MASK 0x0f
444 #define BYTE_EN_END_MASK 0xf0
446 #define RTL8153_MAX_PACKET 9216 /* 9K */
447 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
448 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
449 #define RTL8153_RMS RTL8153_MAX_PACKET
450 #define RTL8152_TX_TIMEOUT (5 * HZ)
463 /* Define these values to match your device */
464 #define VENDOR_ID_REALTEK 0x0bda
465 #define VENDOR_ID_SAMSUNG 0x04e8
467 #define MCU_TYPE_PLA 0x0100
468 #define MCU_TYPE_USB 0x0000
470 struct tally_counter {
477 __le32 tx_one_collision;
478 __le32 tx_multi_collision;
488 #define RX_LEN_MASK 0x7fff
491 #define RD_UDP_CS (1 << 23)
492 #define RD_TCP_CS (1 << 22)
493 #define RD_IPV6_CS (1 << 20)
494 #define RD_IPV4_CS (1 << 19)
497 #define IPF (1 << 23) /* IP checksum fail */
498 #define UDPF (1 << 22) /* UDP checksum fail */
499 #define TCPF (1 << 21) /* TCP checksum fail */
500 #define RX_VLAN_TAG (1 << 16)
509 #define TX_FS (1 << 31) /* First segment of a packet */
510 #define TX_LS (1 << 30) /* Final segment of a packet */
511 #define GTSENDV4 (1 << 28)
512 #define GTSENDV6 (1 << 27)
513 #define GTTCPHO_SHIFT 18
514 #define GTTCPHO_MAX 0x7fU
515 #define TX_LEN_MAX 0x3ffffU
518 #define UDP_CS (1 << 31) /* Calculate UDP/IP checksum */
519 #define TCP_CS (1 << 30) /* Calculate TCP/IP checksum */
520 #define IPV4_CS (1 << 29) /* Calculate IPv4 checksum */
521 #define IPV6_CS (1 << 28) /* Calculate IPv6 checksum */
523 #define MSS_MAX 0x7ffU
524 #define TCPHO_SHIFT 17
525 #define TCPHO_MAX 0x7ffU
526 #define TX_VLAN_TAG (1 << 16)
532 struct list_head list;
534 struct r8152 *context;
540 struct list_head list;
542 struct r8152 *context;
551 struct usb_device *udev;
552 struct tasklet_struct tl;
553 struct usb_interface *intf;
554 struct net_device *netdev;
555 struct urb *intr_urb;
556 struct tx_agg tx_info[RTL8152_MAX_TX];
557 struct rx_agg rx_info[RTL8152_MAX_RX];
558 struct list_head rx_done, tx_free;
559 struct sk_buff_head tx_queue;
560 spinlock_t rx_lock, tx_lock;
561 struct delayed_work schedule;
562 struct mii_if_info mii;
563 struct mutex control; /* use for hw setting */
566 void (*init)(struct r8152 *);
567 int (*enable)(struct r8152 *);
568 void (*disable)(struct r8152 *);
569 void (*up)(struct r8152 *);
570 void (*down)(struct r8152 *);
571 void (*unload)(struct r8152 *);
572 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
573 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
602 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
603 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
605 static const int multicast_filter_limit = 32;
606 static unsigned int agg_buf_sz = 16384;
608 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
609 VLAN_ETH_HLEN - VLAN_HLEN)
612 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
617 tmp = kmalloc(size, GFP_KERNEL);
621 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
622 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
623 value, index, tmp, size, 500);
625 memcpy(data, tmp, size);
632 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
637 tmp = kmemdup(data, size, GFP_KERNEL);
641 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
642 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
643 value, index, tmp, size, 500);
650 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
651 void *data, u16 type)
656 if (test_bit(RTL8152_UNPLUG, &tp->flags))
659 /* both size and indix must be 4 bytes align */
660 if ((size & 3) || !size || (index & 3) || !data)
663 if ((u32)index + (u32)size > 0xffff)
668 ret = get_registers(tp, index, type, limit, data);
676 ret = get_registers(tp, index, type, size, data);
688 set_bit(RTL8152_UNPLUG, &tp->flags);
693 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
694 u16 size, void *data, u16 type)
697 u16 byteen_start, byteen_end, byen;
700 if (test_bit(RTL8152_UNPLUG, &tp->flags))
703 /* both size and indix must be 4 bytes align */
704 if ((size & 3) || !size || (index & 3) || !data)
707 if ((u32)index + (u32)size > 0xffff)
710 byteen_start = byteen & BYTE_EN_START_MASK;
711 byteen_end = byteen & BYTE_EN_END_MASK;
713 byen = byteen_start | (byteen_start << 4);
714 ret = set_registers(tp, index, type | byen, 4, data);
727 ret = set_registers(tp, index,
728 type | BYTE_EN_DWORD,
737 ret = set_registers(tp, index,
738 type | BYTE_EN_DWORD,
750 byen = byteen_end | (byteen_end >> 4);
751 ret = set_registers(tp, index, type | byen, 4, data);
758 set_bit(RTL8152_UNPLUG, &tp->flags);
764 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
766 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
770 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
772 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
776 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
778 return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
782 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
784 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
787 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
791 generic_ocp_read(tp, index, sizeof(data), &data, type);
793 return __le32_to_cpu(data);
796 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
798 __le32 tmp = __cpu_to_le32(data);
800 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
803 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
807 u8 shift = index & 2;
811 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
813 data = __le32_to_cpu(tmp);
814 data >>= (shift * 8);
820 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
824 u16 byen = BYTE_EN_WORD;
825 u8 shift = index & 2;
831 mask <<= (shift * 8);
832 data <<= (shift * 8);
836 tmp = __cpu_to_le32(data);
838 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
841 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
845 u8 shift = index & 3;
849 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
851 data = __le32_to_cpu(tmp);
852 data >>= (shift * 8);
858 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
862 u16 byen = BYTE_EN_BYTE;
863 u8 shift = index & 3;
869 mask <<= (shift * 8);
870 data <<= (shift * 8);
874 tmp = __cpu_to_le32(data);
876 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
879 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
881 u16 ocp_base, ocp_index;
883 ocp_base = addr & 0xf000;
884 if (ocp_base != tp->ocp_base) {
885 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
886 tp->ocp_base = ocp_base;
889 ocp_index = (addr & 0x0fff) | 0xb000;
890 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
893 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
895 u16 ocp_base, ocp_index;
897 ocp_base = addr & 0xf000;
898 if (ocp_base != tp->ocp_base) {
899 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
900 tp->ocp_base = ocp_base;
903 ocp_index = (addr & 0x0fff) | 0xb000;
904 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
907 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
909 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
912 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
914 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
917 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
919 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
920 ocp_reg_write(tp, OCP_SRAM_DATA, data);
923 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
925 struct r8152 *tp = netdev_priv(netdev);
928 if (test_bit(RTL8152_UNPLUG, &tp->flags))
931 if (phy_id != R8152_PHY_ID)
934 ret = r8152_mdio_read(tp, reg);
940 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
942 struct r8152 *tp = netdev_priv(netdev);
944 if (test_bit(RTL8152_UNPLUG, &tp->flags))
947 if (phy_id != R8152_PHY_ID)
950 r8152_mdio_write(tp, reg, val);
954 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
956 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
958 struct r8152 *tp = netdev_priv(netdev);
959 struct sockaddr *addr = p;
960 int ret = -EADDRNOTAVAIL;
962 if (!is_valid_ether_addr(addr->sa_data))
965 ret = usb_autopm_get_interface(tp->intf);
969 mutex_lock(&tp->control);
971 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
973 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
974 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
975 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
977 mutex_unlock(&tp->control);
979 usb_autopm_put_interface(tp->intf);
984 static int set_ethernet_addr(struct r8152 *tp)
986 struct net_device *dev = tp->netdev;
990 if (tp->version == RTL_VER_01)
991 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
993 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
996 netif_err(tp, probe, dev, "Get ether addr fail\n");
997 } else if (!is_valid_ether_addr(sa.sa_data)) {
998 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1000 eth_hw_addr_random(dev);
1001 ether_addr_copy(sa.sa_data, dev->dev_addr);
1002 ret = rtl8152_set_mac_address(dev, &sa);
1003 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1006 if (tp->version == RTL_VER_01)
1007 ether_addr_copy(dev->dev_addr, sa.sa_data);
1009 ret = rtl8152_set_mac_address(dev, &sa);
1015 static void read_bulk_callback(struct urb *urb)
1017 struct net_device *netdev;
1018 int status = urb->status;
1030 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1033 if (!test_bit(WORK_ENABLE, &tp->flags))
1036 netdev = tp->netdev;
1038 /* When link down, the driver would cancel all bulks. */
1039 /* This avoid the re-submitting bulk */
1040 if (!netif_carrier_ok(netdev))
1043 usb_mark_last_busy(tp->udev);
1047 if (urb->actual_length < ETH_ZLEN)
1050 spin_lock(&tp->rx_lock);
1051 list_add_tail(&agg->list, &tp->rx_done);
1052 spin_unlock(&tp->rx_lock);
1053 tasklet_schedule(&tp->tl);
1056 set_bit(RTL8152_UNPLUG, &tp->flags);
1057 netif_device_detach(tp->netdev);
1060 return; /* the urb is in unlink state */
1062 if (net_ratelimit())
1063 netdev_warn(netdev, "maybe reset is needed?\n");
1066 if (net_ratelimit())
1067 netdev_warn(netdev, "Rx status %d\n", status);
1071 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1074 static void write_bulk_callback(struct urb *urb)
1076 struct net_device_stats *stats;
1077 struct net_device *netdev;
1080 int status = urb->status;
1090 netdev = tp->netdev;
1091 stats = &netdev->stats;
1093 if (net_ratelimit())
1094 netdev_warn(netdev, "Tx status %d\n", status);
1095 stats->tx_errors += agg->skb_num;
1097 stats->tx_packets += agg->skb_num;
1098 stats->tx_bytes += agg->skb_len;
1101 spin_lock(&tp->tx_lock);
1102 list_add_tail(&agg->list, &tp->tx_free);
1103 spin_unlock(&tp->tx_lock);
1105 usb_autopm_put_interface_async(tp->intf);
1107 if (!netif_carrier_ok(netdev))
1110 if (!test_bit(WORK_ENABLE, &tp->flags))
1113 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1116 if (!skb_queue_empty(&tp->tx_queue))
1117 tasklet_schedule(&tp->tl);
1120 static void intr_callback(struct urb *urb)
1124 int status = urb->status;
1131 if (!test_bit(WORK_ENABLE, &tp->flags))
1134 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1138 case 0: /* success */
1140 case -ECONNRESET: /* unlink */
1142 netif_device_detach(tp->netdev);
1145 netif_info(tp, intr, tp->netdev,
1146 "Stop submitting intr, status %d\n", status);
1149 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1151 /* -EPIPE: should clear the halt */
1153 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1157 d = urb->transfer_buffer;
1158 if (INTR_LINK & __le16_to_cpu(d[0])) {
1159 if (!(tp->speed & LINK_STATUS)) {
1160 set_bit(RTL8152_LINK_CHG, &tp->flags);
1161 schedule_delayed_work(&tp->schedule, 0);
1164 if (tp->speed & LINK_STATUS) {
1165 set_bit(RTL8152_LINK_CHG, &tp->flags);
1166 schedule_delayed_work(&tp->schedule, 0);
1171 res = usb_submit_urb(urb, GFP_ATOMIC);
1172 if (res == -ENODEV) {
1173 set_bit(RTL8152_UNPLUG, &tp->flags);
1174 netif_device_detach(tp->netdev);
1176 netif_err(tp, intr, tp->netdev,
1177 "can't resubmit intr, status %d\n", res);
1181 static inline void *rx_agg_align(void *data)
1183 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1186 static inline void *tx_agg_align(void *data)
1188 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1191 static void free_all_mem(struct r8152 *tp)
1195 for (i = 0; i < RTL8152_MAX_RX; i++) {
1196 usb_free_urb(tp->rx_info[i].urb);
1197 tp->rx_info[i].urb = NULL;
1199 kfree(tp->rx_info[i].buffer);
1200 tp->rx_info[i].buffer = NULL;
1201 tp->rx_info[i].head = NULL;
1204 for (i = 0; i < RTL8152_MAX_TX; i++) {
1205 usb_free_urb(tp->tx_info[i].urb);
1206 tp->tx_info[i].urb = NULL;
1208 kfree(tp->tx_info[i].buffer);
1209 tp->tx_info[i].buffer = NULL;
1210 tp->tx_info[i].head = NULL;
1213 usb_free_urb(tp->intr_urb);
1214 tp->intr_urb = NULL;
1216 kfree(tp->intr_buff);
1217 tp->intr_buff = NULL;
1220 static int alloc_all_mem(struct r8152 *tp)
1222 struct net_device *netdev = tp->netdev;
1223 struct usb_interface *intf = tp->intf;
1224 struct usb_host_interface *alt = intf->cur_altsetting;
1225 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1230 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1232 spin_lock_init(&tp->rx_lock);
1233 spin_lock_init(&tp->tx_lock);
1234 INIT_LIST_HEAD(&tp->tx_free);
1235 skb_queue_head_init(&tp->tx_queue);
1237 for (i = 0; i < RTL8152_MAX_RX; i++) {
1238 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1242 if (buf != rx_agg_align(buf)) {
1244 buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1250 urb = usb_alloc_urb(0, GFP_KERNEL);
1256 INIT_LIST_HEAD(&tp->rx_info[i].list);
1257 tp->rx_info[i].context = tp;
1258 tp->rx_info[i].urb = urb;
1259 tp->rx_info[i].buffer = buf;
1260 tp->rx_info[i].head = rx_agg_align(buf);
1263 for (i = 0; i < RTL8152_MAX_TX; i++) {
1264 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1268 if (buf != tx_agg_align(buf)) {
1270 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1276 urb = usb_alloc_urb(0, GFP_KERNEL);
1282 INIT_LIST_HEAD(&tp->tx_info[i].list);
1283 tp->tx_info[i].context = tp;
1284 tp->tx_info[i].urb = urb;
1285 tp->tx_info[i].buffer = buf;
1286 tp->tx_info[i].head = tx_agg_align(buf);
1288 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1291 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1295 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1299 tp->intr_interval = (int)ep_intr->desc.bInterval;
1300 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1301 tp->intr_buff, INTBUFSIZE, intr_callback,
1302 tp, tp->intr_interval);
1311 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1313 struct tx_agg *agg = NULL;
1314 unsigned long flags;
1316 if (list_empty(&tp->tx_free))
1319 spin_lock_irqsave(&tp->tx_lock, flags);
1320 if (!list_empty(&tp->tx_free)) {
1321 struct list_head *cursor;
1323 cursor = tp->tx_free.next;
1324 list_del_init(cursor);
1325 agg = list_entry(cursor, struct tx_agg, list);
1327 spin_unlock_irqrestore(&tp->tx_lock, flags);
1332 static inline __be16 get_protocol(struct sk_buff *skb)
1336 if (skb->protocol == htons(ETH_P_8021Q))
1337 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
1339 protocol = skb->protocol;
1344 /* r8152_csum_workaround()
1345 * The hw limites the value the transport offset. When the offset is out of the
1346 * range, calculate the checksum by sw.
1348 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1349 struct sk_buff_head *list)
1351 if (skb_shinfo(skb)->gso_size) {
1352 netdev_features_t features = tp->netdev->features;
1353 struct sk_buff_head seg_list;
1354 struct sk_buff *segs, *nskb;
1356 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1357 segs = skb_gso_segment(skb, features);
1358 if (IS_ERR(segs) || !segs)
1361 __skb_queue_head_init(&seg_list);
1367 __skb_queue_tail(&seg_list, nskb);
1370 skb_queue_splice(&seg_list, list);
1372 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1373 if (skb_checksum_help(skb) < 0)
1376 __skb_queue_head(list, skb);
1378 struct net_device_stats *stats;
1381 stats = &tp->netdev->stats;
1382 stats->tx_dropped++;
1387 /* msdn_giant_send_check()
1388 * According to the document of microsoft, the TCP Pseudo Header excludes the
1389 * packet length for IPv6 TCP large packets.
1391 static int msdn_giant_send_check(struct sk_buff *skb)
1393 const struct ipv6hdr *ipv6h;
1397 ret = skb_cow_head(skb, 0);
1401 ipv6h = ipv6_hdr(skb);
1405 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1410 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1412 if (vlan_tx_tag_present(skb)) {
1415 opts2 = TX_VLAN_TAG | swab16(vlan_tx_tag_get(skb));
1416 desc->opts2 |= cpu_to_le32(opts2);
1420 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1422 u32 opts2 = le32_to_cpu(desc->opts2);
1424 if (opts2 & RX_VLAN_TAG)
1425 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1426 swab16(opts2 & 0xffff));
1429 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1430 struct sk_buff *skb, u32 len, u32 transport_offset)
1432 u32 mss = skb_shinfo(skb)->gso_size;
1433 u32 opts1, opts2 = 0;
1434 int ret = TX_CSUM_SUCCESS;
1436 WARN_ON_ONCE(len > TX_LEN_MAX);
1438 opts1 = len | TX_FS | TX_LS;
1441 if (transport_offset > GTTCPHO_MAX) {
1442 netif_warn(tp, tx_err, tp->netdev,
1443 "Invalid transport offset 0x%x for TSO\n",
1449 switch (get_protocol(skb)) {
1450 case htons(ETH_P_IP):
1454 case htons(ETH_P_IPV6):
1455 if (msdn_giant_send_check(skb)) {
1467 opts1 |= transport_offset << GTTCPHO_SHIFT;
1468 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1469 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1472 if (transport_offset > TCPHO_MAX) {
1473 netif_warn(tp, tx_err, tp->netdev,
1474 "Invalid transport offset 0x%x\n",
1480 switch (get_protocol(skb)) {
1481 case htons(ETH_P_IP):
1483 ip_protocol = ip_hdr(skb)->protocol;
1486 case htons(ETH_P_IPV6):
1488 ip_protocol = ipv6_hdr(skb)->nexthdr;
1492 ip_protocol = IPPROTO_RAW;
1496 if (ip_protocol == IPPROTO_TCP)
1498 else if (ip_protocol == IPPROTO_UDP)
1503 opts2 |= transport_offset << TCPHO_SHIFT;
1506 desc->opts2 = cpu_to_le32(opts2);
1507 desc->opts1 = cpu_to_le32(opts1);
1513 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1515 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1519 __skb_queue_head_init(&skb_head);
1520 spin_lock(&tx_queue->lock);
1521 skb_queue_splice_init(tx_queue, &skb_head);
1522 spin_unlock(&tx_queue->lock);
1524 tx_data = agg->head;
1527 remain = agg_buf_sz;
1529 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1530 struct tx_desc *tx_desc;
1531 struct sk_buff *skb;
1535 skb = __skb_dequeue(&skb_head);
1539 len = skb->len + sizeof(*tx_desc);
1542 __skb_queue_head(&skb_head, skb);
1546 tx_data = tx_agg_align(tx_data);
1547 tx_desc = (struct tx_desc *)tx_data;
1549 offset = (u32)skb_transport_offset(skb);
1551 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1552 r8152_csum_workaround(tp, skb, &skb_head);
1556 rtl_tx_vlan_tag(tx_desc, skb);
1558 tx_data += sizeof(*tx_desc);
1561 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1562 struct net_device_stats *stats = &tp->netdev->stats;
1564 stats->tx_dropped++;
1565 dev_kfree_skb_any(skb);
1566 tx_data -= sizeof(*tx_desc);
1571 agg->skb_len += len;
1574 dev_kfree_skb_any(skb);
1576 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1579 if (!skb_queue_empty(&skb_head)) {
1580 spin_lock(&tx_queue->lock);
1581 skb_queue_splice(&skb_head, tx_queue);
1582 spin_unlock(&tx_queue->lock);
1585 netif_tx_lock(tp->netdev);
1587 if (netif_queue_stopped(tp->netdev) &&
1588 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1589 netif_wake_queue(tp->netdev);
1591 netif_tx_unlock(tp->netdev);
1593 ret = usb_autopm_get_interface_async(tp->intf);
1597 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1598 agg->head, (int)(tx_data - (u8 *)agg->head),
1599 (usb_complete_t)write_bulk_callback, agg);
1601 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1603 usb_autopm_put_interface_async(tp->intf);
1609 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1611 u8 checksum = CHECKSUM_NONE;
1614 if (tp->version == RTL_VER_01)
1617 opts2 = le32_to_cpu(rx_desc->opts2);
1618 opts3 = le32_to_cpu(rx_desc->opts3);
1620 if (opts2 & RD_IPV4_CS) {
1622 checksum = CHECKSUM_NONE;
1623 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1624 checksum = CHECKSUM_NONE;
1625 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1626 checksum = CHECKSUM_NONE;
1628 checksum = CHECKSUM_UNNECESSARY;
1629 } else if (RD_IPV6_CS) {
1630 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1631 checksum = CHECKSUM_UNNECESSARY;
1632 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1633 checksum = CHECKSUM_UNNECESSARY;
1640 static void rx_bottom(struct r8152 *tp)
1642 unsigned long flags;
1643 struct list_head *cursor, *next, rx_queue;
1645 if (list_empty(&tp->rx_done))
1648 INIT_LIST_HEAD(&rx_queue);
1649 spin_lock_irqsave(&tp->rx_lock, flags);
1650 list_splice_init(&tp->rx_done, &rx_queue);
1651 spin_unlock_irqrestore(&tp->rx_lock, flags);
1653 list_for_each_safe(cursor, next, &rx_queue) {
1654 struct rx_desc *rx_desc;
1660 list_del_init(cursor);
1662 agg = list_entry(cursor, struct rx_agg, list);
1664 if (urb->actual_length < ETH_ZLEN)
1667 rx_desc = agg->head;
1668 rx_data = agg->head;
1669 len_used += sizeof(struct rx_desc);
1671 while (urb->actual_length > len_used) {
1672 struct net_device *netdev = tp->netdev;
1673 struct net_device_stats *stats = &netdev->stats;
1674 unsigned int pkt_len;
1675 struct sk_buff *skb;
1677 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1678 if (pkt_len < ETH_ZLEN)
1681 len_used += pkt_len;
1682 if (urb->actual_length < len_used)
1685 pkt_len -= CRC_SIZE;
1686 rx_data += sizeof(struct rx_desc);
1688 skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1690 stats->rx_dropped++;
1694 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1695 memcpy(skb->data, rx_data, pkt_len);
1696 skb_put(skb, pkt_len);
1697 skb->protocol = eth_type_trans(skb, netdev);
1698 rtl_rx_vlan_tag(rx_desc, skb);
1699 netif_receive_skb(skb);
1700 stats->rx_packets++;
1701 stats->rx_bytes += pkt_len;
1704 rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1705 rx_desc = (struct rx_desc *)rx_data;
1706 len_used = (int)(rx_data - (u8 *)agg->head);
1707 len_used += sizeof(struct rx_desc);
1711 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1715 static void tx_bottom(struct r8152 *tp)
1722 if (skb_queue_empty(&tp->tx_queue))
1725 agg = r8152_get_tx_agg(tp);
1729 res = r8152_tx_agg_fill(tp, agg);
1731 struct net_device *netdev = tp->netdev;
1733 if (res == -ENODEV) {
1734 set_bit(RTL8152_UNPLUG, &tp->flags);
1735 netif_device_detach(netdev);
1737 struct net_device_stats *stats = &netdev->stats;
1738 unsigned long flags;
1740 netif_warn(tp, tx_err, netdev,
1741 "failed tx_urb %d\n", res);
1742 stats->tx_dropped += agg->skb_num;
1744 spin_lock_irqsave(&tp->tx_lock, flags);
1745 list_add_tail(&agg->list, &tp->tx_free);
1746 spin_unlock_irqrestore(&tp->tx_lock, flags);
1752 static void bottom_half(unsigned long data)
1756 tp = (struct r8152 *)data;
1758 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1761 if (!test_bit(WORK_ENABLE, &tp->flags))
1764 /* When link down, the driver would cancel all bulks. */
1765 /* This avoid the re-submitting bulk */
1766 if (!netif_carrier_ok(tp->netdev))
1769 clear_bit(SCHEDULE_TASKLET, &tp->flags);
1776 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1780 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1781 agg->head, agg_buf_sz,
1782 (usb_complete_t)read_bulk_callback, agg);
1784 ret = usb_submit_urb(agg->urb, mem_flags);
1785 if (ret == -ENODEV) {
1786 set_bit(RTL8152_UNPLUG, &tp->flags);
1787 netif_device_detach(tp->netdev);
1789 struct urb *urb = agg->urb;
1790 unsigned long flags;
1792 urb->actual_length = 0;
1793 spin_lock_irqsave(&tp->rx_lock, flags);
1794 list_add_tail(&agg->list, &tp->rx_done);
1795 spin_unlock_irqrestore(&tp->rx_lock, flags);
1796 tasklet_schedule(&tp->tl);
1802 static void rtl_drop_queued_tx(struct r8152 *tp)
1804 struct net_device_stats *stats = &tp->netdev->stats;
1805 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1806 struct sk_buff *skb;
1808 if (skb_queue_empty(tx_queue))
1811 __skb_queue_head_init(&skb_head);
1812 spin_lock_bh(&tx_queue->lock);
1813 skb_queue_splice_init(tx_queue, &skb_head);
1814 spin_unlock_bh(&tx_queue->lock);
1816 while ((skb = __skb_dequeue(&skb_head))) {
1818 stats->tx_dropped++;
1822 static void rtl8152_tx_timeout(struct net_device *netdev)
1824 struct r8152 *tp = netdev_priv(netdev);
1827 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1828 for (i = 0; i < RTL8152_MAX_TX; i++)
1829 usb_unlink_urb(tp->tx_info[i].urb);
1832 static void rtl8152_set_rx_mode(struct net_device *netdev)
1834 struct r8152 *tp = netdev_priv(netdev);
1836 if (tp->speed & LINK_STATUS) {
1837 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1838 schedule_delayed_work(&tp->schedule, 0);
1842 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1844 struct r8152 *tp = netdev_priv(netdev);
1845 u32 mc_filter[2]; /* Multicast hash filter */
1849 clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
1850 netif_stop_queue(netdev);
1851 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1852 ocp_data &= ~RCR_ACPT_ALL;
1853 ocp_data |= RCR_AB | RCR_APM;
1855 if (netdev->flags & IFF_PROMISC) {
1856 /* Unconditionally log net taps. */
1857 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1858 ocp_data |= RCR_AM | RCR_AAP;
1859 mc_filter[1] = 0xffffffff;
1860 mc_filter[0] = 0xffffffff;
1861 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1862 (netdev->flags & IFF_ALLMULTI)) {
1863 /* Too many to filter perfectly -- accept all multicasts. */
1865 mc_filter[1] = 0xffffffff;
1866 mc_filter[0] = 0xffffffff;
1868 struct netdev_hw_addr *ha;
1872 netdev_for_each_mc_addr(ha, netdev) {
1873 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1875 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1880 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1881 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1883 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1884 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1885 netif_wake_queue(netdev);
1888 static netdev_features_t
1889 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
1890 netdev_features_t features)
1892 u32 mss = skb_shinfo(skb)->gso_size;
1893 int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
1894 int offset = skb_transport_offset(skb);
1896 if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
1897 features &= ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
1898 else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
1899 features &= ~NETIF_F_GSO_MASK;
1904 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
1905 struct net_device *netdev)
1907 struct r8152 *tp = netdev_priv(netdev);
1909 skb_tx_timestamp(skb);
1911 skb_queue_tail(&tp->tx_queue, skb);
1913 if (!list_empty(&tp->tx_free)) {
1914 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
1915 set_bit(SCHEDULE_TASKLET, &tp->flags);
1916 schedule_delayed_work(&tp->schedule, 0);
1918 usb_mark_last_busy(tp->udev);
1919 tasklet_schedule(&tp->tl);
1921 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
1922 netif_stop_queue(netdev);
1925 return NETDEV_TX_OK;
1928 static void r8152b_reset_packet_filter(struct r8152 *tp)
1932 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
1933 ocp_data &= ~FMC_FCR_MCU_EN;
1934 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1935 ocp_data |= FMC_FCR_MCU_EN;
1936 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1939 static void rtl8152_nic_reset(struct r8152 *tp)
1943 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
1945 for (i = 0; i < 1000; i++) {
1946 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
1948 usleep_range(100, 400);
1952 static void set_tx_qlen(struct r8152 *tp)
1954 struct net_device *netdev = tp->netdev;
1956 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
1957 sizeof(struct tx_desc));
1960 static inline u8 rtl8152_get_speed(struct r8152 *tp)
1962 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
1965 static void rtl_set_eee_plus(struct r8152 *tp)
1970 speed = rtl8152_get_speed(tp);
1971 if (speed & _10bps) {
1972 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1973 ocp_data |= EEEP_CR_EEEP_TX;
1974 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1976 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1977 ocp_data &= ~EEEP_CR_EEEP_TX;
1978 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1982 static void rxdy_gated_en(struct r8152 *tp, bool enable)
1986 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1988 ocp_data |= RXDY_GATED_EN;
1990 ocp_data &= ~RXDY_GATED_EN;
1991 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1994 static int rtl_start_rx(struct r8152 *tp)
1998 INIT_LIST_HEAD(&tp->rx_done);
1999 for (i = 0; i < RTL8152_MAX_RX; i++) {
2000 INIT_LIST_HEAD(&tp->rx_info[i].list);
2001 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2006 if (ret && ++i < RTL8152_MAX_RX) {
2007 struct list_head rx_queue;
2008 unsigned long flags;
2010 INIT_LIST_HEAD(&rx_queue);
2013 struct rx_agg *agg = &tp->rx_info[i++];
2014 struct urb *urb = agg->urb;
2016 urb->actual_length = 0;
2017 list_add_tail(&agg->list, &rx_queue);
2018 } while (i < RTL8152_MAX_RX);
2020 spin_lock_irqsave(&tp->rx_lock, flags);
2021 list_splice_tail(&rx_queue, &tp->rx_done);
2022 spin_unlock_irqrestore(&tp->rx_lock, flags);
2028 static int rtl_stop_rx(struct r8152 *tp)
2032 for (i = 0; i < RTL8152_MAX_RX; i++)
2033 usb_kill_urb(tp->rx_info[i].urb);
2038 static int rtl_enable(struct r8152 *tp)
2042 r8152b_reset_packet_filter(tp);
2044 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2045 ocp_data |= CR_RE | CR_TE;
2046 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2048 rxdy_gated_en(tp, false);
2050 return rtl_start_rx(tp);
2053 static int rtl8152_enable(struct r8152 *tp)
2055 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2059 rtl_set_eee_plus(tp);
2061 return rtl_enable(tp);
2064 static void r8153_set_rx_agg(struct r8152 *tp)
2068 speed = rtl8152_get_speed(tp);
2069 if (speed & _1000bps) {
2070 if (tp->udev->speed == USB_SPEED_SUPER) {
2071 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
2073 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2076 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
2078 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2082 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_SLOW);
2083 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2088 static int rtl8153_enable(struct r8152 *tp)
2090 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2094 rtl_set_eee_plus(tp);
2095 r8153_set_rx_agg(tp);
2097 return rtl_enable(tp);
2100 static void rtl_disable(struct r8152 *tp)
2105 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2106 rtl_drop_queued_tx(tp);
2110 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2111 ocp_data &= ~RCR_ACPT_ALL;
2112 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2114 rtl_drop_queued_tx(tp);
2116 for (i = 0; i < RTL8152_MAX_TX; i++)
2117 usb_kill_urb(tp->tx_info[i].urb);
2119 rxdy_gated_en(tp, true);
2121 for (i = 0; i < 1000; i++) {
2122 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2123 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2125 usleep_range(1000, 2000);
2128 for (i = 0; i < 1000; i++) {
2129 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2131 usleep_range(1000, 2000);
2136 rtl8152_nic_reset(tp);
2139 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2143 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2145 ocp_data |= POWER_CUT;
2147 ocp_data &= ~POWER_CUT;
2148 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2150 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2151 ocp_data &= ~RESUME_INDICATE;
2152 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2155 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2159 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2161 ocp_data |= CPCR_RX_VLAN;
2163 ocp_data &= ~CPCR_RX_VLAN;
2164 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2167 static int rtl8152_set_features(struct net_device *dev,
2168 netdev_features_t features)
2170 netdev_features_t changed = features ^ dev->features;
2171 struct r8152 *tp = netdev_priv(dev);
2174 ret = usb_autopm_get_interface(tp->intf);
2178 mutex_lock(&tp->control);
2180 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2181 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2182 rtl_rx_vlan_en(tp, true);
2184 rtl_rx_vlan_en(tp, false);
2187 mutex_unlock(&tp->control);
2189 usb_autopm_put_interface(tp->intf);
2195 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2197 static u32 __rtl_get_wol(struct r8152 *tp)
2202 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2203 if (!(ocp_data & LAN_WAKE_EN))
2206 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2207 if (ocp_data & LINK_ON_WAKE_EN)
2208 wolopts |= WAKE_PHY;
2210 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2211 if (ocp_data & UWF_EN)
2212 wolopts |= WAKE_UCAST;
2213 if (ocp_data & BWF_EN)
2214 wolopts |= WAKE_BCAST;
2215 if (ocp_data & MWF_EN)
2216 wolopts |= WAKE_MCAST;
2218 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2219 if (ocp_data & MAGIC_EN)
2220 wolopts |= WAKE_MAGIC;
2225 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2229 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2231 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2232 ocp_data &= ~LINK_ON_WAKE_EN;
2233 if (wolopts & WAKE_PHY)
2234 ocp_data |= LINK_ON_WAKE_EN;
2235 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2237 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2238 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2239 if (wolopts & WAKE_UCAST)
2241 if (wolopts & WAKE_BCAST)
2243 if (wolopts & WAKE_MCAST)
2245 if (wolopts & WAKE_ANY)
2246 ocp_data |= LAN_WAKE_EN;
2247 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2249 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2251 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2252 ocp_data &= ~MAGIC_EN;
2253 if (wolopts & WAKE_MAGIC)
2254 ocp_data |= MAGIC_EN;
2255 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2257 if (wolopts & WAKE_ANY)
2258 device_set_wakeup_enable(&tp->udev->dev, true);
2260 device_set_wakeup_enable(&tp->udev->dev, false);
2263 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2268 __rtl_set_wol(tp, WAKE_ANY);
2270 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2272 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2273 ocp_data |= LINK_OFF_WAKE_EN;
2274 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2276 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2278 __rtl_set_wol(tp, tp->saved_wolopts);
2282 static void rtl_phy_reset(struct r8152 *tp)
2287 clear_bit(PHY_RESET, &tp->flags);
2289 data = r8152_mdio_read(tp, MII_BMCR);
2291 /* don't reset again before the previous one complete */
2292 if (data & BMCR_RESET)
2296 r8152_mdio_write(tp, MII_BMCR, data);
2298 for (i = 0; i < 50; i++) {
2300 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2305 static void r8153_teredo_off(struct r8152 *tp)
2309 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2310 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2311 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2313 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2314 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2315 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2318 static void r8152b_disable_aldps(struct r8152 *tp)
2320 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
2324 static inline void r8152b_enable_aldps(struct r8152 *tp)
2326 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2327 LINKENA | DIS_SDSAVE);
2330 static void rtl8152_disable(struct r8152 *tp)
2332 r8152b_disable_aldps(tp);
2334 r8152b_enable_aldps(tp);
2337 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2341 data = r8152_mdio_read(tp, MII_BMCR);
2342 if (data & BMCR_PDOWN) {
2343 data &= ~BMCR_PDOWN;
2344 r8152_mdio_write(tp, MII_BMCR, data);
2347 set_bit(PHY_RESET, &tp->flags);
2350 static void r8152b_exit_oob(struct r8152 *tp)
2355 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2356 ocp_data &= ~RCR_ACPT_ALL;
2357 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2359 rxdy_gated_en(tp, true);
2360 r8153_teredo_off(tp);
2361 r8152b_hw_phy_cfg(tp);
2363 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2364 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2366 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2367 ocp_data &= ~NOW_IS_OOB;
2368 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2370 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2371 ocp_data &= ~MCU_BORW_EN;
2372 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2374 for (i = 0; i < 1000; i++) {
2375 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2376 if (ocp_data & LINK_LIST_READY)
2378 usleep_range(1000, 2000);
2381 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2382 ocp_data |= RE_INIT_LL;
2383 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2385 for (i = 0; i < 1000; i++) {
2386 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2387 if (ocp_data & LINK_LIST_READY)
2389 usleep_range(1000, 2000);
2392 rtl8152_nic_reset(tp);
2394 /* rx share fifo credit full threshold */
2395 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2397 if (tp->udev->speed == USB_SPEED_FULL ||
2398 tp->udev->speed == USB_SPEED_LOW) {
2399 /* rx share fifo credit near full threshold */
2400 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2402 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2405 /* rx share fifo credit near full threshold */
2406 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2408 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2412 /* TX share fifo free credit full threshold */
2413 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2415 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2416 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2417 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2418 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2420 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2422 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2424 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2425 ocp_data |= TCR0_AUTO_FIFO;
2426 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2429 static void r8152b_enter_oob(struct r8152 *tp)
2434 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2435 ocp_data &= ~NOW_IS_OOB;
2436 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2438 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2439 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2440 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2444 for (i = 0; i < 1000; i++) {
2445 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2446 if (ocp_data & LINK_LIST_READY)
2448 usleep_range(1000, 2000);
2451 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2452 ocp_data |= RE_INIT_LL;
2453 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2455 for (i = 0; i < 1000; i++) {
2456 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2457 if (ocp_data & LINK_LIST_READY)
2459 usleep_range(1000, 2000);
2462 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2464 rtl_rx_vlan_en(tp, true);
2466 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2467 ocp_data |= ALDPS_PROXY_MODE;
2468 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2470 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2471 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2472 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2474 rxdy_gated_en(tp, false);
2476 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2477 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2478 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2481 static void r8153_hw_phy_cfg(struct r8152 *tp)
2486 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2487 data = r8152_mdio_read(tp, MII_BMCR);
2488 if (data & BMCR_PDOWN) {
2489 data &= ~BMCR_PDOWN;
2490 r8152_mdio_write(tp, MII_BMCR, data);
2493 if (tp->version == RTL_VER_03) {
2494 data = ocp_reg_read(tp, OCP_EEE_CFG);
2495 data &= ~CTAP_SHORT_EN;
2496 ocp_reg_write(tp, OCP_EEE_CFG, data);
2499 data = ocp_reg_read(tp, OCP_POWER_CFG);
2500 data |= EEE_CLKDIV_EN;
2501 ocp_reg_write(tp, OCP_POWER_CFG, data);
2503 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2504 data |= EN_10M_BGOFF;
2505 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2506 data = ocp_reg_read(tp, OCP_POWER_CFG);
2507 data |= EN_10M_PLLOFF;
2508 ocp_reg_write(tp, OCP_POWER_CFG, data);
2509 sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2511 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2512 ocp_data |= PFM_PWM_SWITCH;
2513 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2515 /* Enable LPF corner auto tune */
2516 sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2518 /* Adjust 10M Amplitude */
2519 sram_write(tp, SRAM_10M_AMP1, 0x00af);
2520 sram_write(tp, SRAM_10M_AMP2, 0x0208);
2522 set_bit(PHY_RESET, &tp->flags);
2525 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2530 memset(u1u2, 0xff, sizeof(u1u2));
2532 memset(u1u2, 0x00, sizeof(u1u2));
2534 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2537 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2541 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2543 ocp_data |= U2P3_ENABLE;
2545 ocp_data &= ~U2P3_ENABLE;
2546 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2549 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2553 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2555 ocp_data |= PWR_EN | PHASE2_EN;
2557 ocp_data &= ~(PWR_EN | PHASE2_EN);
2558 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2560 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2561 ocp_data &= ~PCUT_STATUS;
2562 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2565 static void r8153_first_init(struct r8152 *tp)
2570 rxdy_gated_en(tp, true);
2571 r8153_teredo_off(tp);
2573 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2574 ocp_data &= ~RCR_ACPT_ALL;
2575 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2577 r8153_hw_phy_cfg(tp);
2579 rtl8152_nic_reset(tp);
2581 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2582 ocp_data &= ~NOW_IS_OOB;
2583 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2585 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2586 ocp_data &= ~MCU_BORW_EN;
2587 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2589 for (i = 0; i < 1000; i++) {
2590 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2591 if (ocp_data & LINK_LIST_READY)
2593 usleep_range(1000, 2000);
2596 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2597 ocp_data |= RE_INIT_LL;
2598 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2600 for (i = 0; i < 1000; i++) {
2601 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2602 if (ocp_data & LINK_LIST_READY)
2604 usleep_range(1000, 2000);
2607 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2609 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2610 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2612 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2613 ocp_data |= TCR0_AUTO_FIFO;
2614 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2616 rtl8152_nic_reset(tp);
2618 /* rx share fifo credit full threshold */
2619 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2620 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2621 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2622 /* TX share fifo free credit full threshold */
2623 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2625 /* rx aggregation */
2626 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2627 ocp_data &= ~RX_AGG_DISABLE;
2628 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2631 static void r8153_enter_oob(struct r8152 *tp)
2636 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2637 ocp_data &= ~NOW_IS_OOB;
2638 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2642 for (i = 0; i < 1000; i++) {
2643 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2644 if (ocp_data & LINK_LIST_READY)
2646 usleep_range(1000, 2000);
2649 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2650 ocp_data |= RE_INIT_LL;
2651 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2653 for (i = 0; i < 1000; i++) {
2654 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2655 if (ocp_data & LINK_LIST_READY)
2657 usleep_range(1000, 2000);
2660 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2662 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2663 ocp_data &= ~TEREDO_WAKE_MASK;
2664 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2666 rtl_rx_vlan_en(tp, true);
2668 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2669 ocp_data |= ALDPS_PROXY_MODE;
2670 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2672 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2673 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2674 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2676 rxdy_gated_en(tp, false);
2678 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2679 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2680 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2683 static void r8153_disable_aldps(struct r8152 *tp)
2687 data = ocp_reg_read(tp, OCP_POWER_CFG);
2689 ocp_reg_write(tp, OCP_POWER_CFG, data);
2693 static void r8153_enable_aldps(struct r8152 *tp)
2697 data = ocp_reg_read(tp, OCP_POWER_CFG);
2699 ocp_reg_write(tp, OCP_POWER_CFG, data);
2702 static void rtl8153_disable(struct r8152 *tp)
2704 r8153_disable_aldps(tp);
2706 r8153_enable_aldps(tp);
2709 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2711 u16 bmcr, anar, gbcr;
2714 cancel_delayed_work_sync(&tp->schedule);
2715 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2716 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2717 ADVERTISE_100HALF | ADVERTISE_100FULL);
2718 if (tp->mii.supports_gmii) {
2719 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2720 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2725 if (autoneg == AUTONEG_DISABLE) {
2726 if (speed == SPEED_10) {
2728 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2729 } else if (speed == SPEED_100) {
2730 bmcr = BMCR_SPEED100;
2731 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2732 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2733 bmcr = BMCR_SPEED1000;
2734 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2740 if (duplex == DUPLEX_FULL)
2741 bmcr |= BMCR_FULLDPLX;
2743 if (speed == SPEED_10) {
2744 if (duplex == DUPLEX_FULL)
2745 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2747 anar |= ADVERTISE_10HALF;
2748 } else if (speed == SPEED_100) {
2749 if (duplex == DUPLEX_FULL) {
2750 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2751 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2753 anar |= ADVERTISE_10HALF;
2754 anar |= ADVERTISE_100HALF;
2756 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2757 if (duplex == DUPLEX_FULL) {
2758 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2759 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2760 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2762 anar |= ADVERTISE_10HALF;
2763 anar |= ADVERTISE_100HALF;
2764 gbcr |= ADVERTISE_1000HALF;
2771 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2774 if (test_bit(PHY_RESET, &tp->flags))
2777 if (tp->mii.supports_gmii)
2778 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2780 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2781 r8152_mdio_write(tp, MII_BMCR, bmcr);
2783 if (test_bit(PHY_RESET, &tp->flags)) {
2786 clear_bit(PHY_RESET, &tp->flags);
2787 for (i = 0; i < 50; i++) {
2789 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2799 static void rtl8152_up(struct r8152 *tp)
2801 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2804 r8152b_disable_aldps(tp);
2805 r8152b_exit_oob(tp);
2806 r8152b_enable_aldps(tp);
2809 static void rtl8152_down(struct r8152 *tp)
2811 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2812 rtl_drop_queued_tx(tp);
2816 r8152_power_cut_en(tp, false);
2817 r8152b_disable_aldps(tp);
2818 r8152b_enter_oob(tp);
2819 r8152b_enable_aldps(tp);
2822 static void rtl8153_up(struct r8152 *tp)
2824 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2827 r8153_disable_aldps(tp);
2828 r8153_first_init(tp);
2829 r8153_enable_aldps(tp);
2832 static void rtl8153_down(struct r8152 *tp)
2834 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2835 rtl_drop_queued_tx(tp);
2839 r8153_u1u2en(tp, false);
2840 r8153_power_cut_en(tp, false);
2841 r8153_disable_aldps(tp);
2842 r8153_enter_oob(tp);
2843 r8153_enable_aldps(tp);
2846 static void set_carrier(struct r8152 *tp)
2848 struct net_device *netdev = tp->netdev;
2851 clear_bit(RTL8152_LINK_CHG, &tp->flags);
2852 speed = rtl8152_get_speed(tp);
2854 if (speed & LINK_STATUS) {
2855 if (!(tp->speed & LINK_STATUS)) {
2856 tp->rtl_ops.enable(tp);
2857 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2858 netif_carrier_on(netdev);
2861 if (tp->speed & LINK_STATUS) {
2862 netif_carrier_off(netdev);
2863 tasklet_disable(&tp->tl);
2864 tp->rtl_ops.disable(tp);
2865 tasklet_enable(&tp->tl);
2871 static void rtl_work_func_t(struct work_struct *work)
2873 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
2875 /* If the device is unplugged or !netif_running(), the workqueue
2876 * doesn't need to wake the device, and could return directly.
2878 if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
2881 if (usb_autopm_get_interface(tp->intf) < 0)
2884 if (!test_bit(WORK_ENABLE, &tp->flags))
2887 if (!mutex_trylock(&tp->control)) {
2888 schedule_delayed_work(&tp->schedule, 0);
2892 if (test_bit(RTL8152_LINK_CHG, &tp->flags))
2895 if (test_bit(RTL8152_SET_RX_MODE, &tp->flags))
2896 _rtl8152_set_rx_mode(tp->netdev);
2898 if (test_bit(SCHEDULE_TASKLET, &tp->flags) &&
2899 (tp->speed & LINK_STATUS)) {
2900 clear_bit(SCHEDULE_TASKLET, &tp->flags);
2901 tasklet_schedule(&tp->tl);
2904 if (test_bit(PHY_RESET, &tp->flags))
2907 mutex_unlock(&tp->control);
2910 usb_autopm_put_interface(tp->intf);
2913 static int rtl8152_open(struct net_device *netdev)
2915 struct r8152 *tp = netdev_priv(netdev);
2918 res = alloc_all_mem(tp);
2922 /* set speed to 0 to avoid autoresume try to submit rx */
2925 res = usb_autopm_get_interface(tp->intf);
2931 mutex_lock(&tp->control);
2933 /* The WORK_ENABLE may be set when autoresume occurs */
2934 if (test_bit(WORK_ENABLE, &tp->flags)) {
2935 clear_bit(WORK_ENABLE, &tp->flags);
2936 usb_kill_urb(tp->intr_urb);
2937 cancel_delayed_work_sync(&tp->schedule);
2939 /* disable the tx/rx, if the workqueue has enabled them. */
2940 if (tp->speed & LINK_STATUS)
2941 tp->rtl_ops.disable(tp);
2946 rtl8152_set_speed(tp, AUTONEG_ENABLE,
2947 tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
2950 netif_carrier_off(netdev);
2951 netif_start_queue(netdev);
2952 set_bit(WORK_ENABLE, &tp->flags);
2954 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
2957 netif_device_detach(tp->netdev);
2958 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
2962 tasklet_enable(&tp->tl);
2965 mutex_unlock(&tp->control);
2967 usb_autopm_put_interface(tp->intf);
2973 static int rtl8152_close(struct net_device *netdev)
2975 struct r8152 *tp = netdev_priv(netdev);
2978 tasklet_disable(&tp->tl);
2979 clear_bit(WORK_ENABLE, &tp->flags);
2980 usb_kill_urb(tp->intr_urb);
2981 cancel_delayed_work_sync(&tp->schedule);
2982 netif_stop_queue(netdev);
2984 res = usb_autopm_get_interface(tp->intf);
2986 rtl_drop_queued_tx(tp);
2988 mutex_lock(&tp->control);
2990 /* The autosuspend may have been enabled and wouldn't
2991 * be disable when autoresume occurs, because the
2992 * netif_running() would be false.
2994 rtl_runtime_suspend_enable(tp, false);
2996 tp->rtl_ops.down(tp);
2998 mutex_unlock(&tp->control);
3000 usb_autopm_put_interface(tp->intf);
3008 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
3010 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
3011 ocp_reg_write(tp, OCP_EEE_DATA, reg);
3012 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
3015 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
3019 r8152_mmd_indirect(tp, dev, reg);
3020 data = ocp_reg_read(tp, OCP_EEE_DATA);
3021 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3026 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3028 r8152_mmd_indirect(tp, dev, reg);
3029 ocp_reg_write(tp, OCP_EEE_DATA, data);
3030 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3033 static void r8152_eee_en(struct r8152 *tp, bool enable)
3035 u16 config1, config2, config3;
3038 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3039 config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3040 config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3041 config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3044 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3045 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3046 config1 |= sd_rise_time(1);
3047 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3048 config3 |= fast_snr(42);
3050 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3051 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3053 config1 |= sd_rise_time(7);
3054 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3055 config3 |= fast_snr(511);
3058 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3059 ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3060 ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3061 ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3064 static void r8152b_enable_eee(struct r8152 *tp)
3066 r8152_eee_en(tp, true);
3067 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3070 static void r8153_eee_en(struct r8152 *tp, bool enable)
3075 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3076 config = ocp_reg_read(tp, OCP_EEE_CFG);
3079 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3082 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3083 config &= ~EEE10_EN;
3086 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3087 ocp_reg_write(tp, OCP_EEE_CFG, config);
3090 static void r8153_enable_eee(struct r8152 *tp)
3092 r8153_eee_en(tp, true);
3093 ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3096 static void r8152b_enable_fc(struct r8152 *tp)
3100 anar = r8152_mdio_read(tp, MII_ADVERTISE);
3101 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3102 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3105 static void rtl_tally_reset(struct r8152 *tp)
3109 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3110 ocp_data |= TALLY_RESET;
3111 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3114 static void r8152b_init(struct r8152 *tp)
3118 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3121 r8152b_disable_aldps(tp);
3123 if (tp->version == RTL_VER_01) {
3124 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3125 ocp_data &= ~LED_MODE_MASK;
3126 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3129 r8152_power_cut_en(tp, false);
3131 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3132 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3133 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3134 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3135 ocp_data &= ~MCU_CLK_RATIO_MASK;
3136 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3137 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3138 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3139 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3140 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3142 r8152b_enable_eee(tp);
3143 r8152b_enable_aldps(tp);
3144 r8152b_enable_fc(tp);
3145 rtl_tally_reset(tp);
3147 /* enable rx aggregation */
3148 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3149 ocp_data &= ~RX_AGG_DISABLE;
3150 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3153 static void r8153_init(struct r8152 *tp)
3158 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3161 r8153_disable_aldps(tp);
3162 r8153_u1u2en(tp, false);
3164 for (i = 0; i < 500; i++) {
3165 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3171 for (i = 0; i < 500; i++) {
3172 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3173 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3178 r8153_u2p3en(tp, false);
3180 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3181 ocp_data &= ~TIMER11_EN;
3182 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3184 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3185 ocp_data &= ~LED_MODE_MASK;
3186 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3188 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL);
3189 ocp_data &= ~LPM_TIMER_MASK;
3190 if (tp->udev->speed == USB_SPEED_SUPER)
3191 ocp_data |= LPM_TIMER_500US;
3193 ocp_data |= LPM_TIMER_500MS;
3194 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3196 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3197 ocp_data &= ~SEN_VAL_MASK;
3198 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3199 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3201 r8153_power_cut_en(tp, false);
3202 r8153_u1u2en(tp, true);
3204 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3205 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3206 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3207 PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3208 U1U2_SPDWN_EN | L1_SPDWN_EN);
3209 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3210 PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3211 TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3214 r8153_enable_eee(tp);
3215 r8153_enable_aldps(tp);
3216 r8152b_enable_fc(tp);
3217 rtl_tally_reset(tp);
3220 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3222 struct r8152 *tp = usb_get_intfdata(intf);
3223 struct net_device *netdev = tp->netdev;
3226 mutex_lock(&tp->control);
3228 if (PMSG_IS_AUTO(message)) {
3229 if (netif_running(netdev) && work_busy(&tp->schedule.work)) {
3234 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3236 netif_device_detach(netdev);
3239 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3240 clear_bit(WORK_ENABLE, &tp->flags);
3241 usb_kill_urb(tp->intr_urb);
3242 tasklet_disable(&tp->tl);
3243 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3245 rtl_runtime_suspend_enable(tp, true);
3247 cancel_delayed_work_sync(&tp->schedule);
3248 tp->rtl_ops.down(tp);
3250 tasklet_enable(&tp->tl);
3253 mutex_unlock(&tp->control);
3258 static int rtl8152_resume(struct usb_interface *intf)
3260 struct r8152 *tp = usb_get_intfdata(intf);
3262 mutex_lock(&tp->control);
3264 if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3265 tp->rtl_ops.init(tp);
3266 netif_device_attach(tp->netdev);
3269 if (netif_running(tp->netdev)) {
3270 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3271 rtl_runtime_suspend_enable(tp, false);
3272 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3273 set_bit(WORK_ENABLE, &tp->flags);
3274 if (tp->speed & LINK_STATUS)
3278 rtl8152_set_speed(tp, AUTONEG_ENABLE,
3279 tp->mii.supports_gmii ?
3280 SPEED_1000 : SPEED_100,
3283 netif_carrier_off(tp->netdev);
3284 set_bit(WORK_ENABLE, &tp->flags);
3286 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3287 } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3288 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3291 mutex_unlock(&tp->control);
3296 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3298 struct r8152 *tp = netdev_priv(dev);
3300 if (usb_autopm_get_interface(tp->intf) < 0)
3303 mutex_lock(&tp->control);
3305 wol->supported = WAKE_ANY;
3306 wol->wolopts = __rtl_get_wol(tp);
3308 mutex_unlock(&tp->control);
3310 usb_autopm_put_interface(tp->intf);
3313 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3315 struct r8152 *tp = netdev_priv(dev);
3318 ret = usb_autopm_get_interface(tp->intf);
3322 mutex_lock(&tp->control);
3324 __rtl_set_wol(tp, wol->wolopts);
3325 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3327 mutex_unlock(&tp->control);
3329 usb_autopm_put_interface(tp->intf);
3335 static u32 rtl8152_get_msglevel(struct net_device *dev)
3337 struct r8152 *tp = netdev_priv(dev);
3339 return tp->msg_enable;
3342 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3344 struct r8152 *tp = netdev_priv(dev);
3346 tp->msg_enable = value;
3349 static void rtl8152_get_drvinfo(struct net_device *netdev,
3350 struct ethtool_drvinfo *info)
3352 struct r8152 *tp = netdev_priv(netdev);
3354 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3355 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3356 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3360 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3362 struct r8152 *tp = netdev_priv(netdev);
3365 if (!tp->mii.mdio_read)
3368 ret = usb_autopm_get_interface(tp->intf);
3372 mutex_lock(&tp->control);
3374 ret = mii_ethtool_gset(&tp->mii, cmd);
3376 mutex_unlock(&tp->control);
3378 usb_autopm_put_interface(tp->intf);
3384 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3386 struct r8152 *tp = netdev_priv(dev);
3389 ret = usb_autopm_get_interface(tp->intf);
3393 mutex_lock(&tp->control);
3395 ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3397 mutex_unlock(&tp->control);
3399 usb_autopm_put_interface(tp->intf);
3405 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3412 "tx_single_collisions",
3413 "tx_multi_collisions",
3421 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3425 return ARRAY_SIZE(rtl8152_gstrings);
3431 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3432 struct ethtool_stats *stats, u64 *data)
3434 struct r8152 *tp = netdev_priv(dev);
3435 struct tally_counter tally;
3437 if (usb_autopm_get_interface(tp->intf) < 0)
3440 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3442 usb_autopm_put_interface(tp->intf);
3444 data[0] = le64_to_cpu(tally.tx_packets);
3445 data[1] = le64_to_cpu(tally.rx_packets);
3446 data[2] = le64_to_cpu(tally.tx_errors);
3447 data[3] = le32_to_cpu(tally.rx_errors);
3448 data[4] = le16_to_cpu(tally.rx_missed);
3449 data[5] = le16_to_cpu(tally.align_errors);
3450 data[6] = le32_to_cpu(tally.tx_one_collision);
3451 data[7] = le32_to_cpu(tally.tx_multi_collision);
3452 data[8] = le64_to_cpu(tally.rx_unicast);
3453 data[9] = le64_to_cpu(tally.rx_broadcast);
3454 data[10] = le32_to_cpu(tally.rx_multicast);
3455 data[11] = le16_to_cpu(tally.tx_aborted);
3456 data[12] = le16_to_cpu(tally.tx_underrun);
3459 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3461 switch (stringset) {
3463 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3468 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3470 u32 ocp_data, lp, adv, supported = 0;
3473 val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3474 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3476 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3477 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3479 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3480 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3482 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3483 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3485 eee->eee_enabled = !!ocp_data;
3486 eee->eee_active = !!(supported & adv & lp);
3487 eee->supported = supported;
3488 eee->advertised = adv;
3489 eee->lp_advertised = lp;
3494 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3496 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3498 r8152_eee_en(tp, eee->eee_enabled);
3500 if (!eee->eee_enabled)
3503 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3508 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3510 u32 ocp_data, lp, adv, supported = 0;
3513 val = ocp_reg_read(tp, OCP_EEE_ABLE);
3514 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3516 val = ocp_reg_read(tp, OCP_EEE_ADV);
3517 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3519 val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3520 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3522 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3523 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3525 eee->eee_enabled = !!ocp_data;
3526 eee->eee_active = !!(supported & adv & lp);
3527 eee->supported = supported;
3528 eee->advertised = adv;
3529 eee->lp_advertised = lp;
3534 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3536 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3538 r8153_eee_en(tp, eee->eee_enabled);
3540 if (!eee->eee_enabled)
3543 ocp_reg_write(tp, OCP_EEE_ADV, val);
3549 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3551 struct r8152 *tp = netdev_priv(net);
3554 ret = usb_autopm_get_interface(tp->intf);
3558 mutex_lock(&tp->control);
3560 ret = tp->rtl_ops.eee_get(tp, edata);
3562 mutex_unlock(&tp->control);
3564 usb_autopm_put_interface(tp->intf);
3571 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3573 struct r8152 *tp = netdev_priv(net);
3576 ret = usb_autopm_get_interface(tp->intf);
3580 mutex_lock(&tp->control);
3582 ret = tp->rtl_ops.eee_set(tp, edata);
3584 ret = mii_nway_restart(&tp->mii);
3586 mutex_unlock(&tp->control);
3588 usb_autopm_put_interface(tp->intf);
3594 static int rtl8152_nway_reset(struct net_device *dev)
3596 struct r8152 *tp = netdev_priv(dev);
3599 ret = usb_autopm_get_interface(tp->intf);
3603 mutex_lock(&tp->control);
3605 ret = mii_nway_restart(&tp->mii);
3607 mutex_unlock(&tp->control);
3609 usb_autopm_put_interface(tp->intf);
3615 static struct ethtool_ops ops = {
3616 .get_drvinfo = rtl8152_get_drvinfo,
3617 .get_settings = rtl8152_get_settings,
3618 .set_settings = rtl8152_set_settings,
3619 .get_link = ethtool_op_get_link,
3620 .nway_reset = rtl8152_nway_reset,
3621 .get_msglevel = rtl8152_get_msglevel,
3622 .set_msglevel = rtl8152_set_msglevel,
3623 .get_wol = rtl8152_get_wol,
3624 .set_wol = rtl8152_set_wol,
3625 .get_strings = rtl8152_get_strings,
3626 .get_sset_count = rtl8152_get_sset_count,
3627 .get_ethtool_stats = rtl8152_get_ethtool_stats,
3628 .get_eee = rtl_ethtool_get_eee,
3629 .set_eee = rtl_ethtool_set_eee,
3632 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3634 struct r8152 *tp = netdev_priv(netdev);
3635 struct mii_ioctl_data *data = if_mii(rq);
3638 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3641 res = usb_autopm_get_interface(tp->intf);
3647 data->phy_id = R8152_PHY_ID; /* Internal PHY */
3651 mutex_lock(&tp->control);
3652 data->val_out = r8152_mdio_read(tp, data->reg_num);
3653 mutex_unlock(&tp->control);
3657 if (!capable(CAP_NET_ADMIN)) {
3661 mutex_lock(&tp->control);
3662 r8152_mdio_write(tp, data->reg_num, data->val_in);
3663 mutex_unlock(&tp->control);
3670 usb_autopm_put_interface(tp->intf);
3676 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
3678 struct r8152 *tp = netdev_priv(dev);
3680 switch (tp->version) {
3683 return eth_change_mtu(dev, new_mtu);
3688 if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
3696 static const struct net_device_ops rtl8152_netdev_ops = {
3697 .ndo_open = rtl8152_open,
3698 .ndo_stop = rtl8152_close,
3699 .ndo_do_ioctl = rtl8152_ioctl,
3700 .ndo_start_xmit = rtl8152_start_xmit,
3701 .ndo_tx_timeout = rtl8152_tx_timeout,
3702 .ndo_set_features = rtl8152_set_features,
3703 .ndo_set_rx_mode = rtl8152_set_rx_mode,
3704 .ndo_set_mac_address = rtl8152_set_mac_address,
3705 .ndo_change_mtu = rtl8152_change_mtu,
3706 .ndo_validate_addr = eth_validate_addr,
3707 .ndo_features_check = rtl8152_features_check,
3710 static void r8152b_get_version(struct r8152 *tp)
3715 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
3716 version = (u16)(ocp_data & VERSION_MASK);
3720 tp->version = RTL_VER_01;
3723 tp->version = RTL_VER_02;
3726 tp->version = RTL_VER_03;
3727 tp->mii.supports_gmii = 1;
3730 tp->version = RTL_VER_04;
3731 tp->mii.supports_gmii = 1;
3734 tp->version = RTL_VER_05;
3735 tp->mii.supports_gmii = 1;
3738 netif_info(tp, probe, tp->netdev,
3739 "Unknown version 0x%04x\n", version);
3744 static void rtl8152_unload(struct r8152 *tp)
3746 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3749 if (tp->version != RTL_VER_01)
3750 r8152_power_cut_en(tp, true);
3753 static void rtl8153_unload(struct r8152 *tp)
3755 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3758 r8153_power_cut_en(tp, false);
3761 static int rtl_ops_init(struct r8152 *tp)
3763 struct rtl_ops *ops = &tp->rtl_ops;
3766 switch (tp->version) {
3769 ops->init = r8152b_init;
3770 ops->enable = rtl8152_enable;
3771 ops->disable = rtl8152_disable;
3772 ops->up = rtl8152_up;
3773 ops->down = rtl8152_down;
3774 ops->unload = rtl8152_unload;
3775 ops->eee_get = r8152_get_eee;
3776 ops->eee_set = r8152_set_eee;
3782 ops->init = r8153_init;
3783 ops->enable = rtl8153_enable;
3784 ops->disable = rtl8153_disable;
3785 ops->up = rtl8153_up;
3786 ops->down = rtl8153_down;
3787 ops->unload = rtl8153_unload;
3788 ops->eee_get = r8153_get_eee;
3789 ops->eee_set = r8153_set_eee;
3794 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
3801 static int rtl8152_probe(struct usb_interface *intf,
3802 const struct usb_device_id *id)
3804 struct usb_device *udev = interface_to_usbdev(intf);
3806 struct net_device *netdev;
3809 if (udev->actconfig->desc.bConfigurationValue != 1) {
3810 usb_driver_set_configuration(udev, 1);
3814 usb_reset_device(udev);
3815 netdev = alloc_etherdev(sizeof(struct r8152));
3817 dev_err(&intf->dev, "Out of memory\n");
3821 SET_NETDEV_DEV(netdev, &intf->dev);
3822 tp = netdev_priv(netdev);
3823 tp->msg_enable = 0x7FFF;
3826 tp->netdev = netdev;
3829 r8152b_get_version(tp);
3830 ret = rtl_ops_init(tp);
3834 tasklet_init(&tp->tl, bottom_half, (unsigned long)tp);
3835 mutex_init(&tp->control);
3836 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
3838 netdev->netdev_ops = &rtl8152_netdev_ops;
3839 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
3841 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
3842 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
3843 NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
3844 NETIF_F_HW_VLAN_CTAG_TX;
3845 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
3846 NETIF_F_TSO | NETIF_F_FRAGLIST |
3847 NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
3848 NETIF_F_HW_VLAN_CTAG_RX |
3849 NETIF_F_HW_VLAN_CTAG_TX;
3850 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
3851 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
3852 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
3854 netdev->ethtool_ops = &ops;
3855 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
3857 tp->mii.dev = netdev;
3858 tp->mii.mdio_read = read_mii_word;
3859 tp->mii.mdio_write = write_mii_word;
3860 tp->mii.phy_id_mask = 0x3f;
3861 tp->mii.reg_num_mask = 0x1f;
3862 tp->mii.phy_id = R8152_PHY_ID;
3864 intf->needs_remote_wakeup = 1;
3866 tp->rtl_ops.init(tp);
3867 set_ethernet_addr(tp);
3869 usb_set_intfdata(intf, tp);
3871 ret = register_netdev(netdev);
3873 netif_err(tp, probe, netdev, "couldn't register the device\n");
3877 tp->saved_wolopts = __rtl_get_wol(tp);
3878 if (tp->saved_wolopts)
3879 device_set_wakeup_enable(&udev->dev, true);
3881 device_set_wakeup_enable(&udev->dev, false);
3883 tasklet_disable(&tp->tl);
3885 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
3890 usb_set_intfdata(intf, NULL);
3891 tasklet_kill(&tp->tl);
3893 free_netdev(netdev);
3897 static void rtl8152_disconnect(struct usb_interface *intf)
3899 struct r8152 *tp = usb_get_intfdata(intf);
3901 usb_set_intfdata(intf, NULL);
3903 struct usb_device *udev = tp->udev;
3905 if (udev->state == USB_STATE_NOTATTACHED)
3906 set_bit(RTL8152_UNPLUG, &tp->flags);
3908 tasklet_kill(&tp->tl);
3909 unregister_netdev(tp->netdev);
3910 tp->rtl_ops.unload(tp);
3911 free_netdev(tp->netdev);
3915 #define REALTEK_USB_DEVICE(vend, prod) \
3916 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
3917 USB_DEVICE_ID_MATCH_INT_CLASS, \
3918 .idVendor = (vend), \
3919 .idProduct = (prod), \
3920 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
3923 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
3924 USB_DEVICE_ID_MATCH_DEVICE, \
3925 .idVendor = (vend), \
3926 .idProduct = (prod), \
3927 .bInterfaceClass = USB_CLASS_COMM, \
3928 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
3929 .bInterfaceProtocol = USB_CDC_PROTO_NONE
3931 /* table of devices that work with this driver */
3932 static struct usb_device_id rtl8152_table[] = {
3933 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
3934 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
3935 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
3939 MODULE_DEVICE_TABLE(usb, rtl8152_table);
3941 static struct usb_driver rtl8152_driver = {
3943 .id_table = rtl8152_table,
3944 .probe = rtl8152_probe,
3945 .disconnect = rtl8152_disconnect,
3946 .suspend = rtl8152_suspend,
3947 .resume = rtl8152_resume,
3948 .reset_resume = rtl8152_resume,
3949 .supports_autosuspend = 1,
3950 .disable_hub_initiated_lpm = 1,
3953 module_usb_driver(rtl8152_driver);
3955 MODULE_AUTHOR(DRIVER_AUTHOR);
3956 MODULE_DESCRIPTION(DRIVER_DESC);
3957 MODULE_LICENSE("GPL");