3 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
5 * Copyright (C) 2005 Sensoria Corp
6 * Derived from the unified SMC91x driver by Nicolas Pitre
7 * and the smsc911x.c reference driver by SMSC
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, see <http://www.gnu.org/licenses/>.
23 * watchdog = TX watchdog timeout
24 * tx_fifo_kb = Size of TX FIFO in KB
27 * 04/16/05 Dustin McIntire Initial version
29 static const char version[] =
30 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
32 /* Debugging options */
33 #define ENABLE_SMC_DEBUG_RX 0
34 #define ENABLE_SMC_DEBUG_TX 0
35 #define ENABLE_SMC_DEBUG_DMA 0
36 #define ENABLE_SMC_DEBUG_PKTS 0
37 #define ENABLE_SMC_DEBUG_MISC 0
38 #define ENABLE_SMC_DEBUG_FUNC 0
40 #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
41 #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
42 #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
43 #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
44 #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
45 #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
48 #define SMC_DEBUG ( SMC_DEBUG_RX | \
57 #include <linux/init.h>
58 #include <linux/module.h>
59 #include <linux/kernel.h>
60 #include <linux/sched.h>
61 #include <linux/delay.h>
62 #include <linux/interrupt.h>
63 #include <linux/errno.h>
64 #include <linux/ioport.h>
65 #include <linux/crc32.h>
66 #include <linux/device.h>
67 #include <linux/platform_device.h>
68 #include <linux/spinlock.h>
69 #include <linux/ethtool.h>
70 #include <linux/mii.h>
71 #include <linux/workqueue.h>
73 #include <linux/netdevice.h>
74 #include <linux/etherdevice.h>
75 #include <linux/skbuff.h>
82 * Transmit timeout, default 5 seconds.
84 static int watchdog = 5000;
85 module_param(watchdog, int, 0400);
86 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
88 static int tx_fifo_kb=8;
89 module_param(tx_fifo_kb, int, 0400);
90 MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
92 MODULE_LICENSE("GPL");
93 MODULE_ALIAS("platform:smc911x");
96 * The internal workings of the driver. If you are changing anything
97 * here with the SMC stuff, you should have the datasheet and know
100 #define CARDNAME "smc911x"
103 * Use power-down feature of the chip
108 #define DBG(n, dev, args...) \
110 if (SMC_DEBUG & (n)) \
111 netdev_dbg(dev, args); \
114 #define PRINTK(dev, args...) netdev_info(dev, args)
116 #define DBG(n, dev, args...) do { } while (0)
117 #define PRINTK(dev, args...) netdev_dbg(dev, args)
120 #if SMC_DEBUG_PKTS > 0
121 static void PRINT_PKT(u_char *buf, int length)
128 remainder = length % 16;
130 for (i = 0; i < lines ; i ++) {
133 for (cur = 0; cur < 8; cur++) {
137 pr_cont("%02x%02x ", a, b);
142 for (i = 0; i < remainder/2 ; i++) {
146 pr_cont("%02x%02x ", a, b);
151 #define PRINT_PKT(x...) do { } while (0)
155 /* this enables an interrupt in the interrupt mask register */
156 #define SMC_ENABLE_INT(lp, x) do { \
157 unsigned int __mask; \
158 __mask = SMC_GET_INT_EN((lp)); \
160 SMC_SET_INT_EN((lp), __mask); \
163 /* this disables an interrupt from the interrupt mask register */
164 #define SMC_DISABLE_INT(lp, x) do { \
165 unsigned int __mask; \
166 __mask = SMC_GET_INT_EN((lp)); \
168 SMC_SET_INT_EN((lp), __mask); \
172 * this does a soft reset on the device
174 static void smc911x_reset(struct net_device *dev)
176 struct smc911x_local *lp = netdev_priv(dev);
177 unsigned int reg, timeout=0, resets=1, irq_cfg;
180 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
182 /* Take out of PM setting first */
183 if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) {
184 /* Write to the bytetest will take out of powerdown */
185 SMC_SET_BYTE_TEST(lp, 0);
189 reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_;
190 } while (--timeout && !reg);
192 PRINTK(dev, "smc911x_reset timeout waiting for PM restore\n");
197 /* Disable all interrupts */
198 spin_lock_irqsave(&lp->lock, flags);
199 SMC_SET_INT_EN(lp, 0);
200 spin_unlock_irqrestore(&lp->lock, flags);
203 SMC_SET_HW_CFG(lp, HW_CFG_SRST_);
207 reg = SMC_GET_HW_CFG(lp);
208 /* If chip indicates reset timeout then try again */
209 if (reg & HW_CFG_SRST_TO_) {
210 PRINTK(dev, "chip reset timeout, retrying...\n");
214 } while (--timeout && (reg & HW_CFG_SRST_));
217 PRINTK(dev, "smc911x_reset timeout waiting for reset\n");
221 /* make sure EEPROM has finished loading before setting GPIO_CFG */
223 while (--timeout && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_))
227 PRINTK(dev, "smc911x_reset timeout waiting for EEPROM busy\n");
231 /* Initialize interrupts */
232 SMC_SET_INT_EN(lp, 0);
235 /* Reset the FIFO level and flow control settings */
236 SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16);
237 //TODO: Figure out what appropriate pause time is
238 SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_);
239 SMC_SET_AFC_CFG(lp, lp->afc_cfg);
242 /* Set to LED outputs */
243 SMC_SET_GPIO_CFG(lp, 0x70070000);
246 * Deassert IRQ for 1*10us for edge type interrupts
247 * and drive IRQ pin push-pull
249 irq_cfg = (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_;
250 #ifdef SMC_DYNAMIC_BUS_CONFIG
251 if (lp->cfg.irq_polarity)
252 irq_cfg |= INT_CFG_IRQ_POL_;
254 SMC_SET_IRQ_CFG(lp, irq_cfg);
256 /* clear anything saved */
257 if (lp->pending_tx_skb != NULL) {
258 dev_kfree_skb (lp->pending_tx_skb);
259 lp->pending_tx_skb = NULL;
260 dev->stats.tx_errors++;
261 dev->stats.tx_aborted_errors++;
266 * Enable Interrupts, Receive, and Transmit
268 static void smc911x_enable(struct net_device *dev)
270 struct smc911x_local *lp = netdev_priv(dev);
271 unsigned mask, cfg, cr;
274 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
276 spin_lock_irqsave(&lp->lock, flags);
278 SMC_SET_MAC_ADDR(lp, dev->dev_addr);
281 cfg = SMC_GET_HW_CFG(lp);
282 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
284 SMC_SET_HW_CFG(lp, cfg);
285 SMC_SET_FIFO_TDA(lp, 0xFF);
286 /* Update TX stats on every 64 packets received or every 1 sec */
287 SMC_SET_FIFO_TSL(lp, 64);
288 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
290 SMC_GET_MAC_CR(lp, cr);
291 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
292 SMC_SET_MAC_CR(lp, cr);
293 SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_);
295 /* Add 2 byte padding to start of packets */
296 SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_);
298 /* Turn on receiver and enable RX */
299 if (cr & MAC_CR_RXEN_)
300 DBG(SMC_DEBUG_RX, dev, "Receiver already enabled\n");
302 SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_);
304 /* Interrupt on every received packet */
305 SMC_SET_FIFO_RSA(lp, 0x01);
306 SMC_SET_FIFO_RSL(lp, 0x00);
308 /* now, enable interrupts */
309 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
310 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
312 if (IS_REV_A(lp->revision))
313 mask|=INT_EN_RDFL_EN_;
315 mask|=INT_EN_RDFO_EN_;
317 SMC_ENABLE_INT(lp, mask);
319 spin_unlock_irqrestore(&lp->lock, flags);
323 * this puts the device in an inactive state
325 static void smc911x_shutdown(struct net_device *dev)
327 struct smc911x_local *lp = netdev_priv(dev);
331 DBG(SMC_DEBUG_FUNC, dev, "%s: --> %s\n", CARDNAME, __func__);
334 SMC_SET_INT_EN(lp, 0);
336 /* Turn of Rx and TX */
337 spin_lock_irqsave(&lp->lock, flags);
338 SMC_GET_MAC_CR(lp, cr);
339 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
340 SMC_SET_MAC_CR(lp, cr);
341 SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_);
342 spin_unlock_irqrestore(&lp->lock, flags);
345 static inline void smc911x_drop_pkt(struct net_device *dev)
347 struct smc911x_local *lp = netdev_priv(dev);
348 unsigned int fifo_count, timeout, reg;
350 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, dev, "%s: --> %s\n",
352 fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF;
353 if (fifo_count <= 4) {
354 /* Manually dump the packet data */
358 /* Fast forward through the bad packet */
359 SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_);
363 reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_;
364 } while (--timeout && reg);
366 PRINTK(dev, "timeout waiting for RX fast forward\n");
372 * This is the procedure to handle the receipt of a packet.
373 * It should be called after checking for packet presence in
374 * the RX status FIFO. It must be called with the spin lock
377 static inline void smc911x_rcv(struct net_device *dev)
379 struct smc911x_local *lp = netdev_priv(dev);
380 unsigned int pkt_len, status;
384 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, dev, "--> %s\n",
386 status = SMC_GET_RX_STS_FIFO(lp);
387 DBG(SMC_DEBUG_RX, dev, "Rx pkt len %d status 0x%08x\n",
388 (status & 0x3fff0000) >> 16, status & 0xc000ffff);
389 pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
390 if (status & RX_STS_ES_) {
391 /* Deal with a bad packet */
392 dev->stats.rx_errors++;
393 if (status & RX_STS_CRC_ERR_)
394 dev->stats.rx_crc_errors++;
396 if (status & RX_STS_LEN_ERR_)
397 dev->stats.rx_length_errors++;
398 if (status & RX_STS_MCAST_)
399 dev->stats.multicast++;
401 /* Remove the bad packet data from the RX FIFO */
402 smc911x_drop_pkt(dev);
404 /* Receive a valid packet */
405 /* Alloc a buffer with extra room for DMA alignment */
406 skb = netdev_alloc_skb(dev, pkt_len+32);
407 if (unlikely(skb == NULL)) {
408 PRINTK(dev, "Low memory, rcvd packet dropped.\n");
409 dev->stats.rx_dropped++;
410 smc911x_drop_pkt(dev);
413 /* Align IP header to 32 bits
414 * Note that the device is configured to add a 2
415 * byte padding to the packet start, so we really
416 * want to write to the orignal data pointer */
419 skb_put(skb,pkt_len-4);
423 /* Lower the FIFO threshold if possible */
424 fifo = SMC_GET_FIFO_INT(lp);
425 if (fifo & 0xFF) fifo--;
426 DBG(SMC_DEBUG_RX, dev, "Setting RX stat FIFO threshold to %d\n",
428 SMC_SET_FIFO_INT(lp, fifo);
430 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
431 lp->rxdma_active = 1;
432 lp->current_rx_skb = skb;
433 SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15);
434 /* Packet processing deferred to DMA RX interrupt */
437 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
438 SMC_PULL_DATA(lp, data, pkt_len+2+3);
440 DBG(SMC_DEBUG_PKTS, dev, "Received packet\n");
441 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
442 skb->protocol = eth_type_trans(skb, dev);
444 dev->stats.rx_packets++;
445 dev->stats.rx_bytes += pkt_len-4;
451 * This is called to actually send a packet to the chip.
453 static void smc911x_hardware_send_pkt(struct net_device *dev)
455 struct smc911x_local *lp = netdev_priv(dev);
457 unsigned int cmdA, cmdB, len;
460 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n", __func__);
461 BUG_ON(lp->pending_tx_skb == NULL);
463 skb = lp->pending_tx_skb;
464 lp->pending_tx_skb = NULL;
466 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
467 /* cmdB {31:16] pkt tag [10:0] length */
469 /* 16 byte buffer alignment mode */
470 buf = (char*)((u32)(skb->data) & ~0xF);
471 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
472 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
473 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
476 buf = (char*)((u32)skb->data & ~0x3);
477 len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
478 cmdA = (((u32)skb->data & 0x3) << 16) |
479 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
482 /* tag is packet length so we can use this in stats update later */
483 cmdB = (skb->len << 16) | (skb->len & 0x7FF);
485 DBG(SMC_DEBUG_TX, dev, "TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
486 len, len, buf, cmdA, cmdB);
487 SMC_SET_TX_FIFO(lp, cmdA);
488 SMC_SET_TX_FIFO(lp, cmdB);
490 DBG(SMC_DEBUG_PKTS, dev, "Transmitted packet\n");
491 PRINT_PKT(buf, len <= 64 ? len : 64);
493 /* Send pkt via PIO or DMA */
495 lp->current_tx_skb = skb;
496 SMC_PUSH_DATA(lp, buf, len);
497 /* DMA complete IRQ will free buffer and set jiffies */
499 SMC_PUSH_DATA(lp, buf, len);
500 dev->trans_start = jiffies;
501 dev_kfree_skb_irq(skb);
503 if (!lp->tx_throttle) {
504 netif_wake_queue(dev);
506 SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
510 * Since I am not sure if I will have enough room in the chip's ram
511 * to store the packet, I call this routine which either sends it
512 * now, or set the card to generates an interrupt when ready
515 static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
517 struct smc911x_local *lp = netdev_priv(dev);
521 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n",
524 spin_lock_irqsave(&lp->lock, flags);
526 BUG_ON(lp->pending_tx_skb != NULL);
528 free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_;
529 DBG(SMC_DEBUG_TX, dev, "TX free space %d\n", free);
531 /* Turn off the flow when running out of space in FIFO */
532 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
533 DBG(SMC_DEBUG_TX, dev, "Disabling data flow due to low FIFO space (%d)\n",
535 /* Reenable when at least 1 packet of size MTU present */
536 SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
538 netif_stop_queue(dev);
541 /* Drop packets when we run out of space in TX FIFO
542 * Account for overhead required for:
544 * Tx command words 8 bytes
545 * Start offset 15 bytes
546 * End padding 15 bytes
548 if (unlikely(free < (skb->len + 8 + 15 + 15))) {
549 netdev_warn(dev, "No Tx free space %d < %d\n",
551 lp->pending_tx_skb = NULL;
552 dev->stats.tx_errors++;
553 dev->stats.tx_dropped++;
554 spin_unlock_irqrestore(&lp->lock, flags);
561 /* If the DMA is already running then defer this packet Tx until
562 * the DMA IRQ starts it
564 if (lp->txdma_active) {
565 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "Tx DMA running, deferring packet\n");
566 lp->pending_tx_skb = skb;
567 netif_stop_queue(dev);
568 spin_unlock_irqrestore(&lp->lock, flags);
571 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "Activating Tx DMA\n");
572 lp->txdma_active = 1;
576 lp->pending_tx_skb = skb;
577 smc911x_hardware_send_pkt(dev);
578 spin_unlock_irqrestore(&lp->lock, flags);
584 * This handles a TX status interrupt, which is only called when:
585 * - a TX error occurred, or
586 * - TX of a packet completed.
588 static void smc911x_tx(struct net_device *dev)
590 struct smc911x_local *lp = netdev_priv(dev);
591 unsigned int tx_status;
593 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n",
596 /* Collect the TX status */
597 while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
598 DBG(SMC_DEBUG_TX, dev, "Tx stat FIFO used 0x%04x\n",
599 (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16);
600 tx_status = SMC_GET_TX_STS_FIFO(lp);
601 dev->stats.tx_packets++;
602 dev->stats.tx_bytes+=tx_status>>16;
603 DBG(SMC_DEBUG_TX, dev, "Tx FIFO tag 0x%04x status 0x%04x\n",
604 (tx_status & 0xffff0000) >> 16,
605 tx_status & 0x0000ffff);
606 /* count Tx errors, but ignore lost carrier errors when in
607 * full-duplex mode */
608 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
609 !(tx_status & 0x00000306))) {
610 dev->stats.tx_errors++;
612 if (tx_status & TX_STS_MANY_COLL_) {
613 dev->stats.collisions+=16;
614 dev->stats.tx_aborted_errors++;
616 dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
618 /* carrier error only has meaning for half-duplex communication */
619 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
621 dev->stats.tx_carrier_errors++;
623 if (tx_status & TX_STS_LATE_COLL_) {
624 dev->stats.collisions++;
625 dev->stats.tx_aborted_errors++;
631 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
633 * Reads a register from the MII Management serial interface
636 static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
638 struct smc911x_local *lp = netdev_priv(dev);
639 unsigned int phydata;
641 SMC_GET_MII(lp, phyreg, phyaddr, phydata);
643 DBG(SMC_DEBUG_MISC, dev, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
644 __func__, phyaddr, phyreg, phydata);
650 * Writes a register to the MII Management serial interface
652 static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
655 struct smc911x_local *lp = netdev_priv(dev);
657 DBG(SMC_DEBUG_MISC, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
658 __func__, phyaddr, phyreg, phydata);
660 SMC_SET_MII(lp, phyreg, phyaddr, phydata);
664 * Finds and reports the PHY address (115 and 117 have external
665 * PHY interface 118 has internal only
667 static void smc911x_phy_detect(struct net_device *dev)
669 struct smc911x_local *lp = netdev_priv(dev);
671 unsigned int cfg, id1, id2;
673 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
678 * Scan all 32 PHY addresses if necessary, starting at
679 * PHY#1 to PHY#31, and then PHY#0 last.
681 switch(lp->version) {
686 cfg = SMC_GET_HW_CFG(lp);
687 if (cfg & HW_CFG_EXT_PHY_DET_) {
688 cfg &= ~HW_CFG_PHY_CLK_SEL_;
689 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
690 SMC_SET_HW_CFG(lp, cfg);
691 udelay(10); /* Wait for clocks to stop */
693 cfg |= HW_CFG_EXT_PHY_EN_;
694 SMC_SET_HW_CFG(lp, cfg);
695 udelay(10); /* Wait for clocks to stop */
697 cfg &= ~HW_CFG_PHY_CLK_SEL_;
698 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
699 SMC_SET_HW_CFG(lp, cfg);
700 udelay(10); /* Wait for clocks to stop */
702 cfg |= HW_CFG_SMI_SEL_;
703 SMC_SET_HW_CFG(lp, cfg);
705 for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
707 /* Read the PHY identifiers */
708 SMC_GET_PHY_ID1(lp, phyaddr & 31, id1);
709 SMC_GET_PHY_ID2(lp, phyaddr & 31, id2);
711 /* Make sure it is a valid identifier */
712 if (id1 != 0x0000 && id1 != 0xffff &&
713 id1 != 0x8000 && id2 != 0x0000 &&
714 id2 != 0xffff && id2 != 0x8000) {
715 /* Save the PHY's address */
716 lp->mii.phy_id = phyaddr & 31;
717 lp->phy_type = id1 << 16 | id2;
722 /* Found an external PHY */
726 /* Internal media only */
727 SMC_GET_PHY_ID1(lp, 1, id1);
728 SMC_GET_PHY_ID2(lp, 1, id2);
729 /* Save the PHY's address */
731 lp->phy_type = id1 << 16 | id2;
734 DBG(SMC_DEBUG_MISC, dev, "phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
735 id1, id2, lp->mii.phy_id);
739 * Sets the PHY to a configuration as determined by the user.
740 * Called with spin_lock held.
742 static int smc911x_phy_fixed(struct net_device *dev)
744 struct smc911x_local *lp = netdev_priv(dev);
745 int phyaddr = lp->mii.phy_id;
748 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
750 /* Enter Link Disable state */
751 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
753 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
756 * Set our fixed capabilities
757 * Disable auto-negotiation
759 bmcr &= ~BMCR_ANENABLE;
761 bmcr |= BMCR_FULLDPLX;
763 if (lp->ctl_rspeed == 100)
764 bmcr |= BMCR_SPEED100;
766 /* Write our capabilities to the phy control register */
767 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
769 /* Re-Configure the Receive/Phy Control register */
771 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
777 * smc911x_phy_reset - reset the phy
781 * Issue a software reset for the specified PHY and
782 * wait up to 100ms for the reset to complete. We should
783 * not access the PHY for 50ms after issuing the reset.
785 * The time to wait appears to be dependent on the PHY.
788 static int smc911x_phy_reset(struct net_device *dev, int phy)
790 struct smc911x_local *lp = netdev_priv(dev);
795 DBG(SMC_DEBUG_FUNC, dev, "--> %s()\n", __func__);
797 spin_lock_irqsave(&lp->lock, flags);
798 reg = SMC_GET_PMT_CTRL(lp);
800 reg |= PMT_CTRL_PHY_RST_;
801 SMC_SET_PMT_CTRL(lp, reg);
802 spin_unlock_irqrestore(&lp->lock, flags);
803 for (timeout = 2; timeout; timeout--) {
805 spin_lock_irqsave(&lp->lock, flags);
806 reg = SMC_GET_PMT_CTRL(lp);
807 spin_unlock_irqrestore(&lp->lock, flags);
808 if (!(reg & PMT_CTRL_PHY_RST_)) {
809 /* extra delay required because the phy may
810 * not be completed with its reset
811 * when PHY_BCR_RESET_ is cleared. 256us
812 * should suffice, but use 500us to be safe
819 return reg & PMT_CTRL_PHY_RST_;
823 * smc911x_phy_powerdown - powerdown phy
827 * Power down the specified PHY
829 static void smc911x_phy_powerdown(struct net_device *dev, int phy)
831 struct smc911x_local *lp = netdev_priv(dev);
834 /* Enter Link Disable state */
835 SMC_GET_PHY_BMCR(lp, phy, bmcr);
837 SMC_SET_PHY_BMCR(lp, phy, bmcr);
841 * smc911x_phy_check_media - check the media status and adjust BMCR
843 * @init: set true for initialisation
845 * Select duplex mode depending on negotiation state. This
846 * also updates our carrier state.
848 static void smc911x_phy_check_media(struct net_device *dev, int init)
850 struct smc911x_local *lp = netdev_priv(dev);
851 int phyaddr = lp->mii.phy_id;
852 unsigned int bmcr, cr;
854 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
856 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
857 /* duplex state has changed */
858 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
859 SMC_GET_MAC_CR(lp, cr);
860 if (lp->mii.full_duplex) {
861 DBG(SMC_DEBUG_MISC, dev, "Configuring for full-duplex mode\n");
862 bmcr |= BMCR_FULLDPLX;
863 cr |= MAC_CR_RCVOWN_;
865 DBG(SMC_DEBUG_MISC, dev, "Configuring for half-duplex mode\n");
866 bmcr &= ~BMCR_FULLDPLX;
867 cr &= ~MAC_CR_RCVOWN_;
869 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
870 SMC_SET_MAC_CR(lp, cr);
875 * Configures the specified PHY through the MII management interface
876 * using Autonegotiation.
877 * Calls smc911x_phy_fixed() if the user has requested a certain config.
878 * If RPC ANEG bit is set, the media selection is dependent purely on
879 * the selection by the MII (either in the MII BMCR reg or the result
880 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
881 * is controlled by the RPC SPEED and RPC DPLX bits.
883 static void smc911x_phy_configure(struct work_struct *work)
885 struct smc911x_local *lp = container_of(work, struct smc911x_local,
887 struct net_device *dev = lp->netdev;
888 int phyaddr = lp->mii.phy_id;
889 int my_phy_caps; /* My PHY capabilities */
890 int my_ad_caps; /* My Advertised capabilities */
894 DBG(SMC_DEBUG_FUNC, dev, "--> %s()\n", __func__);
897 * We should not be called if phy_type is zero.
899 if (lp->phy_type == 0)
902 if (smc911x_phy_reset(dev, phyaddr)) {
903 netdev_info(dev, "PHY reset timed out\n");
906 spin_lock_irqsave(&lp->lock, flags);
909 * Enable PHY Interrupts (for register 18)
910 * Interrupts listed here are enabled
912 SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ |
913 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
914 PHY_INT_MASK_LINK_DOWN_);
916 /* If the user requested no auto neg, then go set his request */
917 if (lp->mii.force_media) {
918 smc911x_phy_fixed(dev);
919 goto smc911x_phy_configure_exit;
922 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
923 SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps);
924 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
925 netdev_info(dev, "Auto negotiation NOT supported\n");
926 smc911x_phy_fixed(dev);
927 goto smc911x_phy_configure_exit;
930 /* CSMA capable w/ both pauses */
931 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
933 if (my_phy_caps & BMSR_100BASE4)
934 my_ad_caps |= ADVERTISE_100BASE4;
935 if (my_phy_caps & BMSR_100FULL)
936 my_ad_caps |= ADVERTISE_100FULL;
937 if (my_phy_caps & BMSR_100HALF)
938 my_ad_caps |= ADVERTISE_100HALF;
939 if (my_phy_caps & BMSR_10FULL)
940 my_ad_caps |= ADVERTISE_10FULL;
941 if (my_phy_caps & BMSR_10HALF)
942 my_ad_caps |= ADVERTISE_10HALF;
944 /* Disable capabilities not selected by our user */
945 if (lp->ctl_rspeed != 100)
946 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
948 if (!lp->ctl_rfduplx)
949 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
951 /* Update our Auto-Neg Advertisement Register */
952 SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps);
953 lp->mii.advertising = my_ad_caps;
956 * Read the register back. Without this, it appears that when
957 * auto-negotiation is restarted, sometimes it isn't ready and
958 * the link does not come up.
961 SMC_GET_PHY_MII_ADV(lp, phyaddr, status);
963 DBG(SMC_DEBUG_MISC, dev, "phy caps=0x%04x\n", my_phy_caps);
964 DBG(SMC_DEBUG_MISC, dev, "phy advertised caps=0x%04x\n", my_ad_caps);
966 /* Restart auto-negotiation process in order to advertise my caps */
967 SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
969 smc911x_phy_check_media(dev, 1);
971 smc911x_phy_configure_exit:
972 spin_unlock_irqrestore(&lp->lock, flags);
976 * smc911x_phy_interrupt
978 * Purpose: Handle interrupts relating to PHY register 18. This is
979 * called from the "hard" interrupt handler under our private spinlock.
981 static void smc911x_phy_interrupt(struct net_device *dev)
983 struct smc911x_local *lp = netdev_priv(dev);
984 int phyaddr = lp->mii.phy_id;
987 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
989 if (lp->phy_type == 0)
992 smc911x_phy_check_media(dev, 0);
993 /* read to clear status bits */
994 SMC_GET_PHY_INT_SRC(lp, phyaddr,status);
995 DBG(SMC_DEBUG_MISC, dev, "PHY interrupt status 0x%04x\n",
997 DBG(SMC_DEBUG_MISC, dev, "AFC_CFG 0x%08x\n",
998 SMC_GET_AFC_CFG(lp));
1001 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1004 * This is the main routine of the driver, to handle the device when
1005 * it needs some attention.
1007 static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
1009 struct net_device *dev = dev_id;
1010 struct smc911x_local *lp = netdev_priv(dev);
1011 unsigned int status, mask, timeout;
1012 unsigned int rx_overrun=0, cr, pkts;
1013 unsigned long flags;
1015 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1017 spin_lock_irqsave(&lp->lock, flags);
1019 /* Spurious interrupt check */
1020 if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
1021 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
1022 spin_unlock_irqrestore(&lp->lock, flags);
1026 mask = SMC_GET_INT_EN(lp);
1027 SMC_SET_INT_EN(lp, 0);
1029 /* set a timeout value, so I don't stay here forever */
1034 status = SMC_GET_INT(lp);
1036 DBG(SMC_DEBUG_MISC, dev, "INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
1037 status, mask, status & ~mask);
1043 /* Handle SW interrupt condition */
1044 if (status & INT_STS_SW_INT_) {
1045 SMC_ACK_INT(lp, INT_STS_SW_INT_);
1046 mask &= ~INT_EN_SW_INT_EN_;
1048 /* Handle various error conditions */
1049 if (status & INT_STS_RXE_) {
1050 SMC_ACK_INT(lp, INT_STS_RXE_);
1051 dev->stats.rx_errors++;
1053 if (status & INT_STS_RXDFH_INT_) {
1054 SMC_ACK_INT(lp, INT_STS_RXDFH_INT_);
1055 dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp);
1057 /* Undocumented interrupt-what is the right thing to do here? */
1058 if (status & INT_STS_RXDF_INT_) {
1059 SMC_ACK_INT(lp, INT_STS_RXDF_INT_);
1062 /* Rx Data FIFO exceeds set level */
1063 if (status & INT_STS_RDFL_) {
1064 if (IS_REV_A(lp->revision)) {
1066 SMC_GET_MAC_CR(lp, cr);
1067 cr &= ~MAC_CR_RXEN_;
1068 SMC_SET_MAC_CR(lp, cr);
1069 DBG(SMC_DEBUG_RX, dev, "RX overrun\n");
1070 dev->stats.rx_errors++;
1071 dev->stats.rx_fifo_errors++;
1073 SMC_ACK_INT(lp, INT_STS_RDFL_);
1075 if (status & INT_STS_RDFO_) {
1076 if (!IS_REV_A(lp->revision)) {
1077 SMC_GET_MAC_CR(lp, cr);
1078 cr &= ~MAC_CR_RXEN_;
1079 SMC_SET_MAC_CR(lp, cr);
1081 DBG(SMC_DEBUG_RX, dev, "RX overrun\n");
1082 dev->stats.rx_errors++;
1083 dev->stats.rx_fifo_errors++;
1085 SMC_ACK_INT(lp, INT_STS_RDFO_);
1087 /* Handle receive condition */
1088 if ((status & INT_STS_RSFL_) || rx_overrun) {
1090 DBG(SMC_DEBUG_RX, dev, "RX irq\n");
1091 fifo = SMC_GET_RX_FIFO_INF(lp);
1092 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
1093 DBG(SMC_DEBUG_RX, dev, "Rx FIFO pkts %d, bytes %d\n",
1094 pkts, fifo & 0xFFFF);
1098 if (lp->rxdma_active){
1099 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev,
1101 /* The DMA is already running so up the IRQ threshold */
1102 fifo = SMC_GET_FIFO_INT(lp) & ~0xFF;
1103 fifo |= pkts & 0xFF;
1104 DBG(SMC_DEBUG_RX, dev,
1105 "Setting RX stat FIFO threshold to %d\n",
1107 SMC_SET_FIFO_INT(lp, fifo);
1112 SMC_ACK_INT(lp, INT_STS_RSFL_);
1114 /* Handle transmit FIFO available */
1115 if (status & INT_STS_TDFA_) {
1116 DBG(SMC_DEBUG_TX, dev, "TX data FIFO space available irq\n");
1117 SMC_SET_FIFO_TDA(lp, 0xFF);
1118 lp->tx_throttle = 0;
1120 if (!lp->txdma_active)
1122 netif_wake_queue(dev);
1123 SMC_ACK_INT(lp, INT_STS_TDFA_);
1125 /* Handle transmit done condition */
1127 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
1128 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC, dev,
1129 "Tx stat FIFO limit (%d) /GPT irq\n",
1130 (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16);
1132 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1133 SMC_ACK_INT(lp, INT_STS_TSFL_);
1134 SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_);
1137 if (status & INT_STS_TSFL_) {
1138 DBG(SMC_DEBUG_TX, dev, "TX status FIFO limit (%d) irq\n", ?);
1140 SMC_ACK_INT(lp, INT_STS_TSFL_);
1143 if (status & INT_STS_GPT_INT_) {
1144 DBG(SMC_DEBUG_RX, dev, "IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
1145 SMC_GET_IRQ_CFG(lp),
1146 SMC_GET_FIFO_INT(lp),
1147 SMC_GET_RX_CFG(lp));
1148 DBG(SMC_DEBUG_RX, dev, "Rx Stat FIFO Used 0x%02x Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
1149 (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16,
1150 SMC_GET_RX_FIFO_INF(lp) & 0xffff,
1151 SMC_GET_RX_STS_FIFO_PEEK(lp));
1152 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1153 SMC_ACK_INT(lp, INT_STS_GPT_INT_);
1157 /* Handle PHY interrupt condition */
1158 if (status & INT_STS_PHY_INT_) {
1159 DBG(SMC_DEBUG_MISC, dev, "PHY irq\n");
1160 smc911x_phy_interrupt(dev);
1161 SMC_ACK_INT(lp, INT_STS_PHY_INT_);
1163 } while (--timeout);
1165 /* restore mask state */
1166 SMC_SET_INT_EN(lp, mask);
1168 DBG(SMC_DEBUG_MISC, dev, "Interrupt done (%d loops)\n",
1171 spin_unlock_irqrestore(&lp->lock, flags);
1178 smc911x_tx_dma_irq(int dma, void *data)
1180 struct net_device *dev = (struct net_device *)data;
1181 struct smc911x_local *lp = netdev_priv(dev);
1182 struct sk_buff *skb = lp->current_tx_skb;
1183 unsigned long flags;
1185 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1187 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "TX DMA irq handler\n");
1188 /* Clear the DMA interrupt sources */
1189 SMC_DMA_ACK_IRQ(dev, dma);
1190 BUG_ON(skb == NULL);
1191 dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
1192 dev->trans_start = jiffies;
1193 dev_kfree_skb_irq(skb);
1194 lp->current_tx_skb = NULL;
1195 if (lp->pending_tx_skb != NULL)
1196 smc911x_hardware_send_pkt(dev);
1198 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev,
1199 "No pending Tx packets. DMA disabled\n");
1200 spin_lock_irqsave(&lp->lock, flags);
1201 lp->txdma_active = 0;
1202 if (!lp->tx_throttle) {
1203 netif_wake_queue(dev);
1205 spin_unlock_irqrestore(&lp->lock, flags);
1208 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev,
1209 "TX DMA irq completed\n");
1212 smc911x_rx_dma_irq(int dma, void *data)
1214 struct net_device *dev = (struct net_device *)data;
1215 unsigned long ioaddr = dev->base_addr;
1216 struct smc911x_local *lp = netdev_priv(dev);
1217 struct sk_buff *skb = lp->current_rx_skb;
1218 unsigned long flags;
1221 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1222 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev, "RX DMA irq handler\n");
1223 /* Clear the DMA interrupt sources */
1224 SMC_DMA_ACK_IRQ(dev, dma);
1225 dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
1226 BUG_ON(skb == NULL);
1227 lp->current_rx_skb = NULL;
1228 PRINT_PKT(skb->data, skb->len);
1229 skb->protocol = eth_type_trans(skb, dev);
1230 dev->stats.rx_packets++;
1231 dev->stats.rx_bytes += skb->len;
1234 spin_lock_irqsave(&lp->lock, flags);
1235 pkts = (SMC_GET_RX_FIFO_INF(lp) & RX_FIFO_INF_RXSUSED_) >> 16;
1239 lp->rxdma_active = 0;
1241 spin_unlock_irqrestore(&lp->lock, flags);
1242 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev,
1243 "RX DMA irq completed. DMA RX FIFO PKTS %d\n",
1246 #endif /* SMC_USE_DMA */
1248 #ifdef CONFIG_NET_POLL_CONTROLLER
1250 * Polling receive - used by netconsole and other diagnostic tools
1251 * to allow network i/o with interrupts disabled.
1253 static void smc911x_poll_controller(struct net_device *dev)
1255 disable_irq(dev->irq);
1256 smc911x_interrupt(dev->irq, dev);
1257 enable_irq(dev->irq);
1261 /* Our watchdog timed out. Called by the networking layer */
1262 static void smc911x_timeout(struct net_device *dev)
1264 struct smc911x_local *lp = netdev_priv(dev);
1266 unsigned long flags;
1268 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1270 spin_lock_irqsave(&lp->lock, flags);
1271 status = SMC_GET_INT(lp);
1272 mask = SMC_GET_INT_EN(lp);
1273 spin_unlock_irqrestore(&lp->lock, flags);
1274 DBG(SMC_DEBUG_MISC, dev, "INT 0x%02x MASK 0x%02x\n",
1277 /* Dump the current TX FIFO contents and restart */
1278 mask = SMC_GET_TX_CFG(lp);
1279 SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
1281 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1282 * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
1283 * which calls schedule(). Hence we use a work queue.
1285 if (lp->phy_type != 0)
1286 schedule_work(&lp->phy_configure);
1288 /* We can accept TX packets again */
1289 dev->trans_start = jiffies; /* prevent tx timeout */
1290 netif_wake_queue(dev);
1294 * This routine will, depending on the values passed to it,
1295 * either make it accept multicast packets, go into
1296 * promiscuous mode (for TCPDUMP and cousins) or accept
1297 * a select set of multicast packets
1299 static void smc911x_set_multicast_list(struct net_device *dev)
1301 struct smc911x_local *lp = netdev_priv(dev);
1302 unsigned int multicast_table[2];
1303 unsigned int mcr, update_multicast = 0;
1304 unsigned long flags;
1306 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1308 spin_lock_irqsave(&lp->lock, flags);
1309 SMC_GET_MAC_CR(lp, mcr);
1310 spin_unlock_irqrestore(&lp->lock, flags);
1312 if (dev->flags & IFF_PROMISC) {
1314 DBG(SMC_DEBUG_MISC, dev, "RCR_PRMS\n");
1315 mcr |= MAC_CR_PRMS_;
1318 * Here, I am setting this to accept all multicast packets.
1319 * I don't need to zero the multicast table, because the flag is
1320 * checked before the table is
1322 else if (dev->flags & IFF_ALLMULTI || netdev_mc_count(dev) > 16) {
1323 DBG(SMC_DEBUG_MISC, dev, "RCR_ALMUL\n");
1324 mcr |= MAC_CR_MCPAS_;
1328 * This sets the internal hardware table to filter out unwanted
1329 * multicast packets before they take up memory.
1331 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1332 * address are the offset into the table. If that bit is 1, then the
1333 * multicast packet is accepted. Otherwise, it's dropped silently.
1335 * To use the 6 bits as an offset into the table, the high 1 bit is
1336 * the number of the 32 bit register, while the low 5 bits are the bit
1337 * within that register.
1339 else if (!netdev_mc_empty(dev)) {
1340 struct netdev_hw_addr *ha;
1342 /* Set the Hash perfec mode */
1343 mcr |= MAC_CR_HPFILT_;
1345 /* start with a table of all zeros: reject all */
1346 memset(multicast_table, 0, sizeof(multicast_table));
1348 netdev_for_each_mc_addr(ha, dev) {
1351 /* upper 6 bits are used as hash index */
1352 position = ether_crc(ETH_ALEN, ha->addr)>>26;
1354 multicast_table[position>>5] |= 1 << (position&0x1f);
1357 /* be sure I get rid of flags I might have set */
1358 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1360 /* now, the table can be loaded into the chipset */
1361 update_multicast = 1;
1363 DBG(SMC_DEBUG_MISC, dev, "~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n");
1364 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1367 * since I'm disabling all multicast entirely, I need to
1368 * clear the multicast list
1370 memset(multicast_table, 0, sizeof(multicast_table));
1371 update_multicast = 1;
1374 spin_lock_irqsave(&lp->lock, flags);
1375 SMC_SET_MAC_CR(lp, mcr);
1376 if (update_multicast) {
1377 DBG(SMC_DEBUG_MISC, dev,
1378 "update mcast hash table 0x%08x 0x%08x\n",
1379 multicast_table[0], multicast_table[1]);
1380 SMC_SET_HASHL(lp, multicast_table[0]);
1381 SMC_SET_HASHH(lp, multicast_table[1]);
1383 spin_unlock_irqrestore(&lp->lock, flags);
1388 * Open and Initialize the board
1390 * Set up everything, reset the card, etc..
1393 smc911x_open(struct net_device *dev)
1395 struct smc911x_local *lp = netdev_priv(dev);
1397 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1399 /* reset the hardware */
1402 /* Configure the PHY, initialize the link state */
1403 smc911x_phy_configure(&lp->phy_configure);
1405 /* Turn on Tx + Rx */
1406 smc911x_enable(dev);
1408 netif_start_queue(dev);
1416 * this makes the board clean up everything that it can
1417 * and not talk to the outside world. Caused by
1418 * an 'ifconfig ethX down'
1420 static int smc911x_close(struct net_device *dev)
1422 struct smc911x_local *lp = netdev_priv(dev);
1424 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1426 netif_stop_queue(dev);
1427 netif_carrier_off(dev);
1429 /* clear everything */
1430 smc911x_shutdown(dev);
1432 if (lp->phy_type != 0) {
1433 /* We need to ensure that no calls to
1434 * smc911x_phy_configure are pending.
1436 cancel_work_sync(&lp->phy_configure);
1437 smc911x_phy_powerdown(dev, lp->mii.phy_id);
1440 if (lp->pending_tx_skb) {
1441 dev_kfree_skb(lp->pending_tx_skb);
1442 lp->pending_tx_skb = NULL;
1452 smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1454 struct smc911x_local *lp = netdev_priv(dev);
1456 unsigned long flags;
1458 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1462 if (lp->phy_type != 0) {
1463 spin_lock_irqsave(&lp->lock, flags);
1464 ret = mii_ethtool_gset(&lp->mii, cmd);
1465 spin_unlock_irqrestore(&lp->lock, flags);
1467 cmd->supported = SUPPORTED_10baseT_Half |
1468 SUPPORTED_10baseT_Full |
1469 SUPPORTED_TP | SUPPORTED_AUI;
1471 if (lp->ctl_rspeed == 10)
1472 ethtool_cmd_speed_set(cmd, SPEED_10);
1473 else if (lp->ctl_rspeed == 100)
1474 ethtool_cmd_speed_set(cmd, SPEED_100);
1476 cmd->autoneg = AUTONEG_DISABLE;
1477 if (lp->mii.phy_id==1)
1478 cmd->transceiver = XCVR_INTERNAL;
1480 cmd->transceiver = XCVR_EXTERNAL;
1482 SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status);
1484 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
1485 DUPLEX_FULL : DUPLEX_HALF;
1493 smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1495 struct smc911x_local *lp = netdev_priv(dev);
1497 unsigned long flags;
1499 if (lp->phy_type != 0) {
1500 spin_lock_irqsave(&lp->lock, flags);
1501 ret = mii_ethtool_sset(&lp->mii, cmd);
1502 spin_unlock_irqrestore(&lp->lock, flags);
1504 if (cmd->autoneg != AUTONEG_DISABLE ||
1505 cmd->speed != SPEED_10 ||
1506 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1507 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1510 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1519 smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1521 strlcpy(info->driver, CARDNAME, sizeof(info->driver));
1522 strlcpy(info->version, version, sizeof(info->version));
1523 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1524 sizeof(info->bus_info));
1527 static int smc911x_ethtool_nwayreset(struct net_device *dev)
1529 struct smc911x_local *lp = netdev_priv(dev);
1531 unsigned long flags;
1533 if (lp->phy_type != 0) {
1534 spin_lock_irqsave(&lp->lock, flags);
1535 ret = mii_nway_restart(&lp->mii);
1536 spin_unlock_irqrestore(&lp->lock, flags);
1542 static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
1544 struct smc911x_local *lp = netdev_priv(dev);
1545 return lp->msg_enable;
1548 static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1550 struct smc911x_local *lp = netdev_priv(dev);
1551 lp->msg_enable = level;
1554 static int smc911x_ethtool_getregslen(struct net_device *dev)
1556 /* System regs + MAC regs + PHY regs */
1557 return (((E2P_CMD - ID_REV)/4 + 1) +
1558 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
1561 static void smc911x_ethtool_getregs(struct net_device *dev,
1562 struct ethtool_regs* regs, void *buf)
1564 struct smc911x_local *lp = netdev_priv(dev);
1565 unsigned long flags;
1567 u32 *data = (u32*)buf;
1569 regs->version = lp->version;
1570 for(i=ID_REV;i<=E2P_CMD;i+=4) {
1571 data[j++] = SMC_inl(lp, i);
1573 for(i=MAC_CR;i<=WUCSR;i++) {
1574 spin_lock_irqsave(&lp->lock, flags);
1575 SMC_GET_MAC_CSR(lp, i, reg);
1576 spin_unlock_irqrestore(&lp->lock, flags);
1579 for(i=0;i<=31;i++) {
1580 spin_lock_irqsave(&lp->lock, flags);
1581 SMC_GET_MII(lp, i, lp->mii.phy_id, reg);
1582 spin_unlock_irqrestore(&lp->lock, flags);
1583 data[j++] = reg & 0xFFFF;
1587 static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
1589 struct smc911x_local *lp = netdev_priv(dev);
1590 unsigned int timeout;
1593 e2p_cmd = SMC_GET_E2P_CMD(lp);
1594 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
1595 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
1596 PRINTK(dev, "%s timeout waiting for EEPROM to respond\n",
1601 e2p_cmd = SMC_GET_E2P_CMD(lp);
1604 PRINTK(dev, "%s timeout waiting for EEPROM CMD not busy\n",
1611 static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
1614 struct smc911x_local *lp = netdev_priv(dev);
1617 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1619 SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ |
1620 ((cmd) & (0x7<<28)) |
1625 static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
1628 struct smc911x_local *lp = netdev_priv(dev);
1631 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1633 *data = SMC_GET_E2P_DATA(lp);
1637 static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
1640 struct smc911x_local *lp = netdev_priv(dev);
1643 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1645 SMC_SET_E2P_DATA(lp, data);
1649 static int smc911x_ethtool_geteeprom(struct net_device *dev,
1650 struct ethtool_eeprom *eeprom, u8 *data)
1652 u8 eebuf[SMC911X_EEPROM_LEN];
1655 for(i=0;i<SMC911X_EEPROM_LEN;i++) {
1656 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
1658 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1661 memcpy(data, eebuf+eeprom->offset, eeprom->len);
1665 static int smc911x_ethtool_seteeprom(struct net_device *dev,
1666 struct ethtool_eeprom *eeprom, u8 *data)
1671 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
1673 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
1675 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
1678 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1680 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1686 static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
1688 return SMC911X_EEPROM_LEN;
1691 static const struct ethtool_ops smc911x_ethtool_ops = {
1692 .get_settings = smc911x_ethtool_getsettings,
1693 .set_settings = smc911x_ethtool_setsettings,
1694 .get_drvinfo = smc911x_ethtool_getdrvinfo,
1695 .get_msglevel = smc911x_ethtool_getmsglevel,
1696 .set_msglevel = smc911x_ethtool_setmsglevel,
1697 .nway_reset = smc911x_ethtool_nwayreset,
1698 .get_link = ethtool_op_get_link,
1699 .get_regs_len = smc911x_ethtool_getregslen,
1700 .get_regs = smc911x_ethtool_getregs,
1701 .get_eeprom_len = smc911x_ethtool_geteeprom_len,
1702 .get_eeprom = smc911x_ethtool_geteeprom,
1703 .set_eeprom = smc911x_ethtool_seteeprom,
1709 * This routine has a simple purpose -- make the SMC chip generate an
1710 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1712 static int smc911x_findirq(struct net_device *dev)
1714 struct smc911x_local *lp = netdev_priv(dev);
1716 unsigned long cookie;
1718 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1720 cookie = probe_irq_on();
1723 * Force a SW interrupt
1726 SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_);
1729 * Wait until positive that the interrupt has been generated
1734 int_status = SMC_GET_INT_EN(lp);
1735 if (int_status & INT_EN_SW_INT_EN_)
1736 break; /* got the interrupt */
1737 } while (--timeout);
1740 * there is really nothing that I can do here if timeout fails,
1741 * as autoirq_report will return a 0 anyway, which is what I
1742 * want in this case. Plus, the clean up is needed in both
1746 /* and disable all interrupts again */
1747 SMC_SET_INT_EN(lp, 0);
1749 /* and return what I found */
1750 return probe_irq_off(cookie);
1753 static const struct net_device_ops smc911x_netdev_ops = {
1754 .ndo_open = smc911x_open,
1755 .ndo_stop = smc911x_close,
1756 .ndo_start_xmit = smc911x_hard_start_xmit,
1757 .ndo_tx_timeout = smc911x_timeout,
1758 .ndo_set_rx_mode = smc911x_set_multicast_list,
1759 .ndo_change_mtu = eth_change_mtu,
1760 .ndo_validate_addr = eth_validate_addr,
1761 .ndo_set_mac_address = eth_mac_addr,
1762 #ifdef CONFIG_NET_POLL_CONTROLLER
1763 .ndo_poll_controller = smc911x_poll_controller,
1768 * Function: smc911x_probe(unsigned long ioaddr)
1771 * Tests to see if a given ioaddr points to an SMC911x chip.
1772 * Returns a 0 on success
1775 * (1) see if the endian word is OK
1776 * (1) see if I recognize the chip ID in the appropriate register
1778 * Here I do typical initialization tasks.
1780 * o Initialize the structure if needed
1781 * o print out my vanity message if not done so already
1782 * o print out what type of hardware is detected
1783 * o print out the ethernet address
1785 * o set up my private data
1786 * o configure the dev structure with my subroutines
1787 * o actually GRAB the irq.
1790 static int smc911x_probe(struct net_device *dev)
1792 struct smc911x_local *lp = netdev_priv(dev);
1794 unsigned int val, chip_id, revision;
1795 const char *version_string;
1796 unsigned long irq_flags;
1798 DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1800 /* First, see if the endian word is recognized */
1801 val = SMC_GET_BYTE_TEST(lp);
1802 DBG(SMC_DEBUG_MISC, dev, "%s: endian probe returned 0x%04x\n",
1804 if (val != 0x87654321) {
1805 netdev_err(dev, "Invalid chip endian 0x%08x\n", val);
1811 * check if the revision register is something that I
1812 * recognize. These might need to be added to later,
1813 * as future revisions could be added.
1815 chip_id = SMC_GET_PN(lp);
1816 DBG(SMC_DEBUG_MISC, dev, "%s: id probe returned 0x%04x\n",
1818 for(i=0;chip_ids[i].id != 0; i++) {
1819 if (chip_ids[i].id == chip_id) break;
1821 if (!chip_ids[i].id) {
1822 netdev_err(dev, "Unknown chip ID %04x\n", chip_id);
1826 version_string = chip_ids[i].name;
1828 revision = SMC_GET_REV(lp);
1829 DBG(SMC_DEBUG_MISC, dev, "%s: revision = 0x%04x\n", CARDNAME, revision);
1831 /* At this point I'll assume that the chip is an SMC911x. */
1832 DBG(SMC_DEBUG_MISC, dev, "%s: Found a %s\n",
1833 CARDNAME, chip_ids[i].name);
1835 /* Validate the TX FIFO size requested */
1836 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
1837 netdev_err(dev, "Invalid TX FIFO size requested %d\n",
1843 /* fill in some of the fields */
1844 lp->version = chip_ids[i].id;
1845 lp->revision = revision;
1846 lp->tx_fifo_kb = tx_fifo_kb;
1847 /* Reverse calculate the RX FIFO size from the TX */
1848 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
1849 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
1851 /* Set the automatic flow control values */
1852 switch(lp->tx_fifo_kb) {
1854 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
1855 * AFC_LO is AFC_HI/2
1856 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1858 case 2:/* 13440 Rx Data Fifo Size */
1859 lp->afc_cfg=0x008C46AF;break;
1860 case 3:/* 12480 Rx Data Fifo Size */
1861 lp->afc_cfg=0x0082419F;break;
1862 case 4:/* 11520 Rx Data Fifo Size */
1863 lp->afc_cfg=0x00783C9F;break;
1864 case 5:/* 10560 Rx Data Fifo Size */
1865 lp->afc_cfg=0x006E374F;break;
1866 case 6:/* 9600 Rx Data Fifo Size */
1867 lp->afc_cfg=0x0064328F;break;
1868 case 7:/* 8640 Rx Data Fifo Size */
1869 lp->afc_cfg=0x005A2D7F;break;
1870 case 8:/* 7680 Rx Data Fifo Size */
1871 lp->afc_cfg=0x0050287F;break;
1872 case 9:/* 6720 Rx Data Fifo Size */
1873 lp->afc_cfg=0x0046236F;break;
1874 case 10:/* 5760 Rx Data Fifo Size */
1875 lp->afc_cfg=0x003C1E6F;break;
1876 case 11:/* 4800 Rx Data Fifo Size */
1877 lp->afc_cfg=0x0032195F;break;
1879 * AFC_HI is ~1520 bytes less than RX Data Fifo Size
1880 * AFC_LO is AFC_HI/2
1881 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1883 case 12:/* 3840 Rx Data Fifo Size */
1884 lp->afc_cfg=0x0024124F;break;
1885 case 13:/* 2880 Rx Data Fifo Size */
1886 lp->afc_cfg=0x0015073F;break;
1887 case 14:/* 1920 Rx Data Fifo Size */
1888 lp->afc_cfg=0x0006032F;break;
1890 PRINTK(dev, "ERROR -- no AFC_CFG setting found");
1894 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX, dev,
1895 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
1896 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
1898 spin_lock_init(&lp->lock);
1900 /* Get the MAC address */
1901 SMC_GET_MAC_ADDR(lp, dev->dev_addr);
1903 /* now, reset the chip, and put it into a known state */
1907 * If dev->irq is 0, then the device has to be banged on to see
1910 * Specifying an IRQ is done with the assumption that the user knows
1911 * what (s)he is doing. No checking is done!!!!
1918 dev->irq = smc911x_findirq(dev);
1921 /* kick the card and try again */
1925 if (dev->irq == 0) {
1926 netdev_warn(dev, "Couldn't autodetect your IRQ. Use irq=xx.\n");
1930 dev->irq = irq_canonicalize(dev->irq);
1932 /* Fill in the fields of the device structure with ethernet values. */
1935 dev->netdev_ops = &smc911x_netdev_ops;
1936 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1937 dev->ethtool_ops = &smc911x_ethtool_ops;
1939 INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
1940 lp->mii.phy_id_mask = 0x1f;
1941 lp->mii.reg_num_mask = 0x1f;
1942 lp->mii.force_media = 0;
1943 lp->mii.full_duplex = 0;
1945 lp->mii.mdio_read = smc911x_phy_read;
1946 lp->mii.mdio_write = smc911x_phy_write;
1949 * Locate the phy, if any.
1951 smc911x_phy_detect(dev);
1953 /* Set default parameters */
1954 lp->msg_enable = NETIF_MSG_LINK;
1955 lp->ctl_rfduplx = 1;
1956 lp->ctl_rspeed = 100;
1958 #ifdef SMC_DYNAMIC_BUS_CONFIG
1959 irq_flags = lp->cfg.irq_flags;
1961 irq_flags = IRQF_SHARED | SMC_IRQ_SENSE;
1965 retval = request_irq(dev->irq, smc911x_interrupt,
1966 irq_flags, dev->name, dev);
1971 lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
1972 lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
1973 lp->rxdma_active = 0;
1974 lp->txdma_active = 0;
1975 dev->dma = lp->rxdma;
1978 retval = register_netdev(dev);
1980 /* now, print out the card info, in a short format.. */
1981 netdev_info(dev, "%s (rev %d) at %#lx IRQ %d",
1982 version_string, lp->revision,
1983 dev->base_addr, dev->irq);
1986 if (lp->rxdma != -1)
1987 pr_cont(" RXDMA %d", lp->rxdma);
1989 if (lp->txdma != -1)
1990 pr_cont(" TXDMA %d", lp->txdma);
1993 if (!is_valid_ether_addr(dev->dev_addr)) {
1994 netdev_warn(dev, "Invalid ethernet MAC address. Please set using ifconfig\n");
1996 /* Print the Ethernet address */
1997 netdev_info(dev, "Ethernet addr: %pM\n",
2001 if (lp->phy_type == 0) {
2002 PRINTK(dev, "No PHY found\n");
2003 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
2004 PRINTK(dev, "LAN911x Internal PHY\n");
2006 PRINTK(dev, "External PHY 0x%08x\n", lp->phy_type);
2013 if (lp->rxdma != -1) {
2014 SMC_DMA_FREE(dev, lp->rxdma);
2016 if (lp->txdma != -1) {
2017 SMC_DMA_FREE(dev, lp->txdma);
2025 * smc911x_drv_probe(void)
2028 * 0 --> there is a device
2029 * anything else, error
2031 static int smc911x_drv_probe(struct platform_device *pdev)
2033 struct net_device *ndev;
2034 struct resource *res;
2035 struct smc911x_local *lp;
2039 /* ndev is not valid yet, so avoid passing it in. */
2040 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
2041 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2048 * Request the regions.
2050 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
2055 ndev = alloc_etherdev(sizeof(struct smc911x_local));
2060 SET_NETDEV_DEV(ndev, &pdev->dev);
2062 ndev->dma = (unsigned char)-1;
2063 ndev->irq = platform_get_irq(pdev, 0);
2064 lp = netdev_priv(ndev);
2066 #ifdef SMC_DYNAMIC_BUS_CONFIG
2068 struct smc911x_platdata *pd = dev_get_platdata(&pdev->dev);
2073 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2077 addr = ioremap(res->start, SMC911X_IO_EXTENT);
2083 platform_set_drvdata(pdev, ndev);
2085 ndev->base_addr = res->start;
2086 ret = smc911x_probe(ndev);
2092 release_mem_region(res->start, SMC911X_IO_EXTENT);
2094 pr_info("%s: not found (%d).\n", CARDNAME, ret);
2098 lp->physaddr = res->start;
2099 lp->dev = &pdev->dev;
2106 static int smc911x_drv_remove(struct platform_device *pdev)
2108 struct net_device *ndev = platform_get_drvdata(pdev);
2109 struct smc911x_local *lp = netdev_priv(ndev);
2110 struct resource *res;
2112 DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2114 unregister_netdev(ndev);
2116 free_irq(ndev->irq, ndev);
2120 if (lp->rxdma != -1) {
2121 SMC_DMA_FREE(dev, lp->rxdma);
2123 if (lp->txdma != -1) {
2124 SMC_DMA_FREE(dev, lp->txdma);
2129 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2130 release_mem_region(res->start, SMC911X_IO_EXTENT);
2136 static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
2138 struct net_device *ndev = platform_get_drvdata(dev);
2139 struct smc911x_local *lp = netdev_priv(ndev);
2141 DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2143 if (netif_running(ndev)) {
2144 netif_device_detach(ndev);
2145 smc911x_shutdown(ndev);
2147 /* Set D2 - Energy detect only setting */
2148 SMC_SET_PMT_CTRL(lp, 2<<12);
2155 static int smc911x_drv_resume(struct platform_device *dev)
2157 struct net_device *ndev = platform_get_drvdata(dev);
2159 DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2161 struct smc911x_local *lp = netdev_priv(ndev);
2163 if (netif_running(ndev)) {
2164 smc911x_reset(ndev);
2165 if (lp->phy_type != 0)
2166 smc911x_phy_configure(&lp->phy_configure);
2167 smc911x_enable(ndev);
2168 netif_device_attach(ndev);
2174 static struct platform_driver smc911x_driver = {
2175 .probe = smc911x_drv_probe,
2176 .remove = smc911x_drv_remove,
2177 .suspend = smc911x_drv_suspend,
2178 .resume = smc911x_drv_resume,
2181 .owner = THIS_MODULE,
2185 module_platform_driver(smc911x_driver);