drivers/net/ethernet/intel/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2013 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  29
  30 #include <linux/module.h>
  31 #include <linux/types.h>
  32 #include <linux/init.h>
  33 #include <linux/bitops.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/pagemap.h>
  36 #include <linux/netdevice.h>
  37 #include <linux/ipv6.h>
  38 #include <linux/slab.h>
  39 #include <net/checksum.h>
  40 #include <net/ip6_checksum.h>
  41 #include <linux/net_tstamp.h>
  42 #include <linux/mii.h>
  43 #include <linux/ethtool.h>
  44 #include <linux/if.h>
  45 #include <linux/if_vlan.h>
  46 #include <linux/pci.h>
  47 #include <linux/pci-aspm.h>
  48 #include <linux/delay.h>
  49 #include <linux/interrupt.h>
  50 #include <linux/ip.h>
  51 #include <linux/tcp.h>
  52 #include <linux/sctp.h>
  53 #include <linux/if_ether.h>
  54 #include <linux/aer.h>
  55 #include <linux/prefetch.h>
  56 #include <linux/pm_runtime.h>
  57 #ifdef CONFIG_IGB_DCA
  58 #include <linux/dca.h>
  59 #endif
  60 #include <linux/i2c.h>
  61 #include "igb.h"
  62
  63 #define MAJ 5
  64 #define MIN 0
  65 #define BUILD 5
  66 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
  67 __stringify(BUILD) "-k"
  68 char igb_driver_name[] = "igb";
  69 char igb_driver_version[] = DRV_VERSION;
  70 static const char igb_driver_string[] =
  71                                 "Intel(R) Gigabit Ethernet Network Driver";
  72 static const char igb_copyright[] =
  73                                 "Copyright (c) 2007-2013 Intel Corporation.";
  74
  75 static const struct e1000_info *igb_info_tbl[] = {
  76         [board_82575] = &e1000_82575_info,
  77 };
  78
  79 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER), board_82575 },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER), board_82575 },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER), board_82575 },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES), board_82575 },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII), board_82575 },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS), board_82575 },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS), board_82575 },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER), board_82575 },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER), board_82575 },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES), board_82575 },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII), board_82575 },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES), board_82575 },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE), board_82575 },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP), board_82575 },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS), board_82575 },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES), board_82575 },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD), board_82575 },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2), board_82575 },
 111         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },
 112         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
 113         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
 114         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
 115         /* required last entry */
 116         {0, }
 117 };
 118
 119 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 120
 121 void igb_reset(struct igb_adapter *);
 122 static int igb_setup_all_tx_resources(struct igb_adapter *);
 123 static int igb_setup_all_rx_resources(struct igb_adapter *);
 124 static void igb_free_all_tx_resources(struct igb_adapter *);
 125 static void igb_free_all_rx_resources(struct igb_adapter *);
 126 static void igb_setup_mrqc(struct igb_adapter *);
 127 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 128 static void igb_remove(struct pci_dev *pdev);
 129 static int igb_sw_init(struct igb_adapter *);
 130 static int igb_open(struct net_device *);
 131 static int igb_close(struct net_device *);
 132 static void igb_configure(struct igb_adapter *);
 133 static void igb_configure_tx(struct igb_adapter *);
 134 static void igb_configure_rx(struct igb_adapter *);
 135 static void igb_clean_all_tx_rings(struct igb_adapter *);
 136 static void igb_clean_all_rx_rings(struct igb_adapter *);
 137 static void igb_clean_tx_ring(struct igb_ring *);
 138 static void igb_clean_rx_ring(struct igb_ring *);
 139 static void igb_set_rx_mode(struct net_device *);
 140 static void igb_update_phy_info(unsigned long);
 141 static void igb_watchdog(unsigned long);
 142 static void igb_watchdog_task(struct work_struct *);
 143 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 144 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *dev,
 145                                                  struct rtnl_link_stats64 *stats);
 146 static int igb_change_mtu(struct net_device *, int);
 147 static int igb_set_mac(struct net_device *, void *);
 148 static void igb_set_uta(struct igb_adapter *adapter);
 149 static irqreturn_t igb_intr(int irq, void *);
 150 static irqreturn_t igb_intr_msi(int irq, void *);
 151 static irqreturn_t igb_msix_other(int irq, void *);
 152 static irqreturn_t igb_msix_ring(int irq, void *);
 153 #ifdef CONFIG_IGB_DCA
 154 static void igb_update_dca(struct igb_q_vector *);
 155 static void igb_setup_dca(struct igb_adapter *);
 156 #endif /* CONFIG_IGB_DCA */
 157 static int igb_poll(struct napi_struct *, int);
 158 static bool igb_clean_tx_irq(struct igb_q_vector *);
 159 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
 160 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 161 static void igb_tx_timeout(struct net_device *);
 162 static void igb_reset_task(struct work_struct *);
 163 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features);
 164 static int igb_vlan_rx_add_vid(struct net_device *, __be16, u16);
 165 static int igb_vlan_rx_kill_vid(struct net_device *, __be16, u16);
 166 static void igb_restore_vlan(struct igb_adapter *);
 167 static void igb_rar_set_qsel(struct igb_adapter *, u8 *, u32 , u8);
 168 static void igb_ping_all_vfs(struct igb_adapter *);
 169 static void igb_msg_task(struct igb_adapter *);
 170 static void igb_vmm_control(struct igb_adapter *);
 171 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 172 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 173 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac);
 174 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 175                                int vf, u16 vlan, u8 qos);
 176 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
 177 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 178                                    bool setting);
 179 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 180                                  struct ifla_vf_info *ivi);
 181 static void igb_check_vf_rate_limit(struct igb_adapter *);
 182
 183 #ifdef CONFIG_PCI_IOV
 184 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 185 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs);
 186 #endif
 187
 188 #ifdef CONFIG_PM
 189 #ifdef CONFIG_PM_SLEEP
 190 static int igb_suspend(struct device *);
 191 #endif
 192 static int igb_resume(struct device *);
 193 #ifdef CONFIG_PM_RUNTIME
 194 static int igb_runtime_suspend(struct device *dev);
 195 static int igb_runtime_resume(struct device *dev);
 196 static int igb_runtime_idle(struct device *dev);
 197 #endif
 198 static const struct dev_pm_ops igb_pm_ops = {
 199         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 200         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 201                         igb_runtime_idle)
 202 };
 203 #endif
 204 static void igb_shutdown(struct pci_dev *);
 205 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs);
 206 #ifdef CONFIG_IGB_DCA
 207 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 208 static struct notifier_block dca_notifier = {
 209         .notifier_call  = igb_notify_dca,
 210         .next           = NULL,
 211         .priority       = 0
 212 };
 213 #endif
 214 #ifdef CONFIG_NET_POLL_CONTROLLER
 215 /* for netdump / net console */
 216 static void igb_netpoll(struct net_device *);
 217 #endif
 218 #ifdef CONFIG_PCI_IOV
 219 static unsigned int max_vfs = 0;
 220 module_param(max_vfs, uint, 0);
 221 MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate "
 222                  "per physical function");
 223 #endif /* CONFIG_PCI_IOV */
 224
 225 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 226                      pci_channel_state_t);
 227 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 228 static void igb_io_resume(struct pci_dev *);
 229
 230 static const struct pci_error_handlers igb_err_handler = {
 231         .error_detected = igb_io_error_detected,
 232         .slot_reset = igb_io_slot_reset,
 233         .resume = igb_io_resume,
 234 };
 235
 236 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 237
 238 static struct pci_driver igb_driver = {
 239         .name     = igb_driver_name,
 240         .id_table = igb_pci_tbl,
 241         .probe    = igb_probe,
 242         .remove   = igb_remove,
 243 #ifdef CONFIG_PM
 244         .driver.pm = &igb_pm_ops,
 245 #endif
 246         .shutdown = igb_shutdown,
 247         .sriov_configure = igb_pci_sriov_configure,
 248         .err_handler = &igb_err_handler
 249 };
 250
 251 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 252 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 253 MODULE_LICENSE("GPL");
 254 MODULE_VERSION(DRV_VERSION);
 255
 256 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 257 static int debug = -1;
 258 module_param(debug, int, 0);
 259 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 260
 261 struct igb_reg_info {
 262         u32 ofs;
 263         char *name;
 264 };
 265
 266 static const struct igb_reg_info igb_reg_info_tbl[] = {
 267
 268         /* General Registers */
 269         {E1000_CTRL, "CTRL"},
 270         {E1000_STATUS, "STATUS"},
 271         {E1000_CTRL_EXT, "CTRL_EXT"},
 272
 273         /* Interrupt Registers */
 274         {E1000_ICR, "ICR"},
 275
 276         /* RX Registers */
 277         {E1000_RCTL, "RCTL"},
 278         {E1000_RDLEN(0), "RDLEN"},
 279         {E1000_RDH(0), "RDH"},
 280         {E1000_RDT(0), "RDT"},
 281         {E1000_RXDCTL(0), "RXDCTL"},
 282         {E1000_RDBAL(0), "RDBAL"},
 283         {E1000_RDBAH(0), "RDBAH"},
 284
 285         /* TX Registers */
 286         {E1000_TCTL, "TCTL"},
 287         {E1000_TDBAL(0), "TDBAL"},
 288         {E1000_TDBAH(0), "TDBAH"},
 289         {E1000_TDLEN(0), "TDLEN"},
 290         {E1000_TDH(0), "TDH"},
 291         {E1000_TDT(0), "TDT"},
 292         {E1000_TXDCTL(0), "TXDCTL"},
 293         {E1000_TDFH, "TDFH"},
 294         {E1000_TDFT, "TDFT"},
 295         {E1000_TDFHS, "TDFHS"},
 296         {E1000_TDFPC, "TDFPC"},
 297
 298         /* List Terminator */
 299         {}
 300 };
 301
 302 /* igb_regdump - register printout routine */
 303 static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
 304 {
 305         int n = 0;
 306         char rname[16];
 307         u32 regs[8];
 308
 309         switch (reginfo->ofs) {
 310         case E1000_RDLEN(0):
 311                 for (n = 0; n < 4; n++)
 312                         regs[n] = rd32(E1000_RDLEN(n));
 313                 break;
 314         case E1000_RDH(0):
 315                 for (n = 0; n < 4; n++)
 316                         regs[n] = rd32(E1000_RDH(n));
 317                 break;
 318         case E1000_RDT(0):
 319                 for (n = 0; n < 4; n++)
 320                         regs[n] = rd32(E1000_RDT(n));
 321                 break;
 322         case E1000_RXDCTL(0):
 323                 for (n = 0; n < 4; n++)
 324                         regs[n] = rd32(E1000_RXDCTL(n));
 325                 break;
 326         case E1000_RDBAL(0):
 327                 for (n = 0; n < 4; n++)
 328                         regs[n] = rd32(E1000_RDBAL(n));
 329                 break;
 330         case E1000_RDBAH(0):
 331                 for (n = 0; n < 4; n++)
 332                         regs[n] = rd32(E1000_RDBAH(n));
 333                 break;
 334         case E1000_TDBAL(0):
 335                 for (n = 0; n < 4; n++)
 336                         regs[n] = rd32(E1000_RDBAL(n));
 337                 break;
 338         case E1000_TDBAH(0):
 339                 for (n = 0; n < 4; n++)
 340                         regs[n] = rd32(E1000_TDBAH(n));
 341                 break;
 342         case E1000_TDLEN(0):
 343                 for (n = 0; n < 4; n++)
 344                         regs[n] = rd32(E1000_TDLEN(n));
 345                 break;
 346         case E1000_TDH(0):
 347                 for (n = 0; n < 4; n++)
 348                         regs[n] = rd32(E1000_TDH(n));
 349                 break;
 350         case E1000_TDT(0):
 351                 for (n = 0; n < 4; n++)
 352                         regs[n] = rd32(E1000_TDT(n));
 353                 break;
 354         case E1000_TXDCTL(0):
 355                 for (n = 0; n < 4; n++)
 356                         regs[n] = rd32(E1000_TXDCTL(n));
 357                 break;
 358         default:
 359                 pr_info("%-15s %08x\n", reginfo->name, rd32(reginfo->ofs));
 360                 return;
 361         }
 362
 363         snprintf(rname, 16, "%s%s", reginfo->name, "[0-3]");
 364         pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1],
 365                 regs[2], regs[3]);
 366 }
 367
 368 /* igb_dump - Print registers, Tx-rings and Rx-rings */
 369 static void igb_dump(struct igb_adapter *adapter)
 370 {
 371         struct net_device *netdev = adapter->netdev;
 372         struct e1000_hw *hw = &adapter->hw;
 373         struct igb_reg_info *reginfo;
 374         struct igb_ring *tx_ring;
 375         union e1000_adv_tx_desc *tx_desc;
 376         struct my_u0 { u64 a; u64 b; } *u0;
 377         struct igb_ring *rx_ring;
 378         union e1000_adv_rx_desc *rx_desc;
 379         u32 staterr;
 380         u16 i, n;
 381
 382         if (!netif_msg_hw(adapter))
 383                 return;
 384
 385         /* Print netdevice Info */
 386         if (netdev) {
 387                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 388                 pr_info("Device Name     state            trans_start      "
 389                         "last_rx\n");
 390                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
 391                         netdev->state, netdev->trans_start, netdev->last_rx);
 392         }
 393
 394         /* Print Registers */
 395         dev_info(&adapter->pdev->dev, "Register Dump\n");
 396         pr_info(" Register Name   Value\n");
 397         for (reginfo = (struct igb_reg_info *)igb_reg_info_tbl;
 398              reginfo->name; reginfo++) {
 399                 igb_regdump(hw, reginfo);
 400         }
 401
 402         /* Print TX Ring Summary */
 403         if (!netdev || !netif_running(netdev))
 404                 goto exit;
 405
 406         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 407         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
 408         for (n = 0; n < adapter->num_tx_queues; n++) {
 409                 struct igb_tx_buffer *buffer_info;
 410                 tx_ring = adapter->tx_ring[n];
 411                 buffer_info = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 412                 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
 413                         n, tx_ring->next_to_use, tx_ring->next_to_clean,
 414                         (u64)dma_unmap_addr(buffer_info, dma),
 415                         dma_unmap_len(buffer_info, len),
 416                         buffer_info->next_to_watch,
 417                         (u64)buffer_info->time_stamp);
 418         }
 419
 420         /* Print TX Rings */
 421         if (!netif_msg_tx_done(adapter))
 422                 goto rx_ring_summary;
 423
 424         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 425
 426         /* Transmit Descriptor Formats
 427          *
 428          * Advanced Transmit Descriptor
 429          *   +--------------------------------------------------------------+
 430          * 0 |         Buffer Address [63:0]                                |
 431          *   +--------------------------------------------------------------+
 432          * 8 | PAYLEN  | PORTS  |CC|IDX | STA | DCMD  |DTYP|MAC|RSV| DTALEN |
 433          *   +--------------------------------------------------------------+
 434          *   63      46 45    40 39 38 36 35 32 31   24             15       0
 435          */
 436
 437         for (n = 0; n < adapter->num_tx_queues; n++) {
 438                 tx_ring = adapter->tx_ring[n];
 439                 pr_info("------------------------------------\n");
 440                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 441                 pr_info("------------------------------------\n");
 442                 pr_info("T [desc]     [address 63:0  ] [PlPOCIStDDM Ln] "
 443                         "[bi->dma       ] leng  ntw timestamp        "
 444                         "bi->skb\n");
 445
 446                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 447                         const char *next_desc;
 448                         struct igb_tx_buffer *buffer_info;
 449                         tx_desc = IGB_TX_DESC(tx_ring, i);
 450                         buffer_info = &tx_ring->tx_buffer_info[i];
 451                         u0 = (struct my_u0 *)tx_desc;
 452                         if (i == tx_ring->next_to_use &&
 453                             i == tx_ring->next_to_clean)
 454                                 next_desc = " NTC/U";
 455                         else if (i == tx_ring->next_to_use)
 456                                 next_desc = " NTU";
 457                         else if (i == tx_ring->next_to_clean)
 458                                 next_desc = " NTC";
 459                         else
 460                                 next_desc = "";
 461
 462                         pr_info("T [0x%03X]    %016llX %016llX %016llX"
 463                                 " %04X  %p %016llX %p%s\n", i,
 464                                 le64_to_cpu(u0->a),
 465                                 le64_to_cpu(u0->b),
 466                                 (u64)dma_unmap_addr(buffer_info, dma),
 467                                 dma_unmap_len(buffer_info, len),
 468                                 buffer_info->next_to_watch,
 469                                 (u64)buffer_info->time_stamp,
 470                                 buffer_info->skb, next_desc);
 471
 472                         if (netif_msg_pktdata(adapter) && buffer_info->skb)
 473                                 print_hex_dump(KERN_INFO, "",
 474                                         DUMP_PREFIX_ADDRESS,
 475                                         16, 1, buffer_info->skb->data,
 476                                         dma_unmap_len(buffer_info, len),
 477                                         true);
 478                 }
 479         }
 480
 481         /* Print RX Rings Summary */
 482 rx_ring_summary:
 483         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 484         pr_info("Queue [NTU] [NTC]\n");
 485         for (n = 0; n < adapter->num_rx_queues; n++) {
 486                 rx_ring = adapter->rx_ring[n];
 487                 pr_info(" %5d %5X %5X\n",
 488                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 489         }
 490
 491         /* Print RX Rings */
 492         if (!netif_msg_rx_status(adapter))
 493                 goto exit;
 494
 495         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 496
 497         /* Advanced Receive Descriptor (Read) Format
 498          *    63                                           1        0
 499          *    +-----------------------------------------------------+
 500          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 501          *    +----------------------------------------------+------+
 502          *  8 |       Header Buffer Address [63:1]           |  DD  |
 503          *    +-----------------------------------------------------+
 504          *
 505          *
 506          * Advanced Receive Descriptor (Write-Back) Format
 507          *
 508          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 509          *   +------------------------------------------------------+
 510          * 0 | Packet     IP     |SPH| HDR_LEN   | RSV|Packet|  RSS |
 511          *   | Checksum   Ident  |   |           |    | Type | Type |
 512          *   +------------------------------------------------------+
 513          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 514          *   +------------------------------------------------------+
 515          *   63       48 47    32 31            20 19               0
 516          */
 517
 518         for (n = 0; n < adapter->num_rx_queues; n++) {
 519                 rx_ring = adapter->rx_ring[n];
 520                 pr_info("------------------------------------\n");
 521                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 522                 pr_info("------------------------------------\n");
 523                 pr_info("R  [desc]      [ PktBuf     A0] [  HeadBuf   DD] "
 524                         "[bi->dma       ] [bi->skb] <-- Adv Rx Read format\n");
 525                 pr_info("RWB[desc]      [PcsmIpSHl PtRs] [vl er S cks ln] -----"
 526                         "----------- [bi->skb] <-- Adv Rx Write-Back format\n");
 527
 528                 for (i = 0; i < rx_ring->count; i++) {
 529                         const char *next_desc;
 530                         struct igb_rx_buffer *buffer_info;
 531                         buffer_info = &rx_ring->rx_buffer_info[i];
 532                         rx_desc = IGB_RX_DESC(rx_ring, i);
 533                         u0 = (struct my_u0 *)rx_desc;
 534                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 535
 536                         if (i == rx_ring->next_to_use)
 537                                 next_desc = " NTU";
 538                         else if (i == rx_ring->next_to_clean)
 539                                 next_desc = " NTC";
 540                         else
 541                                 next_desc = "";
 542
 543                         if (staterr & E1000_RXD_STAT_DD) {
 544                                 /* Descriptor Done */
 545                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %s\n",
 546                                         "RWB", i,
 547                                         le64_to_cpu(u0->a),
 548                                         le64_to_cpu(u0->b),
 549                                         next_desc);
 550                         } else {
 551                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %s\n",
 552                                         "R  ", i,
 553                                         le64_to_cpu(u0->a),
 554                                         le64_to_cpu(u0->b),
 555                                         (u64)buffer_info->dma,
 556                                         next_desc);
 557
 558                                 if (netif_msg_pktdata(adapter) &&
 559                                     buffer_info->dma && buffer_info->page) {
 560                                         print_hex_dump(KERN_INFO, "",
 561                                           DUMP_PREFIX_ADDRESS,
 562                                           16, 1,
 563                                           page_address(buffer_info->page) +
 564                                                       buffer_info->page_offset,
 565                                           IGB_RX_BUFSZ, true);
 566                                 }
 567                         }
 568                 }
 569         }
 570
 571 exit:
 572         return;
 573 }
 574
 575 /**
 576  *  igb_get_i2c_data - Reads the I2C SDA data bit
 577  *  @hw: pointer to hardware structure
 578  *  @i2cctl: Current value of I2CCTL register
 579  *
 580  *  Returns the I2C data bit value
 581  **/
 582 static int igb_get_i2c_data(void *data)
 583 {
 584         struct igb_adapter *adapter = (struct igb_adapter *)data;
 585         struct e1000_hw *hw = &adapter->hw;
 586         s32 i2cctl = rd32(E1000_I2CPARAMS);
 587
 588         return ((i2cctl & E1000_I2C_DATA_IN) != 0);
 589 }
 590
 591 /**
 592  *  igb_set_i2c_data - Sets the I2C data bit
 593  *  @data: pointer to hardware structure
 594  *  @state: I2C data value (0 or 1) to set
 595  *
 596  *  Sets the I2C data bit
 597  **/
 598 static void igb_set_i2c_data(void *data, int state)
 599 {
 600         struct igb_adapter *adapter = (struct igb_adapter *)data;
 601         struct e1000_hw *hw = &adapter->hw;
 602         s32 i2cctl = rd32(E1000_I2CPARAMS);
 603
 604         if (state)
 605                 i2cctl |= E1000_I2C_DATA_OUT;
 606         else
 607                 i2cctl &= ~E1000_I2C_DATA_OUT;
 608
 609         i2cctl &= ~E1000_I2C_DATA_OE_N;
 610         i2cctl |= E1000_I2C_CLK_OE_N;
 611         wr32(E1000_I2CPARAMS, i2cctl);
 612         wrfl();
 613
 614 }
 615
 616 /**
 617  *  igb_set_i2c_clk - Sets the I2C SCL clock
 618  *  @data: pointer to hardware structure
 619  *  @state: state to set clock
 620  *
 621  *  Sets the I2C clock line to state
 622  **/
 623 static void igb_set_i2c_clk(void *data, int state)
 624 {
 625         struct igb_adapter *adapter = (struct igb_adapter *)data;
 626         struct e1000_hw *hw = &adapter->hw;
 627         s32 i2cctl = rd32(E1000_I2CPARAMS);
 628
 629         if (state) {
 630                 i2cctl |= E1000_I2C_CLK_OUT;
 631                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 632         } else {
 633                 i2cctl &= ~E1000_I2C_CLK_OUT;
 634                 i2cctl &= ~E1000_I2C_CLK_OE_N;
 635         }
 636         wr32(E1000_I2CPARAMS, i2cctl);
 637         wrfl();
 638 }
 639
 640 /**
 641  *  igb_get_i2c_clk - Gets the I2C SCL clock state
 642  *  @data: pointer to hardware structure
 643  *
 644  *  Gets the I2C clock state
 645  **/
 646 static int igb_get_i2c_clk(void *data)
 647 {
 648         struct igb_adapter *adapter = (struct igb_adapter *)data;
 649         struct e1000_hw *hw = &adapter->hw;
 650         s32 i2cctl = rd32(E1000_I2CPARAMS);
 651
 652         return ((i2cctl & E1000_I2C_CLK_IN) != 0);
 653 }
 654
 655 static const struct i2c_algo_bit_data igb_i2c_algo = {
 656         .setsda         = igb_set_i2c_data,
 657         .setscl         = igb_set_i2c_clk,
 658         .getsda         = igb_get_i2c_data,
 659         .getscl         = igb_get_i2c_clk,
 660         .udelay         = 5,
 661         .timeout        = 20,
 662 };
 663
 664 /**
 665  *  igb_get_hw_dev - return device
 666  *  @hw: pointer to hardware structure
 667  *
 668  *  used by hardware layer to print debugging information
 669  **/
 670 struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
 671 {
 672         struct igb_adapter *adapter = hw->back;
 673         return adapter->netdev;
 674 }
 675
 676 /**
 677  *  igb_init_module - Driver Registration Routine
 678  *
 679  *  igb_init_module is the first routine called when the driver is
 680  *  loaded. All it does is register with the PCI subsystem.
 681  **/
 682 static int __init igb_init_module(void)
 683 {
 684         int ret;
 685         pr_info("%s - version %s\n",
 686                igb_driver_string, igb_driver_version);
 687
 688         pr_info("%s\n", igb_copyright);
 689
 690 #ifdef CONFIG_IGB_DCA
 691         dca_register_notify(&dca_notifier);
 692 #endif
 693         ret = pci_register_driver(&igb_driver);
 694         return ret;
 695 }
 696
 697 module_init(igb_init_module);
 698
 699 /**
 700  *  igb_exit_module - Driver Exit Cleanup Routine
 701  *
 702  *  igb_exit_module is called just before the driver is removed
 703  *  from memory.
 704  **/
 705 static void __exit igb_exit_module(void)
 706 {
 707 #ifdef CONFIG_IGB_DCA
 708         dca_unregister_notify(&dca_notifier);
 709 #endif
 710         pci_unregister_driver(&igb_driver);
 711 }
 712
 713 module_exit(igb_exit_module);
 714
 715 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 716 /**
 717  *  igb_cache_ring_register - Descriptor ring to register mapping
 718  *  @adapter: board private structure to initialize
 719  *
 720  *  Once we know the feature-set enabled for the device, we'll cache
 721  *  the register offset the descriptor ring is assigned to.
 722  **/
 723 static void igb_cache_ring_register(struct igb_adapter *adapter)
 724 {
 725         int i = 0, j = 0;
 726         u32 rbase_offset = adapter->vfs_allocated_count;
 727
 728         switch (adapter->hw.mac.type) {
 729         case e1000_82576:
 730                 /* The queues are allocated for virtualization such that VF 0
 731                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 732                  * In order to avoid collision we start at the first free queue
 733                  * and continue consuming queues in the same sequence
 734                  */
 735                 if (adapter->vfs_allocated_count) {
 736                         for (; i < adapter->rss_queues; i++)
 737                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 738                                                                Q_IDX_82576(i);
 739                 }
 740         case e1000_82575:
 741         case e1000_82580:
 742         case e1000_i350:
 743         case e1000_i354:
 744         case e1000_i210:
 745         case e1000_i211:
 746         default:
 747                 for (; i < adapter->num_rx_queues; i++)
 748                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 749                 for (; j < adapter->num_tx_queues; j++)
 750                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 751                 break;
 752         }
 753 }
 754
 755 /**
 756  *  igb_write_ivar - configure ivar for given MSI-X vector
 757  *  @hw: pointer to the HW structure
 758  *  @msix_vector: vector number we are allocating to a given ring
 759  *  @index: row index of IVAR register to write within IVAR table
 760  *  @offset: column offset of in IVAR, should be multiple of 8
 761  *
 762  *  This function is intended to handle the writing of the IVAR register
 763  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 764  *  each containing an cause allocation for an Rx and Tx ring, and a
 765  *  variable number of rows depending on the number of queues supported.
 766  **/
 767 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 768                            int index, int offset)
 769 {
 770         u32 ivar = array_rd32(E1000_IVAR0, index);
 771
 772         /* clear any bits that are currently set */
 773         ivar &= ~((u32)0xFF << offset);
 774
 775         /* write vector and valid bit */
 776         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 777
 778         array_wr32(E1000_IVAR0, index, ivar);
 779 }
 780
 781 #define IGB_N0_QUEUE -1
 782 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 783 {
 784         struct igb_adapter *adapter = q_vector->adapter;
 785         struct e1000_hw *hw = &adapter->hw;
 786         int rx_queue = IGB_N0_QUEUE;
 787         int tx_queue = IGB_N0_QUEUE;
 788         u32 msixbm = 0;
 789
 790         if (q_vector->rx.ring)
 791                 rx_queue = q_vector->rx.ring->reg_idx;
 792         if (q_vector->tx.ring)
 793                 tx_queue = q_vector->tx.ring->reg_idx;
 794
 795         switch (hw->mac.type) {
 796         case e1000_82575:
 797                 /* The 82575 assigns vectors using a bitmask, which matches the
 798                  * bitmask for the EICR/EIMS/EIMC registers.  To assign one
 799                  * or more queues to a vector, we write the appropriate bits
 800                  * into the MSIXBM register for that vector.
 801                  */
 802                 if (rx_queue > IGB_N0_QUEUE)
 803                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 804                 if (tx_queue > IGB_N0_QUEUE)
 805                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 806                 if (!adapter->msix_entries && msix_vector == 0)
 807                         msixbm |= E1000_EIMS_OTHER;
 808                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 809                 q_vector->eims_value = msixbm;
 810                 break;
 811         case e1000_82576:
 812                 /* 82576 uses a table that essentially consists of 2 columns
 813                  * with 8 rows.  The ordering is column-major so we use the
 814                  * lower 3 bits as the row index, and the 4th bit as the
 815                  * column offset.
 816                  */
 817                 if (rx_queue > IGB_N0_QUEUE)
 818                         igb_write_ivar(hw, msix_vector,
 819                                        rx_queue & 0x7,
 820                                        (rx_queue & 0x8) << 1);
 821                 if (tx_queue > IGB_N0_QUEUE)
 822                         igb_write_ivar(hw, msix_vector,
 823                                        tx_queue & 0x7,
 824                                        ((tx_queue & 0x8) << 1) + 8);
 825                 q_vector->eims_value = 1 << msix_vector;
 826                 break;
 827         case e1000_82580:
 828         case e1000_i350:
 829         case e1000_i354:
 830         case e1000_i210:
 831         case e1000_i211:
 832                 /* On 82580 and newer adapters the scheme is similar to 82576
 833                  * however instead of ordering column-major we have things
 834                  * ordered row-major.  So we traverse the table by using
 835                  * bit 0 as the column offset, and the remaining bits as the
 836                  * row index.
 837                  */
 838                 if (rx_queue > IGB_N0_QUEUE)
 839                         igb_write_ivar(hw, msix_vector,
 840                                        rx_queue >> 1,
 841                                        (rx_queue & 0x1) << 4);
 842                 if (tx_queue > IGB_N0_QUEUE)
 843                         igb_write_ivar(hw, msix_vector,
 844                                        tx_queue >> 1,
 845                                        ((tx_queue & 0x1) << 4) + 8);
 846                 q_vector->eims_value = 1 << msix_vector;
 847                 break;
 848         default:
 849                 BUG();
 850                 break;
 851         }
 852
 853         /* add q_vector eims value to global eims_enable_mask */
 854         adapter->eims_enable_mask |= q_vector->eims_value;
 855
 856         /* configure q_vector to set itr on first interrupt */
 857         q_vector->set_itr = 1;
 858 }
 859
 860 /**
 861  *  igb_configure_msix - Configure MSI-X hardware
 862  *  @adapter: board private structure to initialize
 863  *
 864  *  igb_configure_msix sets up the hardware to properly
 865  *  generate MSI-X interrupts.
 866  **/
 867 static void igb_configure_msix(struct igb_adapter *adapter)
 868 {
 869         u32 tmp;
 870         int i, vector = 0;
 871         struct e1000_hw *hw = &adapter->hw;
 872
 873         adapter->eims_enable_mask = 0;
 874
 875         /* set vector for other causes, i.e. link changes */
 876         switch (hw->mac.type) {
 877         case e1000_82575:
 878                 tmp = rd32(E1000_CTRL_EXT);
 879                 /* enable MSI-X PBA support*/
 880                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 881
 882                 /* Auto-Mask interrupts upon ICR read. */
 883                 tmp |= E1000_CTRL_EXT_EIAME;
 884                 tmp |= E1000_CTRL_EXT_IRCA;
 885
 886                 wr32(E1000_CTRL_EXT, tmp);
 887
 888                 /* enable msix_other interrupt */
 889                 array_wr32(E1000_MSIXBM(0), vector++, E1000_EIMS_OTHER);
 890                 adapter->eims_other = E1000_EIMS_OTHER;
 891
 892                 break;
 893
 894         case e1000_82576:
 895         case e1000_82580:
 896         case e1000_i350:
 897         case e1000_i354:
 898         case e1000_i210:
 899         case e1000_i211:
 900                 /* Turn on MSI-X capability first, or our settings
 901                  * won't stick.  And it will take days to debug.
 902                  */
 903                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 904                      E1000_GPIE_PBA | E1000_GPIE_EIAME |
 905                      E1000_GPIE_NSICR);
 906
 907                 /* enable msix_other interrupt */
 908                 adapter->eims_other = 1 << vector;
 909                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 910
 911                 wr32(E1000_IVAR_MISC, tmp);
 912                 break;
 913         default:
 914                 /* do nothing, since nothing else supports MSI-X */
 915                 break;
 916         } /* switch (hw->mac.type) */
 917
 918         adapter->eims_enable_mask |= adapter->eims_other;
 919
 920         for (i = 0; i < adapter->num_q_vectors; i++)
 921                 igb_assign_vector(adapter->q_vector[i], vector++);
 922
 923         wrfl();
 924 }
 925
 926 /**
 927  *  igb_request_msix - Initialize MSI-X interrupts
 928  *  @adapter: board private structure to initialize
 929  *
 930  *  igb_request_msix allocates MSI-X vectors and requests interrupts from the
 931  *  kernel.
 932  **/
 933 static int igb_request_msix(struct igb_adapter *adapter)
 934 {
 935         struct net_device *netdev = adapter->netdev;
 936         struct e1000_hw *hw = &adapter->hw;
 937         int i, err = 0, vector = 0, free_vector = 0;
 938
 939         err = request_irq(adapter->msix_entries[vector].vector,
 940                           igb_msix_other, 0, netdev->name, adapter);
 941         if (err)
 942                 goto err_out;
 943
 944         for (i = 0; i < adapter->num_q_vectors; i++) {
 945                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 946
 947                 vector++;
 948
 949                 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
 950
 951                 if (q_vector->rx.ring && q_vector->tx.ring)
 952                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 953                                 q_vector->rx.ring->queue_index);
 954                 else if (q_vector->tx.ring)
 955                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 956                                 q_vector->tx.ring->queue_index);
 957                 else if (q_vector->rx.ring)
 958                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 959                                 q_vector->rx.ring->queue_index);
 960                 else
 961                         sprintf(q_vector->name, "%s-unused", netdev->name);
 962
 963                 err = request_irq(adapter->msix_entries[vector].vector,
 964                                   igb_msix_ring, 0, q_vector->name,
 965                                   q_vector);
 966                 if (err)
 967                         goto err_free;
 968         }
 969
 970         igb_configure_msix(adapter);
 971         return 0;
 972
 973 err_free:
 974         /* free already assigned IRQs */
 975         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 976
 977         vector--;
 978         for (i = 0; i < vector; i++) {
 979                 free_irq(adapter->msix_entries[free_vector++].vector,
 980                          adapter->q_vector[i]);
 981         }
 982 err_out:
 983         return err;
 984 }
 985
 986 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 987 {
 988         if (adapter->msix_entries) {
 989                 pci_disable_msix(adapter->pdev);
 990                 kfree(adapter->msix_entries);
 991                 adapter->msix_entries = NULL;
 992         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
 993                 pci_disable_msi(adapter->pdev);
 994         }
 995 }
 996
 997 /**
 998  *  igb_free_q_vector - Free memory allocated for specific interrupt vector
 999  *  @adapter: board private structure to initialize
1000  *  @v_idx: Index of vector to be freed
1001  *
1002  *  This function frees the memory allocated to the q_vector.  In addition if
1003  *  NAPI is enabled it will delete any references to the NAPI struct prior
1004  *  to freeing the q_vector.
1005  **/
1006 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
1007 {
1008         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
1009
1010         if (q_vector->tx.ring)
1011                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
1012
1013         if (q_vector->rx.ring)
1014                 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
1015
1016         adapter->q_vector[v_idx] = NULL;
1017         netif_napi_del(&q_vector->napi);
1018
1019         /* igb_get_stats64() might access the rings on this vector,
1020          * we must wait a grace period before freeing it.
1021          */
1022         kfree_rcu(q_vector, rcu);
1023 }
1024
1025 /**
1026  *  igb_free_q_vectors - Free memory allocated for interrupt vectors
1027  *  @adapter: board private structure to initialize
1028  *
1029  *  This function frees the memory allocated to the q_vectors.  In addition if
1030  *  NAPI is enabled it will delete any references to the NAPI struct prior
1031  *  to freeing the q_vector.
1032  **/
1033 static void igb_free_q_vectors(struct igb_adapter *adapter)
1034 {
1035         int v_idx = adapter->num_q_vectors;
1036
1037         adapter->num_tx_queues = 0;
1038         adapter->num_rx_queues = 0;
1039         adapter->num_q_vectors = 0;
1040
1041         while (v_idx--)
1042                 igb_free_q_vector(adapter, v_idx);
1043 }
1044
1045 /**
1046  *  igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1047  *  @adapter: board private structure to initialize
1048  *
1049  *  This function resets the device so that it has 0 Rx queues, Tx queues, and
1050  *  MSI-X interrupts allocated.
1051  */
1052 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
1053 {
1054         igb_free_q_vectors(adapter);
1055         igb_reset_interrupt_capability(adapter);
1056 }
1057
1058 /**
1059  *  igb_set_interrupt_capability - set MSI or MSI-X if supported
1060  *  @adapter: board private structure to initialize
1061  *  @msix: boolean value of MSIX capability
1062  *
1063  *  Attempt to configure interrupts using the best available
1064  *  capabilities of the hardware and kernel.
1065  **/
1066 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
1067 {
1068         int err;
1069         int numvecs, i;
1070
1071         if (!msix)
1072                 goto msi_only;
1073
1074         /* Number of supported queues. */
1075         adapter->num_rx_queues = adapter->rss_queues;
1076         if (adapter->vfs_allocated_count)
1077                 adapter->num_tx_queues = 1;
1078         else
1079                 adapter->num_tx_queues = adapter->rss_queues;
1080
1081         /* start with one vector for every Rx queue */
1082         numvecs = adapter->num_rx_queues;
1083
1084         /* if Tx handler is separate add 1 for every Tx queue */
1085         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1086                 numvecs += adapter->num_tx_queues;
1087
1088         /* store the number of vectors reserved for queues */
1089         adapter->num_q_vectors = numvecs;
1090
1091         /* add 1 vector for link status interrupts */
1092         numvecs++;
1093         adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
1094                                         GFP_KERNEL);
1095
1096         if (!adapter->msix_entries)
1097                 goto msi_only;
1098
1099         for (i = 0; i < numvecs; i++)
1100                 adapter->msix_entries[i].entry = i;
1101
1102         err = pci_enable_msix(adapter->pdev,
1103                               adapter->msix_entries,
1104                               numvecs);
1105         if (err == 0)
1106                 return;
1107
1108         igb_reset_interrupt_capability(adapter);
1109
1110         /* If we can't do MSI-X, try MSI */
1111 msi_only:
1112 #ifdef CONFIG_PCI_IOV
1113         /* disable SR-IOV for non MSI-X configurations */
1114         if (adapter->vf_data) {
1115                 struct e1000_hw *hw = &adapter->hw;
1116                 /* disable iov and allow time for transactions to clear */
1117                 pci_disable_sriov(adapter->pdev);
1118                 msleep(500);
1119
1120                 kfree(adapter->vf_data);
1121                 adapter->vf_data = NULL;
1122                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
1123                 wrfl();
1124                 msleep(100);
1125                 dev_info(&adapter->pdev->dev, "IOV Disabled\n");
1126         }
1127 #endif
1128         adapter->vfs_allocated_count = 0;
1129         adapter->rss_queues = 1;
1130         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1131         adapter->num_rx_queues = 1;
1132         adapter->num_tx_queues = 1;
1133         adapter->num_q_vectors = 1;
1134         if (!pci_enable_msi(adapter->pdev))
1135                 adapter->flags |= IGB_FLAG_HAS_MSI;
1136 }
1137
1138 static void igb_add_ring(struct igb_ring *ring,
1139                          struct igb_ring_container *head)
1140 {
1141         head->ring = ring;
1142         head->count++;
1143 }
1144
1145 /**
1146  *  igb_alloc_q_vector - Allocate memory for a single interrupt vector
1147  *  @adapter: board private structure to initialize
1148  *  @v_count: q_vectors allocated on adapter, used for ring interleaving
1149  *  @v_idx: index of vector in adapter struct
1150  *  @txr_count: total number of Tx rings to allocate
1151  *  @txr_idx: index of first Tx ring to allocate
1152  *  @rxr_count: total number of Rx rings to allocate
1153  *  @rxr_idx: index of first Rx ring to allocate
1154  *
1155  *  We allocate one q_vector.  If allocation fails we return -ENOMEM.
1156  **/
1157 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1158                               int v_count, int v_idx,
1159                               int txr_count, int txr_idx,
1160                               int rxr_count, int rxr_idx)
1161 {
1162         struct igb_q_vector *q_vector;
1163         struct igb_ring *ring;
1164         int ring_count, size;
1165
1166         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1167         if (txr_count > 1 || rxr_count > 1)
1168                 return -ENOMEM;
1169
1170         ring_count = txr_count + rxr_count;
1171         size = sizeof(struct igb_q_vector) +
1172                (sizeof(struct igb_ring) * ring_count);
1173
1174         /* allocate q_vector and rings */
1175         q_vector = kzalloc(size, GFP_KERNEL);
1176         if (!q_vector)
1177                 return -ENOMEM;
1178
1179         /* initialize NAPI */
1180         netif_napi_add(adapter->netdev, &q_vector->napi,
1181                        igb_poll, 64);
1182
1183         /* tie q_vector and adapter together */
1184         adapter->q_vector[v_idx] = q_vector;
1185         q_vector->adapter = adapter;
1186
1187         /* initialize work limits */
1188         q_vector->tx.work_limit = adapter->tx_work_limit;
1189
1190         /* initialize ITR configuration */
1191         q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1192         q_vector->itr_val = IGB_START_ITR;
1193
1194         /* initialize pointer to rings */
1195         ring = q_vector->ring;
1196
1197         /* intialize ITR */
1198         if (rxr_count) {
1199                 /* rx or rx/tx vector */
1200                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1201                         q_vector->itr_val = adapter->rx_itr_setting;
1202         } else {
1203                 /* tx only vector */
1204                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1205                         q_vector->itr_val = adapter->tx_itr_setting;
1206         }
1207
1208         if (txr_count) {
1209                 /* assign generic ring traits */
1210                 ring->dev = &adapter->pdev->dev;
1211                 ring->netdev = adapter->netdev;
1212
1213                 /* configure backlink on ring */
1214                 ring->q_vector = q_vector;
1215
1216                 /* update q_vector Tx values */
1217                 igb_add_ring(ring, &q_vector->tx);
1218
1219                 /* For 82575, context index must be unique per ring. */
1220                 if (adapter->hw.mac.type == e1000_82575)
1221                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1222
1223                 /* apply Tx specific ring traits */
1224                 ring->count = adapter->tx_ring_count;
1225                 ring->queue_index = txr_idx;
1226
1227                 u64_stats_init(&ring->tx_syncp);
1228                 u64_stats_init(&ring->tx_syncp2);
1229
1230                 /* assign ring to adapter */
1231                 adapter->tx_ring[txr_idx] = ring;
1232
1233                 /* push pointer to next ring */
1234                 ring++;
1235         }
1236
1237         if (rxr_count) {
1238                 /* assign generic ring traits */
1239                 ring->dev = &adapter->pdev->dev;
1240                 ring->netdev = adapter->netdev;
1241
1242                 /* configure backlink on ring */
1243                 ring->q_vector = q_vector;
1244
1245                 /* update q_vector Rx values */
1246                 igb_add_ring(ring, &q_vector->rx);
1247
1248                 /* set flag indicating ring supports SCTP checksum offload */
1249                 if (adapter->hw.mac.type >= e1000_82576)
1250                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1251
1252                 /*
1253                  * On i350, i354, i210, and i211, loopback VLAN packets
1254                  * have the tag byte-swapped.
1255                  */
1256                 if (adapter->hw.mac.type >= e1000_i350)
1257                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1258
1259                 /* apply Rx specific ring traits */
1260                 ring->count = adapter->rx_ring_count;
1261                 ring->queue_index = rxr_idx;
1262
1263                 u64_stats_init(&ring->rx_syncp);
1264
1265                 /* assign ring to adapter */
1266                 adapter->rx_ring[rxr_idx] = ring;
1267         }
1268
1269         return 0;
1270 }
1271
1272
1273 /**
1274  *  igb_alloc_q_vectors - Allocate memory for interrupt vectors
1275  *  @adapter: board private structure to initialize
1276  *
1277  *  We allocate one q_vector per queue interrupt.  If allocation fails we
1278  *  return -ENOMEM.
1279  **/
1280 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1281 {
1282         int q_vectors = adapter->num_q_vectors;
1283         int rxr_remaining = adapter->num_rx_queues;
1284         int txr_remaining = adapter->num_tx_queues;
1285         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1286         int err;
1287
1288         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1289                 for (; rxr_remaining; v_idx++) {
1290                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1291                                                  0, 0, 1, rxr_idx);
1292
1293                         if (err)
1294                                 goto err_out;
1295
1296                         /* update counts and index */
1297                         rxr_remaining--;
1298                         rxr_idx++;
1299                 }
1300         }
1301
1302         for (; v_idx < q_vectors; v_idx++) {
1303                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1304                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1305                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1306                                          tqpv, txr_idx, rqpv, rxr_idx);
1307
1308                 if (err)
1309                         goto err_out;
1310
1311                 /* update counts and index */
1312                 rxr_remaining -= rqpv;
1313                 txr_remaining -= tqpv;
1314                 rxr_idx++;
1315                 txr_idx++;
1316         }
1317
1318         return 0;
1319
1320 err_out:
1321         adapter->num_tx_queues = 0;
1322         adapter->num_rx_queues = 0;
1323         adapter->num_q_vectors = 0;
1324
1325         while (v_idx--)
1326                 igb_free_q_vector(adapter, v_idx);
1327
1328         return -ENOMEM;
1329 }
1330
1331 /**
1332  *  igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1333  *  @adapter: board private structure to initialize
1334  *  @msix: boolean value of MSIX capability
1335  *
1336  *  This function initializes the interrupts and allocates all of the queues.
1337  **/
1338 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1339 {
1340         struct pci_dev *pdev = adapter->pdev;
1341         int err;
1342
1343         igb_set_interrupt_capability(adapter, msix);
1344
1345         err = igb_alloc_q_vectors(adapter);
1346         if (err) {
1347                 dev_err(&pdev->dev, "Unable to allocate memory for vectors\n");
1348                 goto err_alloc_q_vectors;
1349         }
1350
1351         igb_cache_ring_register(adapter);
1352
1353         return 0;
1354
1355 err_alloc_q_vectors:
1356         igb_reset_interrupt_capability(adapter);
1357         return err;
1358 }
1359
1360 /**
1361  *  igb_request_irq - initialize interrupts
1362  *  @adapter: board private structure to initialize
1363  *
1364  *  Attempts to configure interrupts using the best available
1365  *  capabilities of the hardware and kernel.
1366  **/
1367 static int igb_request_irq(struct igb_adapter *adapter)
1368 {
1369         struct net_device *netdev = adapter->netdev;
1370         struct pci_dev *pdev = adapter->pdev;
1371         int err = 0;
1372
1373         if (adapter->msix_entries) {
1374                 err = igb_request_msix(adapter);
1375                 if (!err)
1376                         goto request_done;
1377                 /* fall back to MSI */
1378                 igb_free_all_tx_resources(adapter);
1379                 igb_free_all_rx_resources(adapter);
1380
1381                 igb_clear_interrupt_scheme(adapter);
1382                 err = igb_init_interrupt_scheme(adapter, false);
1383                 if (err)
1384                         goto request_done;
1385
1386                 igb_setup_all_tx_resources(adapter);
1387                 igb_setup_all_rx_resources(adapter);
1388                 igb_configure(adapter);
1389         }
1390
1391         igb_assign_vector(adapter->q_vector[0], 0);
1392
1393         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1394                 err = request_irq(pdev->irq, igb_intr_msi, 0,
1395                                   netdev->name, adapter);
1396                 if (!err)
1397                         goto request_done;
1398
1399                 /* fall back to legacy interrupts */
1400                 igb_reset_interrupt_capability(adapter);
1401                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1402         }
1403
1404         err = request_irq(pdev->irq, igb_intr, IRQF_SHARED,
1405                           netdev->name, adapter);
1406
1407         if (err)
1408                 dev_err(&pdev->dev, "Error %d getting interrupt\n",
1409                         err);
1410
1411 request_done:
1412         return err;
1413 }
1414
1415 static void igb_free_irq(struct igb_adapter *adapter)
1416 {
1417         if (adapter->msix_entries) {
1418                 int vector = 0, i;
1419
1420                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1421
1422                 for (i = 0; i < adapter->num_q_vectors; i++)
1423                         free_irq(adapter->msix_entries[vector++].vector,
1424                                  adapter->q_vector[i]);
1425         } else {
1426                 free_irq(adapter->pdev->irq, adapter);
1427         }
1428 }
1429
1430 /**
1431  *  igb_irq_disable - Mask off interrupt generation on the NIC
1432  *  @adapter: board private structure
1433  **/
1434 static void igb_irq_disable(struct igb_adapter *adapter)
1435 {
1436         struct e1000_hw *hw = &adapter->hw;
1437
1438         /* we need to be careful when disabling interrupts.  The VFs are also
1439          * mapped into these registers and so clearing the bits can cause
1440          * issues on the VF drivers so we only need to clear what we set
1441          */
1442         if (adapter->msix_entries) {
1443                 u32 regval = rd32(E1000_EIAM);
1444                 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
1445                 wr32(E1000_EIMC, adapter->eims_enable_mask);
1446                 regval = rd32(E1000_EIAC);
1447                 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask);
1448         }
1449
1450         wr32(E1000_IAM, 0);
1451         wr32(E1000_IMC, ~0);
1452         wrfl();
1453         if (adapter->msix_entries) {
1454                 int i;
1455                 for (i = 0; i < adapter->num_q_vectors; i++)
1456                         synchronize_irq(adapter->msix_entries[i].vector);
1457         } else {
1458                 synchronize_irq(adapter->pdev->irq);
1459         }
1460 }
1461
1462 /**
1463  *  igb_irq_enable - Enable default interrupt generation settings
1464  *  @adapter: board private structure
1465  **/
1466 static void igb_irq_enable(struct igb_adapter *adapter)
1467 {
1468         struct e1000_hw *hw = &adapter->hw;
1469
1470         if (adapter->msix_entries) {
1471                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1472                 u32 regval = rd32(E1000_EIAC);
1473                 wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
1474                 regval = rd32(E1000_EIAM);
1475                 wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
1476                 wr32(E1000_EIMS, adapter->eims_enable_mask);
1477                 if (adapter->vfs_allocated_count) {
1478                         wr32(E1000_MBVFIMR, 0xFF);
1479                         ims |= E1000_IMS_VMMB;
1480                 }
1481                 wr32(E1000_IMS, ims);
1482         } else {
1483                 wr32(E1000_IMS, IMS_ENABLE_MASK |
1484                                 E1000_IMS_DRSTA);
1485                 wr32(E1000_IAM, IMS_ENABLE_MASK |
1486                                 E1000_IMS_DRSTA);
1487         }
1488 }
1489
1490 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1491 {
1492         struct e1000_hw *hw = &adapter->hw;
1493         u16 vid = adapter->hw.mng_cookie.vlan_id;
1494         u16 old_vid = adapter->mng_vlan_id;
1495
1496         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1497                 /* add VID to filter table */
1498                 igb_vfta_set(hw, vid, true);
1499                 adapter->mng_vlan_id = vid;
1500         } else {
1501                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1502         }
1503
1504         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1505             (vid != old_vid) &&
1506             !test_bit(old_vid, adapter->active_vlans)) {
1507                 /* remove VID from filter table */
1508                 igb_vfta_set(hw, old_vid, false);
1509         }
1510 }
1511
1512 /**
1513  *  igb_release_hw_control - release control of the h/w to f/w
1514  *  @adapter: address of board private structure
1515  *
1516  *  igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1517  *  For ASF and Pass Through versions of f/w this means that the
1518  *  driver is no longer loaded.
1519  **/
1520 static void igb_release_hw_control(struct igb_adapter *adapter)
1521 {
1522         struct e1000_hw *hw = &adapter->hw;
1523         u32 ctrl_ext;
1524
1525         /* Let firmware take over control of h/w */
1526         ctrl_ext = rd32(E1000_CTRL_EXT);
1527         wr32(E1000_CTRL_EXT,
1528                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1529 }
1530
1531 /**
1532  *  igb_get_hw_control - get control of the h/w from f/w
1533  *  @adapter: address of board private structure
1534  *
1535  *  igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1536  *  For ASF and Pass Through versions of f/w this means that
1537  *  the driver is loaded.
1538  **/
1539 static void igb_get_hw_control(struct igb_adapter *adapter)
1540 {
1541         struct e1000_hw *hw = &adapter->hw;
1542         u32 ctrl_ext;
1543
1544         /* Let firmware know the driver has taken over */
1545         ctrl_ext = rd32(E1000_CTRL_EXT);
1546         wr32(E1000_CTRL_EXT,
1547                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1548 }
1549
1550 /**
1551  *  igb_configure - configure the hardware for RX and TX
1552  *  @adapter: private board structure
1553  **/
1554 static void igb_configure(struct igb_adapter *adapter)
1555 {
1556         struct net_device *netdev = adapter->netdev;
1557         int i;
1558
1559         igb_get_hw_control(adapter);
1560         igb_set_rx_mode(netdev);
1561
1562         igb_restore_vlan(adapter);
1563
1564         igb_setup_tctl(adapter);
1565         igb_setup_mrqc(adapter);
1566         igb_setup_rctl(adapter);
1567
1568         igb_configure_tx(adapter);
1569         igb_configure_rx(adapter);
1570
1571         igb_rx_fifo_flush_82575(&adapter->hw);
1572
1573         /* call igb_desc_unused which always leaves
1574          * at least 1 descriptor unused to make sure
1575          * next_to_use != next_to_clean
1576          */
1577         for (i = 0; i < adapter->num_rx_queues; i++) {
1578                 struct igb_ring *ring = adapter->rx_ring[i];
1579                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1580         }
1581 }
1582
1583 /**
1584  *  igb_power_up_link - Power up the phy/serdes link
1585  *  @adapter: address of board private structure
1586  **/
1587 void igb_power_up_link(struct igb_adapter *adapter)
1588 {
1589         igb_reset_phy(&adapter->hw);
1590
1591         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1592                 igb_power_up_phy_copper(&adapter->hw);
1593         else
1594                 igb_power_up_serdes_link_82575(&adapter->hw);
1595 }
1596
1597 /**
1598  *  igb_power_down_link - Power down the phy/serdes link
1599  *  @adapter: address of board private structure
1600  */
1601 static void igb_power_down_link(struct igb_adapter *adapter)
1602 {
1603         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1604                 igb_power_down_phy_copper_82575(&adapter->hw);
1605         else
1606                 igb_shutdown_serdes_link_82575(&adapter->hw);
1607 }
1608
1609 /**
1610  * Detect and switch function for Media Auto Sense
1611  * @adapter: address of the board private structure
1612  **/
1613 static void igb_check_swap_media(struct igb_adapter *adapter)
1614 {
1615         struct e1000_hw *hw = &adapter->hw;
1616         u32 ctrl_ext, connsw;
1617         bool swap_now = false;
1618
1619         ctrl_ext = rd32(E1000_CTRL_EXT);
1620         connsw = rd32(E1000_CONNSW);
1621
1622         /* need to live swap if current media is copper and we have fiber/serdes
1623          * to go to.
1624          */
1625
1626         if ((hw->phy.media_type == e1000_media_type_copper) &&
1627             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1628                 swap_now = true;
1629         } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1630                 /* copper signal takes time to appear */
1631                 if (adapter->copper_tries < 4) {
1632                         adapter->copper_tries++;
1633                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1634                         wr32(E1000_CONNSW, connsw);
1635                         return;
1636                 } else {
1637                         adapter->copper_tries = 0;
1638                         if ((connsw & E1000_CONNSW_PHYSD) &&
1639                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1640                                 swap_now = true;
1641                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1642                                 wr32(E1000_CONNSW, connsw);
1643                         }
1644                 }
1645         }
1646
1647         if (!swap_now)
1648                 return;
1649
1650         switch (hw->phy.media_type) {
1651         case e1000_media_type_copper:
1652                 netdev_info(adapter->netdev,
1653                         "MAS: changing media to fiber/serdes\n");
1654                 ctrl_ext |=
1655                         E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1656                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1657                 adapter->copper_tries = 0;
1658                 break;
1659         case e1000_media_type_internal_serdes:
1660         case e1000_media_type_fiber:
1661                 netdev_info(adapter->netdev,
1662                         "MAS: changing media to copper\n");
1663                 ctrl_ext &=
1664                         ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1665                 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1666                 break;
1667         default:
1668                 /* shouldn't get here during regular operation */
1669                 netdev_err(adapter->netdev,
1670                         "AMS: Invalid media type found, returning\n");
1671                 break;
1672         }
1673         wr32(E1000_CTRL_EXT, ctrl_ext);
1674 }
1675
1676 /**
1677  *  igb_up - Open the interface and prepare it to handle traffic
1678  *  @adapter: board private structure
1679  **/
1680 int igb_up(struct igb_adapter *adapter)
1681 {
1682         struct e1000_hw *hw = &adapter->hw;
1683         int i;
1684
1685         /* hardware has been reset, we need to reload some things */
1686         igb_configure(adapter);
1687
1688         clear_bit(__IGB_DOWN, &adapter->state);
1689
1690         for (i = 0; i < adapter->num_q_vectors; i++)
1691                 napi_enable(&(adapter->q_vector[i]->napi));
1692
1693         if (adapter->msix_entries)
1694                 igb_configure_msix(adapter);
1695         else
1696                 igb_assign_vector(adapter->q_vector[0], 0);
1697
1698         /* Clear any pending interrupts. */
1699         rd32(E1000_ICR);
1700         igb_irq_enable(adapter);
1701
1702         /* notify VFs that reset has been completed */
1703         if (adapter->vfs_allocated_count) {
1704                 u32 reg_data = rd32(E1000_CTRL_EXT);
1705                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1706                 wr32(E1000_CTRL_EXT, reg_data);
1707         }
1708
1709         netif_tx_start_all_queues(adapter->netdev);
1710
1711         /* start the watchdog. */
1712         hw->mac.get_link_status = 1;
1713         schedule_work(&adapter->watchdog_task);
1714
1715         return 0;
1716 }
1717
1718 void igb_down(struct igb_adapter *adapter)
1719 {
1720         struct net_device *netdev = adapter->netdev;
1721         struct e1000_hw *hw = &adapter->hw;
1722         u32 tctl, rctl;
1723         int i;
1724
1725         /* signal that we're down so the interrupt handler does not
1726          * reschedule our watchdog timer
1727          */
1728         set_bit(__IGB_DOWN, &adapter->state);
1729
1730         /* disable receives in the hardware */
1731         rctl = rd32(E1000_RCTL);
1732         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1733         /* flush and sleep below */
1734
1735         netif_tx_stop_all_queues(netdev);
1736
1737         /* disable transmits in the hardware */
1738         tctl = rd32(E1000_TCTL);
1739         tctl &= ~E1000_TCTL_EN;
1740         wr32(E1000_TCTL, tctl);
1741         /* flush both disables and wait for them to finish */
1742         wrfl();
1743         msleep(10);
1744
1745         igb_irq_disable(adapter);
1746
1747         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1748
1749         for (i = 0; i < adapter->num_q_vectors; i++) {
1750                 napi_synchronize(&(adapter->q_vector[i]->napi));
1751                 napi_disable(&(adapter->q_vector[i]->napi));
1752         }
1753
1754
1755         del_timer_sync(&adapter->watchdog_timer);
1756         del_timer_sync(&adapter->phy_info_timer);
1757
1758         netif_carrier_off(netdev);
1759
1760         /* record the stats before reset*/
1761         spin_lock(&adapter->stats64_lock);
1762         igb_update_stats(adapter, &adapter->stats64);
1763         spin_unlock(&adapter->stats64_lock);
1764
1765         adapter->link_speed = 0;
1766         adapter->link_duplex = 0;
1767
1768         if (!pci_channel_offline(adapter->pdev))
1769                 igb_reset(adapter);
1770         igb_clean_all_tx_rings(adapter);
1771         igb_clean_all_rx_rings(adapter);
1772 #ifdef CONFIG_IGB_DCA
1773
1774         /* since we reset the hardware DCA settings were cleared */
1775         igb_setup_dca(adapter);
1776 #endif
1777 }
1778
1779 void igb_reinit_locked(struct igb_adapter *adapter)
1780 {
1781         WARN_ON(in_interrupt());
1782         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1783                 msleep(1);
1784         igb_down(adapter);
1785         igb_up(adapter);
1786         clear_bit(__IGB_RESETTING, &adapter->state);
1787 }
1788
1789 /** igb_enable_mas - Media Autosense re-enable after swap
1790  *
1791  * @adapter: adapter struct
1792  **/
1793 static s32 igb_enable_mas(struct igb_adapter *adapter)
1794 {
1795         struct e1000_hw *hw = &adapter->hw;
1796         u32 connsw;
1797         s32 ret_val = 0;
1798
1799         connsw = rd32(E1000_CONNSW);
1800         if (!(hw->phy.media_type == e1000_media_type_copper))
1801                 return ret_val;
1802
1803         /* configure for SerDes media detect */
1804         if (!(connsw & E1000_CONNSW_SERDESD)) {
1805                 connsw |= E1000_CONNSW_ENRGSRC;
1806                 connsw |= E1000_CONNSW_AUTOSENSE_EN;
1807                 wr32(E1000_CONNSW, connsw);
1808                 wrfl();
1809         } else if (connsw & E1000_CONNSW_SERDESD) {
1810                 /* already SerDes, no need to enable anything */
1811                 return ret_val;
1812         } else {
1813                 netdev_info(adapter->netdev,
1814                         "MAS: Unable to configure feature, disabling..\n");
1815                 adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1816         }
1817         return ret_val;
1818 }
1819
1820 void igb_reset(struct igb_adapter *adapter)
1821 {
1822         struct pci_dev *pdev = adapter->pdev;
1823         struct e1000_hw *hw = &adapter->hw;
1824         struct e1000_mac_info *mac = &hw->mac;
1825         struct e1000_fc_info *fc = &hw->fc;
1826         u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1827
1828         /* Repartition Pba for greater than 9k mtu
1829          * To take effect CTRL.RST is required.
1830          */
1831         switch (mac->type) {
1832         case e1000_i350:
1833         case e1000_i354:
1834         case e1000_82580:
1835                 pba = rd32(E1000_RXPBS);
1836                 pba = igb_rxpbs_adjust_82580(pba);
1837                 break;
1838         case e1000_82576:
1839                 pba = rd32(E1000_RXPBS);
1840                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1841                 break;
1842         case e1000_82575:
1843         case e1000_i210:
1844         case e1000_i211:
1845         default:
1846                 pba = E1000_PBA_34K;
1847                 break;
1848         }
1849
1850         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1851             (mac->type < e1000_82576)) {
1852                 /* adjust PBA for jumbo frames */
1853                 wr32(E1000_PBA, pba);
1854
1855                 /* To maintain wire speed transmits, the Tx FIFO should be
1856                  * large enough to accommodate two full transmit packets,
1857                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1858                  * the Rx FIFO should be large enough to accommodate at least
1859                  * one full receive packet and is similarly rounded up and
1860                  * expressed in KB.
1861                  */
1862                 pba = rd32(E1000_PBA);
1863                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1864                 tx_space = pba >> 16;
1865                 /* lower 16 bits has Rx packet buffer allocation size in KB */
1866                 pba &= 0xffff;
1867                 /* the Tx fifo also stores 16 bytes of information about the Tx
1868                  * but don't include ethernet FCS because hardware appends it
1869                  */
1870                 min_tx_space = (adapter->max_frame_size +
1871                                 sizeof(union e1000_adv_tx_desc) -
1872                                 ETH_FCS_LEN) * 2;
1873                 min_tx_space = ALIGN(min_tx_space, 1024);
1874                 min_tx_space >>= 10;
1875                 /* software strips receive CRC, so leave room for it */
1876                 min_rx_space = adapter->max_frame_size;
1877                 min_rx_space = ALIGN(min_rx_space, 1024);
1878                 min_rx_space >>= 10;
1879
1880                 /* If current Tx allocation is less than the min Tx FIFO size,
1881                  * and the min Tx FIFO size is less than the current Rx FIFO
1882                  * allocation, take space away from current Rx allocation
1883                  */
1884                 if (tx_space < min_tx_space &&
1885                     ((min_tx_space - tx_space) < pba)) {
1886                         pba = pba - (min_tx_space - tx_space);
1887
1888                         /* if short on Rx space, Rx wins and must trump Tx
1889                          * adjustment
1890                          */
1891                         if (pba < min_rx_space)
1892                                 pba = min_rx_space;
1893                 }
1894                 wr32(E1000_PBA, pba);
1895         }
1896
1897         /* flow control settings */
1898         /* The high water mark must be low enough to fit one full frame
1899          * (or the size used for early receive) above it in the Rx FIFO.
1900          * Set it to the lower of:
1901          * - 90% of the Rx FIFO size, or
1902          * - the full Rx FIFO size minus one full frame
1903          */
1904         hwm = min(((pba << 10) * 9 / 10),
1905                         ((pba << 10) - 2 * adapter->max_frame_size));
1906
1907         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1908         fc->low_water = fc->high_water - 16;
1909         fc->pause_time = 0xFFFF;
1910         fc->send_xon = 1;
1911         fc->current_mode = fc->requested_mode;
1912
1913         /* disable receive for all VFs and wait one second */
1914         if (adapter->vfs_allocated_count) {
1915                 int i;
1916                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1917                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1918
1919                 /* ping all the active vfs to let them know we are going down */
1920                 igb_ping_all_vfs(adapter);
1921
1922                 /* disable transmits and receives */
1923                 wr32(E1000_VFRE, 0);
1924                 wr32(E1000_VFTE, 0);
1925         }
1926
1927         /* Allow time for pending master requests to run */
1928         hw->mac.ops.reset_hw(hw);
1929         wr32(E1000_WUC, 0);
1930
1931         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1932                 /* need to resetup here after media swap */
1933                 adapter->ei.get_invariants(hw);
1934                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
1935         }
1936         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
1937                 if (igb_enable_mas(adapter))
1938                         dev_err(&pdev->dev,
1939                                 "Error enabling Media Auto Sense\n");
1940         }
1941         if (hw->mac.ops.init_hw(hw))
1942                 dev_err(&pdev->dev, "Hardware Error\n");
1943
1944         /* Flow control settings reset on hardware reset, so guarantee flow
1945          * control is off when forcing speed.
1946          */
1947         if (!hw->mac.autoneg)
1948                 igb_force_mac_fc(hw);
1949
1950         igb_init_dmac(adapter, pba);
1951 #ifdef CONFIG_IGB_HWMON
1952         /* Re-initialize the thermal sensor on i350 devices. */
1953         if (!test_bit(__IGB_DOWN, &adapter->state)) {
1954                 if (mac->type == e1000_i350 && hw->bus.func == 0) {
1955                         /* If present, re-initialize the external thermal sensor
1956                          * interface.
1957                          */
1958                         if (adapter->ets)
1959                                 mac->ops.init_thermal_sensor_thresh(hw);
1960                 }
1961         }
1962 #endif
1963         if (!netif_running(adapter->netdev))
1964                 igb_power_down_link(adapter);
1965
1966         igb_update_mng_vlan(adapter);
1967
1968         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1969         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
1970
1971         /* Re-enable PTP, where applicable. */
1972         igb_ptp_reset(adapter);
1973
1974         igb_get_phy_info(hw);
1975 }
1976
1977 static netdev_features_t igb_fix_features(struct net_device *netdev,
1978         netdev_features_t features)
1979 {
1980         /* Since there is no support for separate Rx/Tx vlan accel
1981          * enable/disable make sure Tx flag is always in same state as Rx.
1982          */
1983         if (features & NETIF_F_HW_VLAN_CTAG_RX)
1984                 features |= NETIF_F_HW_VLAN_CTAG_TX;
1985         else
1986                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
1987
1988         return features;
1989 }
1990
1991 static int igb_set_features(struct net_device *netdev,
1992         netdev_features_t features)
1993 {
1994         netdev_features_t changed = netdev->features ^ features;
1995         struct igb_adapter *adapter = netdev_priv(netdev);
1996
1997         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
1998                 igb_vlan_mode(netdev, features);
1999
2000         if (!(changed & NETIF_F_RXALL))
2001                 return 0;
2002
2003         netdev->features = features;
2004
2005         if (netif_running(netdev))
2006                 igb_reinit_locked(adapter);
2007         else
2008                 igb_reset(adapter);
2009
2010         return 0;
2011 }
2012
2013 static const struct net_device_ops igb_netdev_ops = {
2014         .ndo_open               = igb_open,
2015         .ndo_stop               = igb_close,
2016         .ndo_start_xmit         = igb_xmit_frame,
2017         .ndo_get_stats64        = igb_get_stats64,
2018         .ndo_set_rx_mode        = igb_set_rx_mode,
2019         .ndo_set_mac_address    = igb_set_mac,
2020         .ndo_change_mtu         = igb_change_mtu,
2021         .ndo_do_ioctl           = igb_ioctl,
2022         .ndo_tx_timeout         = igb_tx_timeout,
2023         .ndo_validate_addr      = eth_validate_addr,
2024         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2025         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2026         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2027         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2028         .ndo_set_vf_tx_rate     = igb_ndo_set_vf_bw,
2029         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2030         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2031 #ifdef CONFIG_NET_POLL_CONTROLLER
2032         .ndo_poll_controller    = igb_netpoll,
2033 #endif
2034         .ndo_fix_features       = igb_fix_features,
2035         .ndo_set_features       = igb_set_features,
2036 };
2037
2038 /**
2039  * igb_set_fw_version - Configure version string for ethtool
2040  * @adapter: adapter struct
2041  **/
2042 void igb_set_fw_version(struct igb_adapter *adapter)
2043 {
2044         struct e1000_hw *hw = &adapter->hw;
2045         struct e1000_fw_version fw;
2046
2047         igb_get_fw_version(hw, &fw);
2048
2049         switch (hw->mac.type) {
2050         case e1000_i210:
2051         case e1000_i211:
2052                 if (!(igb_get_flash_presence_i210(hw))) {
2053                         snprintf(adapter->fw_version,
2054                                  sizeof(adapter->fw_version),
2055                                  "%2d.%2d-%d",
2056                                  fw.invm_major, fw.invm_minor,
2057                                  fw.invm_img_type);
2058                         break;
2059                 }
2060                 /* fall through */
2061         default:
2062                 /* if option is rom valid, display its version too */
2063                 if (fw.or_valid) {
2064                         snprintf(adapter->fw_version,
2065                                  sizeof(adapter->fw_version),
2066                                  "%d.%d, 0x%08x, %d.%d.%d",
2067                                  fw.eep_major, fw.eep_minor, fw.etrack_id,
2068                                  fw.or_major, fw.or_build, fw.or_patch);
2069                 /* no option rom */
2070                 } else if (fw.etrack_id != 0X0000) {
2071                         snprintf(adapter->fw_version,
2072                             sizeof(adapter->fw_version),
2073                             "%d.%d, 0x%08x",
2074                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2075                 } else {
2076                 snprintf(adapter->fw_version,
2077                     sizeof(adapter->fw_version),
2078                     "%d.%d.%d",
2079                     fw.eep_major, fw.eep_minor, fw.eep_build);
2080                 }
2081                 break;
2082         }
2083         return;
2084 }
2085
2086 /**
2087  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2088  *
2089  * @adapter: adapter struct
2090  **/
2091 static void igb_init_mas(struct igb_adapter *adapter)
2092 {
2093         struct e1000_hw *hw = &adapter->hw;
2094         u16 eeprom_data;
2095
2096         hw->nvm.ops.read(hw, NVM_COMPAT, 1, &eeprom_data);
2097         switch (hw->bus.func) {
2098         case E1000_FUNC_0:
2099                 if (eeprom_data & IGB_MAS_ENABLE_0) {
2100                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2101                         netdev_info(adapter->netdev,
2102                                 "MAS: Enabling Media Autosense for port %d\n",
2103                                 hw->bus.func);
2104                 }
2105                 break;
2106         case E1000_FUNC_1:
2107                 if (eeprom_data & IGB_MAS_ENABLE_1) {
2108                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2109                         netdev_info(adapter->netdev,
2110                                 "MAS: Enabling Media Autosense for port %d\n",
2111                                 hw->bus.func);
2112                 }
2113                 break;
2114         case E1000_FUNC_2:
2115                 if (eeprom_data & IGB_MAS_ENABLE_2) {
2116                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2117                         netdev_info(adapter->netdev,
2118                                 "MAS: Enabling Media Autosense for port %d\n",
2119                                 hw->bus.func);
2120                 }
2121                 break;
2122         case E1000_FUNC_3:
2123                 if (eeprom_data & IGB_MAS_ENABLE_3) {
2124                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2125                         netdev_info(adapter->netdev,
2126                                 "MAS: Enabling Media Autosense for port %d\n",
2127                                 hw->bus.func);
2128                 }
2129                 break;
2130         default:
2131                 /* Shouldn't get here */
2132                 netdev_err(adapter->netdev,
2133                         "MAS: Invalid port configuration, returning\n");
2134                 break;
2135         }
2136 }
2137
2138 /**
2139  *  igb_init_i2c - Init I2C interface
2140  *  @adapter: pointer to adapter structure
2141  **/
2142 static s32 igb_init_i2c(struct igb_adapter *adapter)
2143 {
2144         s32 status = E1000_SUCCESS;
2145
2146         /* I2C interface supported on i350 devices */
2147         if (adapter->hw.mac.type != e1000_i350)
2148                 return E1000_SUCCESS;
2149
2150         /* Initialize the i2c bus which is controlled by the registers.
2151          * This bus will use the i2c_algo_bit structue that implements
2152          * the protocol through toggling of the 4 bits in the register.
2153          */
2154         adapter->i2c_adap.owner = THIS_MODULE;
2155         adapter->i2c_algo = igb_i2c_algo;
2156         adapter->i2c_algo.data = adapter;
2157         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
2158         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
2159         strlcpy(adapter->i2c_adap.name, "igb BB",
2160                 sizeof(adapter->i2c_adap.name));
2161         status = i2c_bit_add_bus(&adapter->i2c_adap);
2162         return status;
2163 }
2164
2165 /**
2166  *  igb_probe - Device Initialization Routine
2167  *  @pdev: PCI device information struct
2168  *  @ent: entry in igb_pci_tbl
2169  *
2170  *  Returns 0 on success, negative on failure
2171  *
2172  *  igb_probe initializes an adapter identified by a pci_dev structure.
2173  *  The OS initialization, configuring of the adapter private structure,
2174  *  and a hardware reset occur.
2175  **/
2176 static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2177 {
2178         struct net_device *netdev;
2179         struct igb_adapter *adapter;
2180         struct e1000_hw *hw;
2181         u16 eeprom_data = 0;
2182         s32 ret_val;
2183         static int global_quad_port_a; /* global quad port a indication */
2184         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
2185         int err, pci_using_dac;
2186         u8 part_str[E1000_PBANUM_LENGTH];
2187
2188         /* Catch broken hardware that put the wrong VF device ID in
2189          * the PCIe SR-IOV capability.
2190          */
2191         if (pdev->is_virtfn) {
2192                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
2193                         pci_name(pdev), pdev->vendor, pdev->device);
2194                 return -EINVAL;
2195         }
2196
2197         err = pci_enable_device_mem(pdev);
2198         if (err)
2199                 return err;
2200
2201         pci_using_dac = 0;
2202         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
2203         if (!err) {
2204                 pci_using_dac = 1;
2205         } else {
2206                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
2207                 if (err) {
2208                         dev_err(&pdev->dev,
2209                                 "No usable DMA configuration, aborting\n");
2210                         goto err_dma;
2211                 }
2212         }
2213
2214         err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
2215                                            IORESOURCE_MEM),
2216                                            igb_driver_name);
2217         if (err)
2218                 goto err_pci_reg;
2219
2220         pci_enable_pcie_error_reporting(pdev);
2221
2222         pci_set_master(pdev);
2223         pci_save_state(pdev);
2224
2225         err = -ENOMEM;
2226         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2227                                    IGB_MAX_TX_QUEUES);
2228         if (!netdev)
2229                 goto err_alloc_etherdev;
2230
2231         SET_NETDEV_DEV(netdev, &pdev->dev);
2232
2233         pci_set_drvdata(pdev, netdev);
2234         adapter = netdev_priv(netdev);
2235         adapter->netdev = netdev;
2236         adapter->pdev = pdev;
2237         hw = &adapter->hw;
2238         hw->back = adapter;
2239         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2240
2241         err = -EIO;
2242         hw->hw_addr = pci_iomap(pdev, 0, 0);
2243         if (!hw->hw_addr)
2244                 goto err_ioremap;
2245
2246         netdev->netdev_ops = &igb_netdev_ops;
2247         igb_set_ethtool_ops(netdev);
2248         netdev->watchdog_timeo = 5 * HZ;
2249
2250         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2251
2252         netdev->mem_start = pci_resource_start(pdev, 0);
2253         netdev->mem_end = pci_resource_end(pdev, 0);
2254
2255         /* PCI config space info */
2256         hw->vendor_id = pdev->vendor;
2257         hw->device_id = pdev->device;
2258         hw->revision_id = pdev->revision;
2259         hw->subsystem_vendor_id = pdev->subsystem_vendor;
2260         hw->subsystem_device_id = pdev->subsystem_device;
2261
2262         /* Copy the default MAC, PHY and NVM function pointers */
2263         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
2264         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
2265         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
2266         /* Initialize skew-specific constants */
2267         err = ei->get_invariants(hw);
2268         if (err)
2269                 goto err_sw_init;
2270
2271         /* setup the private structure */
2272         err = igb_sw_init(adapter);
2273         if (err)
2274                 goto err_sw_init;
2275
2276         igb_get_bus_info_pcie(hw);
2277
2278         hw->phy.autoneg_wait_to_complete = false;
2279
2280         /* Copper options */
2281         if (hw->phy.media_type == e1000_media_type_copper) {
2282                 hw->phy.mdix = AUTO_ALL_MODES;
2283                 hw->phy.disable_polarity_correction = false;
2284                 hw->phy.ms_type = e1000_ms_hw_default;
2285         }
2286
2287         if (igb_check_reset_block(hw))
2288                 dev_info(&pdev->dev,
2289                         "PHY reset is blocked due to SOL/IDER session.\n");
2290
2291         /* features is initialized to 0 in allocation, it might have bits
2292          * set by igb_sw_init so we should use an or instead of an
2293          * assignment.
2294          */
2295         netdev->features |= NETIF_F_SG |
2296                             NETIF_F_IP_CSUM |
2297                             NETIF_F_IPV6_CSUM |
2298                             NETIF_F_TSO |
2299                             NETIF_F_TSO6 |
2300                             NETIF_F_RXHASH |
2301                             NETIF_F_RXCSUM |
2302                             NETIF_F_HW_VLAN_CTAG_RX |
2303                             NETIF_F_HW_VLAN_CTAG_TX;
2304
2305         /* copy netdev features into list of user selectable features */
2306         netdev->hw_features |= netdev->features;
2307         netdev->hw_features |= NETIF_F_RXALL;
2308
2309         /* set this bit last since it cannot be part of hw_features */
2310         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2311
2312         netdev->vlan_features |= NETIF_F_TSO |
2313                                  NETIF_F_TSO6 |
2314                                  NETIF_F_IP_CSUM |
2315                                  NETIF_F_IPV6_CSUM |
2316                                  NETIF_F_SG;
2317
2318         netdev->priv_flags |= IFF_SUPP_NOFCS;
2319
2320         if (pci_using_dac) {
2321                 netdev->features |= NETIF_F_HIGHDMA;
2322                 netdev->vlan_features |= NETIF_F_HIGHDMA;
2323         }
2324
2325         if (hw->mac.type >= e1000_82576) {
2326                 netdev->hw_features |= NETIF_F_SCTP_CSUM;
2327                 netdev->features |= NETIF_F_SCTP_CSUM;
2328         }
2329
2330         netdev->priv_flags |= IFF_UNICAST_FLT;
2331
2332         adapter->en_mng_pt = igb_enable_mng_pass_thru(hw);
2333
2334         /* before reading the NVM, reset the controller to put the device in a
2335          * known good starting state
2336          */
2337         hw->mac.ops.reset_hw(hw);
2338
2339         /* make sure the NVM is good , i211/i210 parts can have special NVM
2340          * that doesn't contain a checksum
2341          */
2342         switch (hw->mac.type) {
2343         case e1000_i210:
2344         case e1000_i211:
2345                 if (igb_get_flash_presence_i210(hw)) {
2346                         if (hw->nvm.ops.validate(hw) < 0) {
2347                                 dev_err(&pdev->dev,
2348                                         "The NVM Checksum Is Not Valid\n");
2349                                 err = -EIO;
2350                                 goto err_eeprom;
2351                         }
2352                 }
2353                 break;
2354         default:
2355                 if (hw->nvm.ops.validate(hw) < 0) {
2356                         dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
2357                         err = -EIO;
2358                         goto err_eeprom;
2359                 }
2360                 break;
2361         }
2362
2363         /* copy the MAC address out of the NVM */
2364         if (hw->mac.ops.read_mac_addr(hw))
2365                 dev_err(&pdev->dev, "NVM Read Error\n");
2366
2367         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2368
2369         if (!is_valid_ether_addr(netdev->dev_addr)) {
2370                 dev_err(&pdev->dev, "Invalid MAC Address\n");
2371                 err = -EIO;
2372                 goto err_eeprom;
2373         }
2374
2375         /* get firmware version for ethtool -i */
2376         igb_set_fw_version(adapter);
2377
2378         setup_timer(&adapter->watchdog_timer, igb_watchdog,
2379                     (unsigned long) adapter);
2380         setup_timer(&adapter->phy_info_timer, igb_update_phy_info,
2381                     (unsigned long) adapter);
2382
2383         INIT_WORK(&adapter->reset_task, igb_reset_task);
2384         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2385
2386         /* Initialize link properties that are user-changeable */
2387         adapter->fc_autoneg = true;
2388         hw->mac.autoneg = true;
2389         hw->phy.autoneg_advertised = 0x2f;
2390
2391         hw->fc.requested_mode = e1000_fc_default;
2392         hw->fc.current_mode = e1000_fc_default;
2393
2394         igb_validate_mdi_setting(hw);
2395
2396         /* By default, support wake on port A */
2397         if (hw->bus.func == 0)
2398                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2399
2400         /* Check the NVM for wake support on non-port A ports */
2401         if (hw->mac.type >= e1000_82580)
2402                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2403                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2404                                  &eeprom_data);
2405         else if (hw->bus.func == 1)
2406                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2407
2408         if (eeprom_data & IGB_EEPROM_APME)
2409                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2410
2411         /* now that we have the eeprom settings, apply the special cases where
2412          * the eeprom may be wrong or the board simply won't support wake on
2413          * lan on a particular port
2414          */
2415         switch (pdev->device) {
2416         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2417                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2418                 break;
2419         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2420         case E1000_DEV_ID_82576_FIBER:
2421         case E1000_DEV_ID_82576_SERDES:
2422                 /* Wake events only supported on port A for dual fiber
2423                  * regardless of eeprom setting
2424                  */
2425                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
2426                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2427                 break;
2428         case E1000_DEV_ID_82576_QUAD_COPPER:
2429         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2430                 /* if quad port adapter, disable WoL on all but port A */
2431                 if (global_quad_port_a != 0)
2432                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2433                 else
2434                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2435                 /* Reset for multiple quad port adapters */
2436                 if (++global_quad_port_a == 4)
2437                         global_quad_port_a = 0;
2438                 break;
2439         default:
2440                 /* If the device can't wake, don't set software support */
2441                 if (!device_can_wakeup(&adapter->pdev->dev))
2442                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2443         }
2444
2445         /* initialize the wol settings based on the eeprom settings */
2446         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2447                 adapter->wol |= E1000_WUFC_MAG;
2448
2449         /* Some vendors want WoL disabled by default, but still supported */
2450         if ((hw->mac.type == e1000_i350) &&
2451             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2452                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2453                 adapter->wol = 0;
2454         }
2455
2456         device_set_wakeup_enable(&adapter->pdev->dev,
2457                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2458
2459         /* reset the hardware with the new settings */
2460         igb_reset(adapter);
2461
2462         /* Init the I2C interface */
2463         err = igb_init_i2c(adapter);
2464         if (err) {
2465                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2466                 goto err_eeprom;
2467         }
2468
2469         /* let the f/w know that the h/w is now under the control of the
2470          * driver. */
2471         igb_get_hw_control(adapter);
2472
2473         strcpy(netdev->name, "eth%d");
2474         err = register_netdev(netdev);
2475         if (err)
2476                 goto err_register;
2477
2478         /* carrier off reporting is important to ethtool even BEFORE open */
2479         netif_carrier_off(netdev);
2480
2481 #ifdef CONFIG_IGB_DCA
2482         if (dca_add_requester(&pdev->dev) == 0) {
2483                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2484                 dev_info(&pdev->dev, "DCA enabled\n");
2485                 igb_setup_dca(adapter);
2486         }
2487
2488 #endif
2489 #ifdef CONFIG_IGB_HWMON
2490         /* Initialize the thermal sensor on i350 devices. */
2491         if (hw->mac.type == e1000_i350 && hw->bus.func == 0) {
2492                 u16 ets_word;
2493
2494                 /* Read the NVM to determine if this i350 device supports an
2495                  * external thermal sensor.
2496                  */
2497                 hw->nvm.ops.read(hw, NVM_ETS_CFG, 1, &ets_word);
2498                 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2499                         adapter->ets = true;
2500                 else
2501                         adapter->ets = false;
2502                 if (igb_sysfs_init(adapter))
2503                         dev_err(&pdev->dev,
2504                                 "failed to allocate sysfs resources\n");
2505         } else {
2506                 adapter->ets = false;
2507         }
2508 #endif
2509         /* Check if Media Autosense is enabled */
2510         adapter->ei = *ei;
2511         if (hw->dev_spec._82575.mas_capable)
2512                 igb_init_mas(adapter);
2513
2514         /* do hw tstamp init after resetting */
2515         igb_ptp_init(adapter);
2516
2517         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
2518         /* print bus type/speed/width info, not applicable to i354 */
2519         if (hw->mac.type != e1000_i354) {
2520                 dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
2521                          netdev->name,
2522                          ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
2523                           (hw->bus.speed == e1000_bus_speed_5000) ? "5.0Gb/s" :
2524                            "unknown"),
2525                          ((hw->bus.width == e1000_bus_width_pcie_x4) ?
2526                           "Width x4" :
2527                           (hw->bus.width == e1000_bus_width_pcie_x2) ?
2528                           "Width x2" :
2529                           (hw->bus.width == e1000_bus_width_pcie_x1) ?
2530                           "Width x1" : "unknown"), netdev->dev_addr);
2531         }
2532
2533         if ((hw->mac.type >= e1000_i210 ||
2534              igb_get_flash_presence_i210(hw))) {
2535                 ret_val = igb_read_part_string(hw, part_str,
2536                                                E1000_PBANUM_LENGTH);
2537         } else {
2538                 ret_val = -E1000_ERR_INVM_VALUE_NOT_FOUND;
2539         }
2540
2541         if (ret_val)
2542                 strcpy(part_str, "Unknown");
2543         dev_info(&pdev->dev, "%s: PBA No: %s\n", netdev->name, part_str);
2544         dev_info(&pdev->dev,
2545                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2546                 adapter->msix_entries ? "MSI-X" :
2547                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
2548                 adapter->num_rx_queues, adapter->num_tx_queues);
2549         switch (hw->mac.type) {
2550         case e1000_i350:
2551         case e1000_i210:
2552         case e1000_i211:
2553                 igb_set_eee_i350(hw);
2554                 break;
2555         case e1000_i354:
2556                 if (hw->phy.media_type == e1000_media_type_copper) {
2557                         if ((rd32(E1000_CTRL_EXT) &
2558                             E1000_CTRL_EXT_LINK_MODE_SGMII))
2559                                 igb_set_eee_i354(hw);
2560                 }
2561                 break;
2562         default:
2563                 break;
2564         }
2565
2566         pm_runtime_put_noidle(&pdev->dev);
2567         return 0;
2568
2569 err_register:
2570         igb_release_hw_control(adapter);
2571         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
2572 err_eeprom:
2573         if (!igb_check_reset_block(hw))
2574                 igb_reset_phy(hw);
2575
2576         if (hw->flash_address)
2577                 iounmap(hw->flash_address);
2578 err_sw_init:
2579         igb_clear_interrupt_scheme(adapter);
2580         iounmap(hw->hw_addr);
2581 err_ioremap:
2582         free_netdev(netdev);
2583 err_alloc_etherdev:
2584         pci_release_selected_regions(pdev,
2585                                      pci_select_bars(pdev, IORESOURCE_MEM));
2586 err_pci_reg:
2587 err_dma:
2588         pci_disable_device(pdev);
2589         return err;
2590 }
2591
2592 #ifdef CONFIG_PCI_IOV
2593 static int igb_disable_sriov(struct pci_dev *pdev)
2594 {
2595         struct net_device *netdev = pci_get_drvdata(pdev);
2596         struct igb_adapter *adapter = netdev_priv(netdev);
2597         struct e1000_hw *hw = &adapter->hw;
2598
2599         /* reclaim resources allocated to VFs */
2600         if (adapter->vf_data) {
2601                 /* disable iov and allow time for transactions to clear */
2602                 if (pci_vfs_assigned(pdev)) {
2603                         dev_warn(&pdev->dev,
2604                                  "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2605                         return -EPERM;
2606                 } else {
2607                         pci_disable_sriov(pdev);
2608                         msleep(500);
2609                 }
2610
2611                 kfree(adapter->vf_data);
2612                 adapter->vf_data = NULL;
2613                 adapter->vfs_allocated_count = 0;
2614                 wr32(E1000_IOVCTL, E1000_IOVCTL_REUSE_VFQ);
2615                 wrfl();
2616                 msleep(100);
2617                 dev_info(&pdev->dev, "IOV Disabled\n");
2618
2619                 /* Re-enable DMA Coalescing flag since IOV is turned off */
2620                 adapter->flags |= IGB_FLAG_DMAC;
2621         }
2622
2623         return 0;
2624 }
2625
2626 static int igb_enable_sriov(struct pci_dev *pdev, int num_vfs)
2627 {
2628         struct net_device *netdev = pci_get_drvdata(pdev);
2629         struct igb_adapter *adapter = netdev_priv(netdev);
2630         int old_vfs = pci_num_vf(pdev);
2631         int err = 0;
2632         int i;
2633
2634         if (!adapter->msix_entries || num_vfs > 7) {
2635                 err = -EPERM;
2636                 goto out;
2637         }
2638         if (!num_vfs)
2639                 goto out;
2640
2641         if (old_vfs) {
2642                 dev_info(&pdev->dev, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
2643                          old_vfs, max_vfs);
2644                 adapter->vfs_allocated_count = old_vfs;
2645         } else
2646                 adapter->vfs_allocated_count = num_vfs;
2647
2648         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
2649                                 sizeof(struct vf_data_storage), GFP_KERNEL);
2650
2651         /* if allocation failed then we do not support SR-IOV */
2652         if (!adapter->vf_data) {
2653                 adapter->vfs_allocated_count = 0;
2654                 dev_err(&pdev->dev,
2655                         "Unable to allocate memory for VF Data Storage\n");
2656                 err = -ENOMEM;
2657                 goto out;
2658         }
2659
2660         /* only call pci_enable_sriov() if no VFs are allocated already */
2661         if (!old_vfs) {
2662                 err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
2663                 if (err)
2664                         goto err_out;
2665         }
2666         dev_info(&pdev->dev, "%d VFs allocated\n",
2667                  adapter->vfs_allocated_count);
2668         for (i = 0; i < adapter->vfs_allocated_count; i++)
2669                 igb_vf_configure(adapter, i);
2670
2671         /* DMA Coalescing is not supported in IOV mode. */
2672         adapter->flags &= ~IGB_FLAG_DMAC;
2673         goto out;
2674
2675 err_out:
2676         kfree(adapter->vf_data);
2677         adapter->vf_data = NULL;
2678         adapter->vfs_allocated_count = 0;
2679 out:
2680         return err;
2681 }
2682
2683 #endif
2684 /**
2685  *  igb_remove_i2c - Cleanup  I2C interface
2686  *  @adapter: pointer to adapter structure
2687  **/
2688 static void igb_remove_i2c(struct igb_adapter *adapter)
2689 {
2690         /* free the adapter bus structure */
2691         i2c_del_adapter(&adapter->i2c_adap);
2692 }
2693
2694 /**
2695  *  igb_remove - Device Removal Routine
2696  *  @pdev: PCI device information struct
2697  *
2698  *  igb_remove is called by the PCI subsystem to alert the driver
2699  *  that it should release a PCI device.  The could be caused by a
2700  *  Hot-Plug event, or because the driver is going to be removed from
2701  *  memory.
2702  **/
2703 static void igb_remove(struct pci_dev *pdev)
2704 {
2705         struct net_device *netdev = pci_get_drvdata(pdev);
2706         struct igb_adapter *adapter = netdev_priv(netdev);
2707         struct e1000_hw *hw = &adapter->hw;
2708
2709         pm_runtime_get_noresume(&pdev->dev);
2710 #ifdef CONFIG_IGB_HWMON
2711         igb_sysfs_exit(adapter);
2712 #endif
2713         igb_remove_i2c(adapter);
2714         igb_ptp_stop(adapter);
2715         /* The watchdog timer may be rescheduled, so explicitly
2716          * disable watchdog from being rescheduled.
2717          */
2718         set_bit(__IGB_DOWN, &adapter->state);
2719         del_timer_sync(&adapter->watchdog_timer);
2720         del_timer_sync(&adapter->phy_info_timer);
2721
2722         cancel_work_sync(&adapter->reset_task);
2723         cancel_work_sync(&adapter->watchdog_task);
2724
2725 #ifdef CONFIG_IGB_DCA
2726         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
2727                 dev_info(&pdev->dev, "DCA disabled\n");
2728                 dca_remove_requester(&pdev->dev);
2729                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
2730                 wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
2731         }
2732 #endif
2733
2734         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
2735          * would have already happened in close and is redundant.
2736          */
2737         igb_release_hw_control(adapter);
2738
2739         unregister_netdev(netdev);
2740
2741         igb_clear_interrupt_scheme(adapter);
2742
2743 #ifdef CONFIG_PCI_IOV
2744         igb_disable_sriov(pdev);
2745 #endif
2746
2747         iounmap(hw->hw_addr);
2748         if (hw->flash_address)
2749                 iounmap(hw->flash_address);
2750         pci_release_selected_regions(pdev,
2751                                      pci_select_bars(pdev, IORESOURCE_MEM));
2752
2753         kfree(adapter->shadow_vfta);
2754         free_netdev(netdev);
2755
2756         pci_disable_pcie_error_reporting(pdev);
2757
2758         pci_disable_device(pdev);
2759 }
2760
2761 /**
2762  *  igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2763  *  @adapter: board private structure to initialize
2764  *
2765  *  This function initializes the vf specific data storage and then attempts to
2766  *  allocate the VFs.  The reason for ordering it this way is because it is much
2767  *  mor expensive time wise to disable SR-IOV than it is to allocate and free
2768  *  the memory for the VFs.
2769  **/
2770 static void igb_probe_vfs(struct igb_adapter *adapter)
2771 {
2772 #ifdef CONFIG_PCI_IOV
2773         struct pci_dev *pdev = adapter->pdev;
2774         struct e1000_hw *hw = &adapter->hw;
2775
2776         /* Virtualization features not supported on i210 family. */
2777         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211))
2778                 return;
2779
2780         pci_sriov_set_totalvfs(pdev, 7);
2781         igb_pci_enable_sriov(pdev, max_vfs);
2782
2783 #endif /* CONFIG_PCI_IOV */
2784 }
2785
2786 static void igb_init_queue_configuration(struct igb_adapter *adapter)
2787 {
2788         struct e1000_hw *hw = &adapter->hw;
2789         u32 max_rss_queues;
2790
2791         /* Determine the maximum number of RSS queues supported. */
2792         switch (hw->mac.type) {
2793         case e1000_i211:
2794                 max_rss_queues = IGB_MAX_RX_QUEUES_I211;
2795                 break;
2796         case e1000_82575:
2797         case e1000_i210:
2798                 max_rss_queues = IGB_MAX_RX_QUEUES_82575;
2799                 break;
2800         case e1000_i350:
2801                 /* I350 cannot do RSS and SR-IOV at the same time */
2802                 if (!!adapter->vfs_allocated_count) {
2803                         max_rss_queues = 1;
2804                         break;
2805                 }
2806                 /* fall through */
2807         case e1000_82576:
2808                 if (!!adapter->vfs_allocated_count) {
2809                         max_rss_queues = 2;
2810                         break;
2811                 }
2812                 /* fall through */
2813         case e1000_82580:
2814         case e1000_i354:
2815         default:
2816                 max_rss_queues = IGB_MAX_RX_QUEUES;
2817                 break;
2818         }
2819
2820         adapter->rss_queues = min_t(u32, max_rss_queues, num_online_cpus());
2821
2822         /* Determine if we need to pair queues. */
2823         switch (hw->mac.type) {
2824         case e1000_82575:
2825         case e1000_i211:
2826                 /* Device supports enough interrupts without queue pairing. */
2827                 break;
2828         case e1000_82576:
2829                 /* If VFs are going to be allocated with RSS queues then we
2830                  * should pair the queues in order to conserve interrupts due
2831                  * to limited supply.
2832                  */
2833                 if ((adapter->rss_queues > 1) &&
2834                     (adapter->vfs_allocated_count > 6))
2835                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2836                 /* fall through */
2837         case e1000_82580:
2838         case e1000_i350:
2839         case e1000_i354:
2840         case e1000_i210:
2841         default:
2842                 /* If rss_queues > half of max_rss_queues, pair the queues in
2843                  * order to conserve interrupts due to limited supply.
2844                  */
2845                 if (adapter->rss_queues > (max_rss_queues / 2))
2846                         adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
2847                 break;
2848         }
2849 }
2850
2851 /**
2852  *  igb_sw_init - Initialize general software structures (struct igb_adapter)
2853  *  @adapter: board private structure to initialize
2854  *
2855  *  igb_sw_init initializes the Adapter private data structure.
2856  *  Fields are initialized based on PCI device information and
2857  *  OS network device settings (MTU size).
2858  **/
2859 static int igb_sw_init(struct igb_adapter *adapter)
2860 {
2861         struct e1000_hw *hw = &adapter->hw;
2862         struct net_device *netdev = adapter->netdev;
2863         struct pci_dev *pdev = adapter->pdev;
2864
2865         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
2866
2867         /* set default ring sizes */
2868         adapter->tx_ring_count = IGB_DEFAULT_TXD;
2869         adapter->rx_ring_count = IGB_DEFAULT_RXD;
2870
2871         /* set default ITR values */
2872         adapter->rx_itr_setting = IGB_DEFAULT_ITR;
2873         adapter->tx_itr_setting = IGB_DEFAULT_ITR;
2874
2875         /* set default work limits */
2876         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
2877
2878         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
2879                                   VLAN_HLEN;
2880         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2881
2882         spin_lock_init(&adapter->stats64_lock);
2883 #ifdef CONFIG_PCI_IOV
2884         switch (hw->mac.type) {
2885         case e1000_82576:
2886         case e1000_i350:
2887                 if (max_vfs > 7) {
2888                         dev_warn(&pdev->dev,
2889                                  "Maximum of 7 VFs per PF, using max\n");
2890                         max_vfs = adapter->vfs_allocated_count = 7;
2891                 } else
2892                         adapter->vfs_allocated_count = max_vfs;
2893                 if (adapter->vfs_allocated_count)
2894                         dev_warn(&pdev->dev,
2895                                  "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
2896                 break;
2897         default:
2898                 break;
2899         }
2900 #endif /* CONFIG_PCI_IOV */
2901
2902         igb_init_queue_configuration(adapter);
2903
2904         /* Setup and initialize a copy of the hw vlan table array */
2905         adapter->shadow_vfta = kcalloc(E1000_VLAN_FILTER_TBL_SIZE, sizeof(u32),
2906                                        GFP_ATOMIC);
2907
2908         /* This call may decrease the number of queues */
2909         if (igb_init_interrupt_scheme(adapter, true)) {
2910                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
2911                 return -ENOMEM;
2912         }
2913
2914         igb_probe_vfs(adapter);
2915
2916         /* Explicitly disable IRQ since the NIC can be in any state. */
2917         igb_irq_disable(adapter);
2918
2919         if (hw->mac.type >= e1000_i350)
2920                 adapter->flags &= ~IGB_FLAG_DMAC;
2921
2922         set_bit(__IGB_DOWN, &adapter->state);
2923         return 0;
2924 }
2925
2926 /**
2927  *  igb_open - Called when a network interface is made active
2928  *  @netdev: network interface device structure
2929  *
2930  *  Returns 0 on success, negative value on failure
2931  *
2932  *  The open entry point is called when a network interface is made
2933  *  active by the system (IFF_UP).  At this point all resources needed
2934  *  for transmit and receive operations are allocated, the interrupt
2935  *  handler is registered with the OS, the watchdog timer is started,
2936  *  and the stack is notified that the interface is ready.
2937  **/
2938 static int __igb_open(struct net_device *netdev, bool resuming)
2939 {
2940         struct igb_adapter *adapter = netdev_priv(netdev);
2941         struct e1000_hw *hw = &adapter->hw;
2942         struct pci_dev *pdev = adapter->pdev;
2943         int err;
2944         int i;
2945
2946         /* disallow open during test */
2947         if (test_bit(__IGB_TESTING, &adapter->state)) {
2948                 WARN_ON(resuming);
2949                 return -EBUSY;
2950         }
2951
2952         if (!resuming)
2953                 pm_runtime_get_sync(&pdev->dev);
2954
2955         netif_carrier_off(netdev);
2956
2957         /* allocate transmit descriptors */
2958         err = igb_setup_all_tx_resources(adapter);
2959         if (err)
2960                 goto err_setup_tx;
2961
2962         /* allocate receive descriptors */
2963         err = igb_setup_all_rx_resources(adapter);
2964         if (err)
2965                 goto err_setup_rx;
2966
2967         igb_power_up_link(adapter);
2968
2969         /* before we allocate an interrupt, we must be ready to handle it.
2970          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
2971          * as soon as we call pci_request_irq, so we have to setup our
2972          * clean_rx handler before we do so.
2973          */
2974         igb_configure(adapter);
2975
2976         err = igb_request_irq(adapter);
2977         if (err)
2978                 goto err_req_irq;
2979
2980         /* Notify the stack of the actual queue counts. */
2981         err = netif_set_real_num_tx_queues(adapter->netdev,
2982                                            adapter->num_tx_queues);
2983         if (err)
2984                 goto err_set_queues;
2985
2986         err = netif_set_real_num_rx_queues(adapter->netdev,
2987                                            adapter->num_rx_queues);
2988         if (err)
2989                 goto err_set_queues;
2990
2991         /* From here on the code is the same as igb_up() */
2992         clear_bit(__IGB_DOWN, &adapter->state);
2993
2994         for (i = 0; i < adapter->num_q_vectors; i++)
2995                 napi_enable(&(adapter->q_vector[i]->napi));
2996
2997         /* Clear any pending interrupts. */
2998         rd32(E1000_ICR);
2999
3000         igb_irq_enable(adapter);
3001
3002         /* notify VFs that reset has been completed */
3003         if (adapter->vfs_allocated_count) {
3004                 u32 reg_data = rd32(E1000_CTRL_EXT);
3005                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3006                 wr32(E1000_CTRL_EXT, reg_data);
3007         }
3008
3009         netif_tx_start_all_queues(netdev);
3010
3011         if (!resuming)
3012                 pm_runtime_put(&pdev->dev);
3013
3014         /* start the watchdog. */
3015         hw->mac.get_link_status = 1;
3016         schedule_work(&adapter->watchdog_task);
3017
3018         return 0;
3019
3020 err_set_queues:
3021         igb_free_irq(adapter);
3022 err_req_irq:
3023         igb_release_hw_control(adapter);
3024         igb_power_down_link(adapter);
3025         igb_free_all_rx_resources(adapter);
3026 err_setup_rx:
3027         igb_free_all_tx_resources(adapter);
3028 err_setup_tx:
3029         igb_reset(adapter);
3030         if (!resuming)
3031                 pm_runtime_put(&pdev->dev);
3032
3033         return err;
3034 }
3035
3036 static int igb_open(struct net_device *netdev)
3037 {
3038         return __igb_open(netdev, false);
3039 }
3040
3041 /**
3042  *  igb_close - Disables a network interface
3043  *  @netdev: network interface device structure
3044  *
3045  *  Returns 0, this is not allowed to fail
3046  *
3047  *  The close entry point is called when an interface is de-activated
3048  *  by the OS.  The hardware is still under the driver's control, but
3049  *  needs to be disabled.  A global MAC reset is issued to stop the
3050  *  hardware, and all transmit and receive resources are freed.
3051  **/
3052 static int __igb_close(struct net_device *netdev, bool suspending)
3053 {
3054         struct igb_adapter *adapter = netdev_priv(netdev);
3055         struct pci_dev *pdev = adapter->pdev;
3056
3057         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3058
3059         if (!suspending)
3060                 pm_runtime_get_sync(&pdev->dev);
3061
3062         igb_down(adapter);
3063         igb_free_irq(adapter);
3064
3065         igb_free_all_tx_resources(adapter);
3066         igb_free_all_rx_resources(adapter);
3067
3068         if (!suspending)
3069                 pm_runtime_put_sync(&pdev->dev);
3070         return 0;
3071 }
3072
3073 static int igb_close(struct net_device *netdev)
3074 {
3075         return __igb_close(netdev, false);
3076 }
3077
3078 /**
3079  *  igb_setup_tx_resources - allocate Tx resources (Descriptors)
3080  *  @tx_ring: tx descriptor ring (for a specific queue) to setup
3081  *
3082  *  Return 0 on success, negative on failure
3083  **/
3084 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3085 {
3086         struct device *dev = tx_ring->dev;
3087         int size;
3088
3089         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3090
3091         tx_ring->tx_buffer_info = vzalloc(size);
3092         if (!tx_ring->tx_buffer_info)
3093                 goto err;
3094
3095         /* round up to nearest 4K */
3096         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3097         tx_ring->size = ALIGN(tx_ring->size, 4096);
3098
3099         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3100                                            &tx_ring->dma, GFP_KERNEL);
3101         if (!tx_ring->desc)
3102                 goto err;
3103
3104         tx_ring->next_to_use = 0;
3105         tx_ring->next_to_clean = 0;
3106
3107         return 0;
3108
3109 err:
3110         vfree(tx_ring->tx_buffer_info);
3111         tx_ring->tx_buffer_info = NULL;
3112         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
3113         return -ENOMEM;
3114 }
3115
3116 /**
3117  *  igb_setup_all_tx_resources - wrapper to allocate Tx resources
3118  *                               (Descriptors) for all queues
3119  *  @adapter: board private structure
3120  *
3121  *  Return 0 on success, negative on failure
3122  **/
3123 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3124 {
3125         struct pci_dev *pdev = adapter->pdev;
3126         int i, err = 0;
3127
3128         for (i = 0; i < adapter->num_tx_queues; i++) {
3129                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3130                 if (err) {
3131                         dev_err(&pdev->dev,
3132                                 "Allocation for Tx Queue %u failed\n", i);
3133                         for (i--; i >= 0; i--)
3134                                 igb_free_tx_resources(adapter->tx_ring[i]);
3135                         break;
3136                 }
3137         }
3138
3139         return err;
3140 }
3141
3142 /**
3143  *  igb_setup_tctl - configure the transmit control registers
3144  *  @adapter: Board private structure
3145  **/
3146 void igb_setup_tctl(struct igb_adapter *adapter)
3147 {
3148         struct e1000_hw *hw = &adapter->hw;
3149         u32 tctl;
3150
3151         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3152         wr32(E1000_TXDCTL(0), 0);
3153
3154         /* Program the Transmit Control Register */
3155         tctl = rd32(E1000_TCTL);
3156         tctl &= ~E1000_TCTL_CT;
3157         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3158                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3159
3160         igb_config_collision_dist(hw);
3161
3162         /* Enable transmits */
3163         tctl |= E1000_TCTL_EN;
3164
3165         wr32(E1000_TCTL, tctl);
3166 }
3167
3168 /**
3169  *  igb_configure_tx_ring - Configure transmit ring after Reset
3170  *  @adapter: board private structure
3171  *  @ring: tx ring to configure
3172  *
3173  *  Configure a transmit ring after a reset.
3174  **/
3175 void igb_configure_tx_ring(struct igb_adapter *adapter,
3176                            struct igb_ring *ring)
3177 {
3178         struct e1000_hw *hw = &adapter->hw;
3179         u32 txdctl = 0;
3180         u64 tdba = ring->dma;
3181         int reg_idx = ring->reg_idx;
3182
3183         /* disable the queue */
3184         wr32(E1000_TXDCTL(reg_idx), 0);
3185         wrfl();
3186         mdelay(10);
3187
3188         wr32(E1000_TDLEN(reg_idx),
3189              ring->count * sizeof(union e1000_adv_tx_desc));
3190         wr32(E1000_TDBAL(reg_idx),
3191              tdba & 0x00000000ffffffffULL);
3192         wr32(E1000_TDBAH(reg_idx), tdba >> 32);
3193
3194         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3195         wr32(E1000_TDH(reg_idx), 0);
3196         writel(0, ring->tail);
3197
3198         txdctl |= IGB_TX_PTHRESH;
3199         txdctl |= IGB_TX_HTHRESH << 8;
3200         txdctl |= IGB_TX_WTHRESH << 16;
3201
3202         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3203         wr32(E1000_TXDCTL(reg_idx), txdctl);
3204 }
3205
3206 /**
3207  *  igb_configure_tx - Configure transmit Unit after Reset
3208  *  @adapter: board private structure
3209  *
3210  *  Configure the Tx unit of the MAC after a reset.
3211  **/
3212 static void igb_configure_tx(struct igb_adapter *adapter)
3213 {
3214         int i;
3215
3216         for (i = 0; i < adapter->num_tx_queues; i++)
3217                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3218 }
3219
3220 /**
3221  *  igb_setup_rx_resources - allocate Rx resources (Descriptors)
3222  *  @rx_ring: Rx descriptor ring (for a specific queue) to setup
3223  *
3224  *  Returns 0 on success, negative on failure
3225  **/
3226 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3227 {
3228         struct device *dev = rx_ring->dev;
3229         int size;
3230
3231         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3232
3233         rx_ring->rx_buffer_info = vzalloc(size);
3234         if (!rx_ring->rx_buffer_info)
3235                 goto err;
3236
3237         /* Round up to nearest 4K */
3238         rx_ring->size = rx_ring->count * sizeof(union e1000_adv_rx_desc);
3239         rx_ring->size = ALIGN(rx_ring->size, 4096);
3240
3241         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3242                                            &rx_ring->dma, GFP_KERNEL);
3243         if (!rx_ring->desc)
3244                 goto err;
3245
3246         rx_ring->next_to_alloc = 0;
3247         rx_ring->next_to_clean = 0;
3248         rx_ring->next_to_use = 0;
3249
3250         return 0;
3251
3252 err:
3253         vfree(rx_ring->rx_buffer_info);
3254         rx_ring->rx_buffer_info = NULL;
3255         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
3256         return -ENOMEM;
3257 }
3258
3259 /**
3260  *  igb_setup_all_rx_resources - wrapper to allocate Rx resources
3261  *                               (Descriptors) for all queues
3262  *  @adapter: board private structure
3263  *
3264  *  Return 0 on success, negative on failure
3265  **/
3266 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3267 {
3268         struct pci_dev *pdev = adapter->pdev;
3269         int i, err = 0;
3270
3271         for (i = 0; i < adapter->num_rx_queues; i++) {
3272                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3273                 if (err) {
3274                         dev_err(&pdev->dev,
3275                                 "Allocation for Rx Queue %u failed\n", i);
3276                         for (i--; i >= 0; i--)
3277                                 igb_free_rx_resources(adapter->rx_ring[i]);
3278                         break;
3279                 }
3280         }
3281
3282         return err;
3283 }
3284
3285 /**
3286  *  igb_setup_mrqc - configure the multiple receive queue control registers
3287  *  @adapter: Board private structure
3288  **/
3289 static void igb_setup_mrqc(struct igb_adapter *adapter)
3290 {
3291         struct e1000_hw *hw = &adapter->hw;
3292         u32 mrqc, rxcsum;
3293         u32 j, num_rx_queues;
3294         static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3295                                         0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3296                                         0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3297                                         0xFA01ACBE };
3298
3299         /* Fill out hash function seeds */
3300         for (j = 0; j < 10; j++)
3301                 wr32(E1000_RSSRK(j), rsskey[j]);
3302
3303         num_rx_queues = adapter->rss_queues;
3304
3305         switch (hw->mac.type) {
3306         case e1000_82576:
3307                 /* 82576 supports 2 RSS queues for SR-IOV */
3308                 if (adapter->vfs_allocated_count)
3309                         num_rx_queues = 2;
3310                 break;
3311         default:
3312                 break;
3313         }
3314
3315         if (adapter->rss_indir_tbl_init != num_rx_queues) {
3316                 for (j = 0; j < IGB_RETA_SIZE; j++)
3317                         adapter->rss_indir_tbl[j] = (j * num_rx_queues) / IGB_RETA_SIZE;
3318                 adapter->rss_indir_tbl_init = num_rx_queues;
3319         }
3320         igb_write_rss_indir_tbl(adapter);
3321
3322         /* Disable raw packet checksumming so that RSS hash is placed in
3323          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3324          * offloads as they are enabled by default
3325          */
3326         rxcsum = rd32(E1000_RXCSUM);
3327         rxcsum |= E1000_RXCSUM_PCSD;
3328
3329         if (adapter->hw.mac.type >= e1000_82576)
3330                 /* Enable Receive Checksum Offload for SCTP */
3331                 rxcsum |= E1000_RXCSUM_CRCOFL;
3332
3333         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3334         wr32(E1000_RXCSUM, rxcsum);
3335
3336         /* Generate RSS hash based on packet types, TCP/UDP
3337          * port numbers and/or IPv4/v6 src and dst addresses
3338          */
3339         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3340                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3341                E1000_MRQC_RSS_FIELD_IPV6 |
3342                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3343                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3344
3345         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3346                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3347         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3348                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3349
3350         /* If VMDq is enabled then we set the appropriate mode for that, else
3351          * we default to RSS so that an RSS hash is calculated per packet even
3352          * if we are only using one queue
3353          */
3354         if (adapter->vfs_allocated_count) {
3355                 if (hw->mac.type > e1000_82575) {
3356                         /* Set the default pool for the PF's first queue */
3357                         u32 vtctl = rd32(E1000_VT_CTL);
3358                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3359                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3360                         vtctl |= adapter->vfs_allocated_count <<
3361                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3362                         wr32(E1000_VT_CTL, vtctl);
3363                 }
3364                 if (adapter->rss_queues > 1)
3365                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3366                 else
3367                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3368         } else {
3369                 if (hw->mac.type != e1000_i211)
3370                         mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3371         }
3372         igb_vmm_control(adapter);
3373
3374         wr32(E1000_MRQC, mrqc);
3375 }
3376
3377 /**
3378  *  igb_setup_rctl - configure the receive control registers
3379  *  @adapter: Board private structure
3380  **/
3381 void igb_setup_rctl(struct igb_adapter *adapter)
3382 {
3383         struct e1000_hw *hw = &adapter->hw;
3384         u32 rctl;
3385
3386         rctl = rd32(E1000_RCTL);
3387
3388         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3389         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3390
3391         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3392                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3393
3394         /* enable stripping of CRC. It's unlikely this will break BMC
3395          * redirection as it did with e1000. Newer features require
3396          * that the HW strips the CRC.
3397          */
3398         rctl |= E1000_RCTL_SECRC;
3399
3400         /* disable store bad packets and clear size bits. */
3401         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3402
3403         /* enable LPE to prevent packets larger than max_frame_size */
3404         rctl |= E1000_RCTL_LPE;
3405
3406         /* disable queue 0 to prevent tail write w/o re-config */
3407         wr32(E1000_RXDCTL(0), 0);
3408
3409         /* Attention!!!  For SR-IOV PF driver operations you must enable
3410          * queue drop for all VF and PF queues to prevent head of line blocking
3411          * if an un-trusted VF does not provide descriptors to hardware.
3412          */
3413         if (adapter->vfs_allocated_count) {
3414                 /* set all queue drop enable bits */
3415                 wr32(E1000_QDE, ALL_QUEUES);
3416         }
3417
3418         /* This is useful for sniffing bad packets. */
3419         if (adapter->netdev->features & NETIF_F_RXALL) {
3420                 /* UPE and MPE will be handled by normal PROMISC logic
3421                  * in e1000e_set_rx_mode
3422                  */
3423                 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3424                          E1000_RCTL_BAM | /* RX All Bcast Pkts */
3425                          E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3426
3427                 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3428                           E1000_RCTL_DPF | /* Allow filtered pause */
3429                           E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3430                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3431                  * and that breaks VLANs.
3432                  */
3433         }
3434
3435         wr32(E1000_RCTL, rctl);
3436 }
3437
3438 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3439                                    int vfn)
3440 {
3441         struct e1000_hw *hw = &adapter->hw;
3442         u32 vmolr;
3443
3444         /* if it isn't the PF check to see if VFs are enabled and
3445          * increase the size to support vlan tags
3446          */
3447         if (vfn < adapter->vfs_allocated_count &&
3448             adapter->vf_data[vfn].vlans_enabled)
3449                 size += VLAN_TAG_SIZE;
3450
3451         vmolr = rd32(E1000_VMOLR(vfn));
3452         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3453         vmolr |= size | E1000_VMOLR_LPE;
3454         wr32(E1000_VMOLR(vfn), vmolr);
3455
3456         return 0;
3457 }
3458
3459 /**
3460  *  igb_rlpml_set - set maximum receive packet size
3461  *  @adapter: board private structure
3462  *
3463  *  Configure maximum receivable packet size.
3464  **/
3465 static void igb_rlpml_set(struct igb_adapter *adapter)
3466 {
3467         u32 max_frame_size = adapter->max_frame_size;
3468         struct e1000_hw *hw = &adapter->hw;
3469         u16 pf_id = adapter->vfs_allocated_count;
3470
3471         if (pf_id) {
3472                 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3473                 /* If we're in VMDQ or SR-IOV mode, then set global RLPML
3474                  * to our max jumbo frame size, in case we need to enable
3475                  * jumbo frames on one of the rings later.
3476                  * This will not pass over-length frames into the default
3477                  * queue because it's gated by the VMOLR.RLPML.
3478                  */
3479                 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3480         }
3481
3482         wr32(E1000_RLPML, max_frame_size);
3483 }
3484
3485 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3486                                  int vfn, bool aupe)
3487 {
3488         struct e1000_hw *hw = &adapter->hw;
3489         u32 vmolr;
3490
3491         /* This register exists only on 82576 and newer so if we are older then
3492          * we should exit and do nothing
3493          */
3494         if (hw->mac.type < e1000_82576)
3495                 return;
3496
3497         vmolr = rd32(E1000_VMOLR(vfn));
3498         vmolr |= E1000_VMOLR_STRVLAN; /* Strip vlan tags */
3499         if (aupe)
3500                 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3501         else
3502                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3503
3504         /* clear all bits that might not be set */
3505         vmolr &= ~(E1000_VMOLR_BAM | E1000_VMOLR_RSSE);
3506
3507         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3508                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3509         /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3510          * multicast packets
3511          */
3512         if (vfn <= adapter->vfs_allocated_count)
3513                 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3514
3515         wr32(E1000_VMOLR(vfn), vmolr);
3516 }
3517
3518 /**
3519  *  igb_configure_rx_ring - Configure a receive ring after Reset
3520  *  @adapter: board private structure
3521  *  @ring: receive ring to be configured
3522  *
3523  *  Configure the Rx unit of the MAC after a reset.
3524  **/
3525 void igb_configure_rx_ring(struct igb_adapter *adapter,
3526                            struct igb_ring *ring)
3527 {
3528         struct e1000_hw *hw = &adapter->hw;
3529         u64 rdba = ring->dma;
3530         int reg_idx = ring->reg_idx;
3531         u32 srrctl = 0, rxdctl = 0;
3532
3533         /* disable the queue */
3534         wr32(E1000_RXDCTL(reg_idx), 0);
3535
3536         /* Set DMA base address registers */
3537         wr32(E1000_RDBAL(reg_idx),
3538              rdba & 0x00000000ffffffffULL);
3539         wr32(E1000_RDBAH(reg_idx), rdba >> 32);
3540         wr32(E1000_RDLEN(reg_idx),
3541              ring->count * sizeof(union e1000_adv_rx_desc));
3542
3543         /* initialize head and tail */
3544         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3545         wr32(E1000_RDH(reg_idx), 0);
3546         writel(0, ring->tail);
3547
3548         /* set descriptor configuration */
3549         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3550         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3551         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3552         if (hw->mac.type >= e1000_82580)
3553                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3554         /* Only set Drop Enable if we are supporting multiple queues */
3555         if (adapter->vfs_allocated_count || adapter->num_rx_queues > 1)
3556                 srrctl |= E1000_SRRCTL_DROP_EN;
3557
3558         wr32(E1000_SRRCTL(reg_idx), srrctl);
3559
3560         /* set filtering for VMDQ pools */
3561         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3562
3563         rxdctl |= IGB_RX_PTHRESH;
3564         rxdctl |= IGB_RX_HTHRESH << 8;
3565         rxdctl |= IGB_RX_WTHRESH << 16;
3566
3567         /* enable receive descriptor fetching */
3568         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3569         wr32(E1000_RXDCTL(reg_idx), rxdctl);
3570 }
3571
3572 /**
3573  *  igb_configure_rx - Configure receive Unit after Reset
3574  *  @adapter: board private structure
3575  *
3576  *  Configure the Rx unit of the MAC after a reset.
3577  **/
3578 static void igb_configure_rx(struct igb_adapter *adapter)
3579 {
3580         int i;
3581
3582         /* set UTA to appropriate mode */
3583         igb_set_uta(adapter);
3584
3585         /* set the correct pool for the PF default MAC address in entry 0 */
3586         igb_rar_set_qsel(adapter, adapter->hw.mac.addr, 0,
3587                          adapter->vfs_allocated_count);
3588
3589         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3590          * the Base and Length of the Rx Descriptor Ring
3591          */
3592         for (i = 0; i < adapter->num_rx_queues; i++)
3593                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3594 }
3595
3596 /**
3597  *  igb_free_tx_resources - Free Tx Resources per Queue
3598  *  @tx_ring: Tx descriptor ring for a specific queue
3599  *
3600  *  Free all transmit software resources
3601  **/
3602 void igb_free_tx_resources(struct igb_ring *tx_ring)
3603 {
3604         igb_clean_tx_ring(tx_ring);
3605
3606         vfree(tx_ring->tx_buffer_info);
3607         tx_ring->tx_buffer_info = NULL;
3608
3609         /* if not set, then don't free */
3610         if (!tx_ring->desc)
3611                 return;
3612
3613         dma_free_coherent(tx_ring->dev, tx_ring->size,
3614                           tx_ring->desc, tx_ring->dma);
3615
3616         tx_ring->desc = NULL;
3617 }
3618
3619 /**
3620  *  igb_free_all_tx_resources - Free Tx Resources for All Queues
3621  *  @adapter: board private structure
3622  *
3623  *  Free all transmit software resources
3624  **/
3625 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
3626 {
3627         int i;
3628
3629         for (i = 0; i < adapter->num_tx_queues; i++)
3630                 igb_free_tx_resources(adapter->tx_ring[i]);
3631 }
3632
3633 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
3634                                     struct igb_tx_buffer *tx_buffer)
3635 {
3636         if (tx_buffer->skb) {
3637                 dev_kfree_skb_any(tx_buffer->skb);
3638                 if (dma_unmap_len(tx_buffer, len))
3639                         dma_unmap_single(ring->dev,
3640                                          dma_unmap_addr(tx_buffer, dma),
3641                                          dma_unmap_len(tx_buffer, len),
3642                                          DMA_TO_DEVICE);
3643         } else if (dma_unmap_len(tx_buffer, len)) {
3644                 dma_unmap_page(ring->dev,
3645                                dma_unmap_addr(tx_buffer, dma),
3646                                dma_unmap_len(tx_buffer, len),
3647                                DMA_TO_DEVICE);
3648         }
3649         tx_buffer->next_to_watch = NULL;
3650         tx_buffer->skb = NULL;
3651         dma_unmap_len_set(tx_buffer, len, 0);
3652         /* buffer_info must be completely set up in the transmit path */
3653 }
3654
3655 /**
3656  *  igb_clean_tx_ring - Free Tx Buffers
3657  *  @tx_ring: ring to be cleaned
3658  **/
3659 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
3660 {
3661         struct igb_tx_buffer *buffer_info;
3662         unsigned long size;
3663         u16 i;
3664
3665         if (!tx_ring->tx_buffer_info)
3666                 return;
3667         /* Free all the Tx ring sk_buffs */
3668
3669         for (i = 0; i < tx_ring->count; i++) {
3670                 buffer_info = &tx_ring->tx_buffer_info[i];
3671                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
3672         }
3673
3674         netdev_tx_reset_queue(txring_txq(tx_ring));
3675
3676         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3677         memset(tx_ring->tx_buffer_info, 0, size);
3678
3679         /* Zero out the descriptor ring */
3680         memset(tx_ring->desc, 0, tx_ring->size);
3681
3682         tx_ring->next_to_use = 0;
3683         tx_ring->next_to_clean = 0;
3684 }
3685
3686 /**
3687  *  igb_clean_all_tx_rings - Free Tx Buffers for all queues
3688  *  @adapter: board private structure
3689  **/
3690 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
3691 {
3692         int i;
3693
3694         for (i = 0; i < adapter->num_tx_queues; i++)
3695                 igb_clean_tx_ring(adapter->tx_ring[i]);
3696 }
3697
3698 /**
3699  *  igb_free_rx_resources - Free Rx Resources
3700  *  @rx_ring: ring to clean the resources from
3701  *
3702  *  Free all receive software resources
3703  **/
3704 void igb_free_rx_resources(struct igb_ring *rx_ring)
3705 {
3706         igb_clean_rx_ring(rx_ring);
3707
3708         vfree(rx_ring->rx_buffer_info);
3709         rx_ring->rx_buffer_info = NULL;
3710
3711         /* if not set, then don't free */
3712         if (!rx_ring->desc)
3713                 return;
3714
3715         dma_free_coherent(rx_ring->dev, rx_ring->size,
3716                           rx_ring->desc, rx_ring->dma);
3717
3718         rx_ring->desc = NULL;
3719 }
3720
3721 /**
3722  *  igb_free_all_rx_resources - Free Rx Resources for All Queues
3723  *  @adapter: board private structure
3724  *
3725  *  Free all receive software resources
3726  **/
3727 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
3728 {
3729         int i;
3730
3731         for (i = 0; i < adapter->num_rx_queues; i++)
3732                 igb_free_rx_resources(adapter->rx_ring[i]);
3733 }
3734
3735 /**
3736  *  igb_clean_rx_ring - Free Rx Buffers per Queue
3737  *  @rx_ring: ring to free buffers from
3738  **/
3739 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
3740 {
3741         unsigned long size;
3742         u16 i;
3743
3744         if (rx_ring->skb)
3745                 dev_kfree_skb(rx_ring->skb);
3746         rx_ring->skb = NULL;
3747
3748         if (!rx_ring->rx_buffer_info)
3749                 return;
3750
3751         /* Free all the Rx ring sk_buffs */
3752         for (i = 0; i < rx_ring->count; i++) {
3753                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
3754
3755                 if (!buffer_info->page)
3756                         continue;
3757
3758                 dma_unmap_page(rx_ring->dev,
3759                                buffer_info->dma,
3760                                PAGE_SIZE,
3761                                DMA_FROM_DEVICE);
3762                 __free_page(buffer_info->page);
3763
3764                 buffer_info->page = NULL;
3765         }
3766
3767         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3768         memset(rx_ring->rx_buffer_info, 0, size);
3769
3770         /* Zero out the descriptor ring */
3771         memset(rx_ring->desc, 0, rx_ring->size);
3772
3773         rx_ring->next_to_alloc = 0;
3774         rx_ring->next_to_clean = 0;
3775         rx_ring->next_to_use = 0;
3776 }
3777
3778 /**
3779  *  igb_clean_all_rx_rings - Free Rx Buffers for all queues
3780  *  @adapter: board private structure
3781  **/
3782 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
3783 {
3784         int i;
3785
3786         for (i = 0; i < adapter->num_rx_queues; i++)
3787                 igb_clean_rx_ring(adapter->rx_ring[i]);
3788 }
3789
3790 /**
3791  *  igb_set_mac - Change the Ethernet Address of the NIC
3792  *  @netdev: network interface device structure
3793  *  @p: pointer to an address structure
3794  *
3795  *  Returns 0 on success, negative on failure
3796  **/
3797 static int igb_set_mac(struct net_device *netdev, void *p)
3798 {
3799         struct igb_adapter *adapter = netdev_priv(netdev);
3800         struct e1000_hw *hw = &adapter->hw;
3801         struct sockaddr *addr = p;
3802
3803         if (!is_valid_ether_addr(addr->sa_data))
3804                 return -EADDRNOTAVAIL;
3805
3806         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3807         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3808
3809         /* set the correct pool for the new PF MAC address in entry 0 */
3810         igb_rar_set_qsel(adapter, hw->mac.addr, 0,
3811                          adapter->vfs_allocated_count);
3812
3813         return 0;
3814 }
3815
3816 /**
3817  *  igb_write_mc_addr_list - write multicast addresses to MTA
3818  *  @netdev: network interface device structure
3819  *
3820  *  Writes multicast address list to the MTA hash table.
3821  *  Returns: -ENOMEM on failure
3822  *           0 on no addresses written
3823  *           X on writing X addresses to MTA
3824  **/
3825 static int igb_write_mc_addr_list(struct net_device *netdev)
3826 {
3827         struct igb_adapter *adapter = netdev_priv(netdev);
3828         struct e1000_hw *hw = &adapter->hw;
3829         struct netdev_hw_addr *ha;
3830         u8  *mta_list;
3831         int i;
3832
3833         if (netdev_mc_empty(netdev)) {
3834                 /* nothing to program, so clear mc list */
3835                 igb_update_mc_addr_list(hw, NULL, 0);
3836                 igb_restore_vf_multicasts(adapter);
3837                 return 0;
3838         }
3839
3840         mta_list = kzalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
3841         if (!mta_list)
3842                 return -ENOMEM;
3843
3844         /* The shared function expects a packed array of only addresses. */
3845         i = 0;
3846         netdev_for_each_mc_addr(ha, netdev)
3847                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3848
3849         igb_update_mc_addr_list(hw, mta_list, i);
3850         kfree(mta_list);
3851
3852         return netdev_mc_count(netdev);
3853 }
3854
3855 /**
3856  *  igb_write_uc_addr_list - write unicast addresses to RAR table
3857  *  @netdev: network interface device structure
3858  *
3859  *  Writes unicast address list to the RAR table.
3860  *  Returns: -ENOMEM on failure/insufficient address space
3861  *           0 on no addresses written
3862  *           X on writing X addresses to the RAR table
3863  **/
3864 static int igb_write_uc_addr_list(struct net_device *netdev)
3865 {
3866         struct igb_adapter *adapter = netdev_priv(netdev);
3867         struct e1000_hw *hw = &adapter->hw;
3868         unsigned int vfn = adapter->vfs_allocated_count;
3869         unsigned int rar_entries = hw->mac.rar_entry_count - (vfn + 1);
3870         int count = 0;
3871
3872         /* return ENOMEM indicating insufficient memory for addresses */
3873         if (netdev_uc_count(netdev) > rar_entries)
3874                 return -ENOMEM;
3875
3876         if (!netdev_uc_empty(netdev) && rar_entries) {
3877                 struct netdev_hw_addr *ha;
3878
3879                 netdev_for_each_uc_addr(ha, netdev) {
3880                         if (!rar_entries)
3881                                 break;
3882                         igb_rar_set_qsel(adapter, ha->addr,
3883                                          rar_entries--,
3884                                          vfn);
3885                         count++;
3886                 }
3887         }
3888         /* write the addresses in reverse order to avoid write combining */
3889         for (; rar_entries > 0 ; rar_entries--) {
3890                 wr32(E1000_RAH(rar_entries), 0);
3891                 wr32(E1000_RAL(rar_entries), 0);
3892         }
3893         wrfl();
3894
3895         return count;
3896 }
3897
3898 /**
3899  *  igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
3900  *  @netdev: network interface device structure
3901  *
3902  *  The set_rx_mode entry point is called whenever the unicast or multicast
3903  *  address lists or the network interface flags are updated.  This routine is
3904  *  responsible for configuring the hardware for proper unicast, multicast,
3905  *  promiscuous mode, and all-multi behavior.
3906  **/
3907 static void igb_set_rx_mode(struct net_device *netdev)
3908 {
3909         struct igb_adapter *adapter = netdev_priv(netdev);
3910         struct e1000_hw *hw = &adapter->hw;
3911         unsigned int vfn = adapter->vfs_allocated_count;
3912         u32 rctl, vmolr = 0;
3913         int count;
3914
3915         /* Check for Promiscuous and All Multicast modes */
3916         rctl = rd32(E1000_RCTL);
3917
3918         /* clear the effected bits */
3919         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
3920
3921         if (netdev->flags & IFF_PROMISC) {
3922                 /* retain VLAN HW filtering if in VT mode */
3923                 if (adapter->vfs_allocated_count)
3924                         rctl |= E1000_RCTL_VFE;
3925                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3926                 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
3927         } else {
3928                 if (netdev->flags & IFF_ALLMULTI) {
3929                         rctl |= E1000_RCTL_MPE;
3930                         vmolr |= E1000_VMOLR_MPME;
3931                 } else {
3932                         /* Write addresses to the MTA, if the attempt fails
3933                          * then we should just turn on promiscuous mode so
3934                          * that we can at least receive multicast traffic
3935                          */
3936                         count = igb_write_mc_addr_list(netdev);
3937                         if (count < 0) {
3938                                 rctl |= E1000_RCTL_MPE;
3939                                 vmolr |= E1000_VMOLR_MPME;
3940                         } else if (count) {
3941                                 vmolr |= E1000_VMOLR_ROMPE;
3942                         }
3943                 }
3944                 /* Write addresses to available RAR registers, if there is not
3945                  * sufficient space to store all the addresses then enable
3946                  * unicast promiscuous mode
3947                  */
3948                 count = igb_write_uc_addr_list(netdev);
3949                 if (count < 0) {
3950                         rctl |= E1000_RCTL_UPE;
3951                         vmolr |= E1000_VMOLR_ROPE;
3952                 }
3953                 rctl |= E1000_RCTL_VFE;
3954         }
3955         wr32(E1000_RCTL, rctl);
3956
3957         /* In order to support SR-IOV and eventually VMDq it is necessary to set
3958          * the VMOLR to enable the appropriate modes.  Without this workaround
3959          * we will have issues with VLAN tag stripping not being done for frames
3960          * that are only arriving because we are the default pool
3961          */
3962         if ((hw->mac.type < e1000_82576) || (hw->mac.type > e1000_i350))
3963                 return;
3964
3965         vmolr |= rd32(E1000_VMOLR(vfn)) &
3966                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
3967         wr32(E1000_VMOLR(vfn), vmolr);
3968         igb_restore_vf_multicasts(adapter);
3969 }
3970
3971 static void igb_check_wvbr(struct igb_adapter *adapter)
3972 {
3973         struct e1000_hw *hw = &adapter->hw;
3974         u32 wvbr = 0;
3975
3976         switch (hw->mac.type) {
3977         case e1000_82576:
3978         case e1000_i350:
3979                 if (!(wvbr = rd32(E1000_WVBR)))
3980                         return;
3981                 break;
3982         default:
3983                 break;
3984         }
3985
3986         adapter->wvbr |= wvbr;
3987 }
3988
3989 #define IGB_STAGGERED_QUEUE_OFFSET 8
3990
3991 static void igb_spoof_check(struct igb_adapter *adapter)
3992 {
3993         int j;
3994
3995         if (!adapter->wvbr)
3996                 return;
3997
3998         for(j = 0; j < adapter->vfs_allocated_count; j++) {
3999                 if (adapter->wvbr & (1 << j) ||
4000                     adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4001                         dev_warn(&adapter->pdev->dev,
4002                                 "Spoof event(s) detected on VF %d\n", j);
4003                         adapter->wvbr &=
4004                                 ~((1 << j) |
4005                                   (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4006                 }
4007         }
4008 }
4009
4010 /* Need to wait a few seconds after link up to get diagnostic information from
4011  * the phy
4012  */
4013 static void igb_update_phy_info(unsigned long data)
4014 {
4015         struct igb_adapter *adapter = (struct igb_adapter *) data;
4016         igb_get_phy_info(&adapter->hw);
4017 }
4018
4019 /**
4020  *  igb_has_link - check shared code for link and determine up/down
4021  *  @adapter: pointer to driver private info
4022  **/
4023 bool igb_has_link(struct igb_adapter *adapter)
4024 {
4025         struct e1000_hw *hw = &adapter->hw;
4026         bool link_active = false;
4027
4028         /* get_link_status is set on LSC (link status) interrupt or
4029          * rx sequence error interrupt.  get_link_status will stay
4030          * false until the e1000_check_for_link establishes link
4031          * for copper adapters ONLY
4032          */
4033         switch (hw->phy.media_type) {
4034         case e1000_media_type_copper:
4035                 if (!hw->mac.get_link_status)
4036                         return true;
4037         case e1000_media_type_internal_serdes:
4038                 hw->mac.ops.check_for_link(hw);
4039                 link_active = !hw->mac.get_link_status;
4040                 break;
4041         default:
4042         case e1000_media_type_unknown:
4043                 break;
4044         }
4045
4046         if (((hw->mac.type == e1000_i210) ||
4047              (hw->mac.type == e1000_i211)) &&
4048              (hw->phy.id == I210_I_PHY_ID)) {
4049                 if (!netif_carrier_ok(adapter->netdev)) {
4050                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4051                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4052                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4053                         adapter->link_check_timeout = jiffies;
4054                 }
4055         }
4056
4057         return link_active;
4058 }
4059
4060 static bool igb_thermal_sensor_event(struct e1000_hw *hw, u32 event)
4061 {
4062         bool ret = false;
4063         u32 ctrl_ext, thstat;
4064
4065         /* check for thermal sensor event on i350 copper only */
4066         if (hw->mac.type == e1000_i350) {
4067                 thstat = rd32(E1000_THSTAT);
4068                 ctrl_ext = rd32(E1000_CTRL_EXT);
4069
4070                 if ((hw->phy.media_type == e1000_media_type_copper) &&
4071                     !(ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII))
4072                         ret = !!(thstat & event);
4073         }
4074
4075         return ret;
4076 }
4077
4078 /**
4079  *  igb_watchdog - Timer Call-back
4080  *  @data: pointer to adapter cast into an unsigned long
4081  **/
4082 static void igb_watchdog(unsigned long data)
4083 {
4084         struct igb_adapter *adapter = (struct igb_adapter *)data;
4085         /* Do the rest outside of interrupt context */
4086         schedule_work(&adapter->watchdog_task);
4087 }
4088
4089 static void igb_watchdog_task(struct work_struct *work)
4090 {
4091         struct igb_adapter *adapter = container_of(work,
4092                                                    struct igb_adapter,
4093                                                    watchdog_task);
4094         struct e1000_hw *hw = &adapter->hw;
4095         struct e1000_phy_info *phy = &hw->phy;
4096         struct net_device *netdev = adapter->netdev;
4097         u32 link;
4098         int i;
4099         u32 connsw;
4100
4101         link = igb_has_link(adapter);
4102
4103         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4104                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4105                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4106                 else
4107                         link = false;
4108         }
4109
4110         /* Force link down if we have fiber to swap to */
4111         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4112                 if (hw->phy.media_type == e1000_media_type_copper) {
4113                         connsw = rd32(E1000_CONNSW);
4114                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4115                                 link = 0;
4116                 }
4117         }
4118         if (link) {
4119                 /* Perform a reset if the media type changed. */
4120                 if (hw->dev_spec._82575.media_changed) {
4121                         hw->dev_spec._82575.media_changed = false;
4122                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4123                         igb_reset(adapter);
4124                 }
4125                 /* Cancel scheduled suspend requests. */
4126                 pm_runtime_resume(netdev->dev.parent);
4127
4128                 if (!netif_carrier_ok(netdev)) {
4129                         u32 ctrl;
4130                         hw->mac.ops.get_speed_and_duplex(hw,
4131                                                          &adapter->link_speed,
4132                                                          &adapter->link_duplex);
4133
4134                         ctrl = rd32(E1000_CTRL);
4135                         /* Links status message must follow this format */
4136                         printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s "
4137                                "Duplex, Flow Control: %s\n",
4138                                netdev->name,
4139                                adapter->link_speed,
4140                                adapter->link_duplex == FULL_DUPLEX ?
4141                                "Full" : "Half",
4142                                (ctrl & E1000_CTRL_TFCE) &&
4143                                (ctrl & E1000_CTRL_RFCE) ? "RX/TX" :
4144                                (ctrl & E1000_CTRL_RFCE) ?  "RX" :
4145                                (ctrl & E1000_CTRL_TFCE) ?  "TX" : "None");
4146
4147                         /* check if SmartSpeed worked */
4148                         igb_check_downshift(hw);
4149                         if (phy->speed_downgraded)
4150                                 netdev_warn(netdev, "Link Speed was downgraded by SmartSpeed\n");
4151
4152                         /* check for thermal sensor event */
4153                         if (igb_thermal_sensor_event(hw,
4154                             E1000_THSTAT_LINK_THROTTLE)) {
4155                                 netdev_info(netdev, "The network adapter link "
4156                                             "speed was downshifted because it "
4157                                             "overheated\n");
4158                         }
4159
4160                         /* adjust timeout factor according to speed/duplex */
4161                         adapter->tx_timeout_factor = 1;
4162                         switch (adapter->link_speed) {
4163                         case SPEED_10:
4164                                 adapter->tx_timeout_factor = 14;
4165                                 break;
4166                         case SPEED_100:
4167                                 /* maybe add some timeout factor ? */
4168                                 break;
4169                         }
4170
4171                         netif_carrier_on(netdev);
4172
4173                         igb_ping_all_vfs(adapter);
4174                         igb_check_vf_rate_limit(adapter);
4175
4176                         /* link state has changed, schedule phy info update */
4177                         if (!test_bit(__IGB_DOWN, &adapter->state))
4178                                 mod_timer(&adapter->phy_info_timer,
4179                                           round_jiffies(jiffies + 2 * HZ));
4180                 }
4181         } else {
4182                 if (netif_carrier_ok(netdev)) {
4183                         adapter->link_speed = 0;
4184                         adapter->link_duplex = 0;
4185
4186                         /* check for thermal sensor event */
4187                         if (igb_thermal_sensor_event(hw,
4188                             E1000_THSTAT_PWR_DOWN)) {
4189                                 netdev_err(netdev, "The network adapter was "
4190                                            "stopped because it overheated\n");
4191                         }
4192
4193                         /* Links status message must follow this format */
4194                         printk(KERN_INFO "igb: %s NIC Link is Down\n",
4195                                netdev->name);
4196                         netif_carrier_off(netdev);
4197
4198                         igb_ping_all_vfs(adapter);
4199
4200                         /* link state has changed, schedule phy info update */
4201                         if (!test_bit(__IGB_DOWN, &adapter->state))
4202                                 mod_timer(&adapter->phy_info_timer,
4203                                           round_jiffies(jiffies + 2 * HZ));
4204
4205                         /* link is down, time to check for alternate media */
4206                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4207                                 igb_check_swap_media(adapter);
4208                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4209                                         schedule_work(&adapter->reset_task);
4210                                         /* return immediately */
4211                                         return;
4212                                 }
4213                         }
4214                         pm_schedule_suspend(netdev->dev.parent,
4215                                             MSEC_PER_SEC * 5);
4216
4217                 /* also check for alternate media here */
4218                 } else if (!netif_carrier_ok(netdev) &&
4219                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4220                         igb_check_swap_media(adapter);
4221                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4222                                 schedule_work(&adapter->reset_task);
4223                                 /* return immediately */
4224                                 return;
4225                         }
4226                 }
4227         }
4228
4229         spin_lock(&adapter->stats64_lock);
4230         igb_update_stats(adapter, &adapter->stats64);
4231         spin_unlock(&adapter->stats64_lock);
4232
4233         for (i = 0; i < adapter->num_tx_queues; i++) {
4234                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4235                 if (!netif_carrier_ok(netdev)) {
4236                         /* We've lost link, so the controller stops DMA,
4237                          * but we've got queued Tx work that's never going
4238                          * to get done, so reset controller to flush Tx.
4239                          * (Do the reset outside of interrupt context).
4240                          */
4241                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4242                                 adapter->tx_timeout_count++;
4243                                 schedule_work(&adapter->reset_task);
4244                                 /* return immediately since reset is imminent */
4245                                 return;
4246                         }
4247                 }
4248
4249                 /* Force detection of hung controller every watchdog period */
4250                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4251         }
4252
4253         /* Cause software interrupt to ensure Rx ring is cleaned */
4254         if (adapter->msix_entries) {
4255                 u32 eics = 0;
4256                 for (i = 0; i < adapter->num_q_vectors; i++)
4257                         eics |= adapter->q_vector[i]->eims_value;
4258                 wr32(E1000_EICS, eics);
4259         } else {
4260                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
4261         }
4262
4263         igb_spoof_check(adapter);
4264         igb_ptp_rx_hang(adapter);
4265
4266         /* Reset the timer */
4267         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4268                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4269                         mod_timer(&adapter->watchdog_timer,
4270                                   round_jiffies(jiffies +  HZ));
4271                 else
4272                         mod_timer(&adapter->watchdog_timer,
4273                                   round_jiffies(jiffies + 2 * HZ));
4274         }
4275 }
4276
4277 enum latency_range {
4278         lowest_latency = 0,
4279         low_latency = 1,
4280         bulk_latency = 2,
4281         latency_invalid = 255
4282 };
4283
4284 /**
4285  *  igb_update_ring_itr - update the dynamic ITR value based on packet size
4286  *  @q_vector: pointer to q_vector
4287  *
4288  *  Stores a new ITR value based on strictly on packet size.  This
4289  *  algorithm is less sophisticated than that used in igb_update_itr,
4290  *  due to the difficulty of synchronizing statistics across multiple
4291  *  receive rings.  The divisors and thresholds used by this function
4292  *  were determined based on theoretical maximum wire speed and testing
4293  *  data, in order to minimize response time while increasing bulk
4294  *  throughput.
4295  *  This functionality is controlled by the InterruptThrottleRate module
4296  *  parameter (see igb_param.c)
4297  *  NOTE:  This function is called only when operating in a multiqueue
4298  *         receive environment.
4299  **/
4300 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4301 {
4302         int new_val = q_vector->itr_val;
4303         int avg_wire_size = 0;
4304         struct igb_adapter *adapter = q_vector->adapter;
4305         unsigned int packets;
4306
4307         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4308          * ints/sec - ITR timer value of 120 ticks.
4309          */
4310         if (adapter->link_speed != SPEED_1000) {
4311                 new_val = IGB_4K_ITR;
4312                 goto set_itr_val;
4313         }
4314
4315         packets = q_vector->rx.total_packets;
4316         if (packets)
4317                 avg_wire_size = q_vector->rx.total_bytes / packets;
4318
4319         packets = q_vector->tx.total_packets;
4320         if (packets)
4321                 avg_wire_size = max_t(u32, avg_wire_size,
4322                                       q_vector->tx.total_bytes / packets);
4323
4324         /* if avg_wire_size isn't set no work was done */
4325         if (!avg_wire_size)
4326                 goto clear_counts;
4327
4328         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4329         avg_wire_size += 24;
4330
4331         /* Don't starve jumbo frames */
4332         avg_wire_size = min(avg_wire_size, 3000);
4333
4334         /* Give a little boost to mid-size frames */
4335         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4336                 new_val = avg_wire_size / 3;
4337         else
4338                 new_val = avg_wire_size / 2;
4339
4340         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4341         if (new_val < IGB_20K_ITR &&
4342             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4343              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4344                 new_val = IGB_20K_ITR;
4345
4346 set_itr_val:
4347         if (new_val != q_vector->itr_val) {
4348                 q_vector->itr_val = new_val;
4349                 q_vector->set_itr = 1;
4350         }
4351 clear_counts:
4352         q_vector->rx.total_bytes = 0;
4353         q_vector->rx.total_packets = 0;
4354         q_vector->tx.total_bytes = 0;
4355         q_vector->tx.total_packets = 0;
4356 }
4357
4358 /**
4359  *  igb_update_itr - update the dynamic ITR value based on statistics
4360  *  @q_vector: pointer to q_vector
4361  *  @ring_container: ring info to update the itr for
4362  *
4363  *  Stores a new ITR value based on packets and byte
4364  *  counts during the last interrupt.  The advantage of per interrupt
4365  *  computation is faster updates and more accurate ITR for the current
4366  *  traffic pattern.  Constants in this function were computed
4367  *  based on theoretical maximum wire speed and thresholds were set based
4368  *  on testing data as well as attempting to minimize response time
4369  *  while increasing bulk throughput.
4370  *  this functionality is controlled by the InterruptThrottleRate module
4371  *  parameter (see igb_param.c)
4372  *  NOTE:  These calculations are only valid when operating in a single-
4373  *         queue environment.
4374  **/
4375 static void igb_update_itr(struct igb_q_vector *q_vector,
4376                            struct igb_ring_container *ring_container)
4377 {
4378         unsigned int packets = ring_container->total_packets;
4379         unsigned int bytes = ring_container->total_bytes;
4380         u8 itrval = ring_container->itr;
4381
4382         /* no packets, exit with status unchanged */
4383         if (packets == 0)
4384                 return;
4385
4386         switch (itrval) {
4387         case lowest_latency:
4388                 /* handle TSO and jumbo frames */
4389                 if (bytes/packets > 8000)
4390                         itrval = bulk_latency;
4391                 else if ((packets < 5) && (bytes > 512))
4392                         itrval = low_latency;
4393                 break;
4394         case low_latency:  /* 50 usec aka 20000 ints/s */
4395                 if (bytes > 10000) {
4396                         /* this if handles the TSO accounting */
4397                         if (bytes/packets > 8000) {
4398                                 itrval = bulk_latency;
4399                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4400                                 itrval = bulk_latency;
4401                         } else if ((packets > 35)) {
4402                                 itrval = lowest_latency;
4403                         }
4404                 } else if (bytes/packets > 2000) {
4405                         itrval = bulk_latency;
4406                 } else if (packets <= 2 && bytes < 512) {
4407                         itrval = lowest_latency;
4408                 }
4409                 break;
4410         case bulk_latency: /* 250 usec aka 4000 ints/s */
4411                 if (bytes > 25000) {
4412                         if (packets > 35)
4413                                 itrval = low_latency;
4414                 } else if (bytes < 1500) {
4415                         itrval = low_latency;
4416                 }
4417                 break;
4418         }
4419
4420         /* clear work counters since we have the values we need */
4421         ring_container->total_bytes = 0;
4422         ring_container->total_packets = 0;
4423
4424         /* write updated itr to ring container */
4425         ring_container->itr = itrval;
4426 }
4427
4428 static void igb_set_itr(struct igb_q_vector *q_vector)
4429 {
4430         struct igb_adapter *adapter = q_vector->adapter;
4431         u32 new_itr = q_vector->itr_val;
4432         u8 current_itr = 0;
4433
4434         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4435         if (adapter->link_speed != SPEED_1000) {
4436                 current_itr = 0;
4437                 new_itr = IGB_4K_ITR;
4438                 goto set_itr_now;
4439         }
4440
4441         igb_update_itr(q_vector, &q_vector->tx);
4442         igb_update_itr(q_vector, &q_vector->rx);
4443
4444         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
4445
4446         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4447         if (current_itr == lowest_latency &&
4448             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4449              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4450                 current_itr = low_latency;
4451
4452         switch (current_itr) {
4453         /* counts and packets in update_itr are dependent on these numbers */
4454         case lowest_latency:
4455                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
4456                 break;
4457         case low_latency:
4458                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
4459                 break;
4460         case bulk_latency:
4461                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
4462                 break;
4463         default:
4464                 break;
4465         }
4466
4467 set_itr_now:
4468         if (new_itr != q_vector->itr_val) {
4469                 /* this attempts to bias the interrupt rate towards Bulk
4470                  * by adding intermediate steps when interrupt rate is
4471                  * increasing
4472                  */
4473                 new_itr = new_itr > q_vector->itr_val ?
4474                           max((new_itr * q_vector->itr_val) /
4475                           (new_itr + (q_vector->itr_val >> 2)),
4476                           new_itr) : new_itr;
4477                 /* Don't write the value here; it resets the adapter's
4478                  * internal timer, and causes us to delay far longer than
4479                  * we should between interrupts.  Instead, we write the ITR
4480                  * value at the beginning of the next interrupt so the timing
4481                  * ends up being correct.
4482                  */
4483                 q_vector->itr_val = new_itr;
4484                 q_vector->set_itr = 1;
4485         }
4486 }
4487
4488 static void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
4489                             u32 type_tucmd, u32 mss_l4len_idx)
4490 {
4491         struct e1000_adv_tx_context_desc *context_desc;
4492         u16 i = tx_ring->next_to_use;
4493
4494         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
4495
4496         i++;
4497         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
4498
4499         /* set bits to identify this as an advanced context descriptor */
4500         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
4501
4502         /* For 82575, context index must be unique per ring. */
4503         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4504                 mss_l4len_idx |= tx_ring->reg_idx << 4;
4505
4506         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
4507         context_desc->seqnum_seed       = 0;
4508         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
4509         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
4510 }
4511
4512 static int igb_tso(struct igb_ring *tx_ring,
4513                    struct igb_tx_buffer *first,
4514                    u8 *hdr_len)
4515 {
4516         struct sk_buff *skb = first->skb;
4517         u32 vlan_macip_lens, type_tucmd;
4518         u32 mss_l4len_idx, l4len;
4519
4520         if (skb->ip_summed != CHECKSUM_PARTIAL)
4521                 return 0;
4522
4523         if (!skb_is_gso(skb))
4524                 return 0;
4525
4526         if (skb_header_cloned(skb)) {
4527                 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4528                 if (err)
4529                         return err;
4530         }
4531
4532         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4533         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
4534
4535         if (first->protocol == __constant_htons(ETH_P_IP)) {
4536                 struct iphdr *iph = ip_hdr(skb);
4537                 iph->tot_len = 0;
4538                 iph->check = 0;
4539                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
4540                                                          iph->daddr, 0,
4541                                                          IPPROTO_TCP,
4542                                                          0);
4543                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4544                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4545                                    IGB_TX_FLAGS_CSUM |
4546                                    IGB_TX_FLAGS_IPV4;
4547         } else if (skb_is_gso_v6(skb)) {
4548                 ipv6_hdr(skb)->payload_len = 0;
4549                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4550                                                        &ipv6_hdr(skb)->daddr,
4551                                                        0, IPPROTO_TCP, 0);
4552                 first->tx_flags |= IGB_TX_FLAGS_TSO |
4553                                    IGB_TX_FLAGS_CSUM;
4554         }
4555
4556         /* compute header lengths */
4557         l4len = tcp_hdrlen(skb);
4558         *hdr_len = skb_transport_offset(skb) + l4len;
4559
4560         /* update gso size and bytecount with header size */
4561         first->gso_segs = skb_shinfo(skb)->gso_segs;
4562         first->bytecount += (first->gso_segs - 1) * *hdr_len;
4563
4564         /* MSS L4LEN IDX */
4565         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
4566         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
4567
4568         /* VLAN MACLEN IPLEN */
4569         vlan_macip_lens = skb_network_header_len(skb);
4570         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4571         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4572
4573         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4574
4575         return 1;
4576 }
4577
4578 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
4579 {
4580         struct sk_buff *skb = first->skb;
4581         u32 vlan_macip_lens = 0;
4582         u32 mss_l4len_idx = 0;
4583         u32 type_tucmd = 0;
4584
4585         if (skb->ip_summed != CHECKSUM_PARTIAL) {
4586                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
4587                         return;
4588         } else {
4589                 u8 l4_hdr = 0;
4590                 switch (first->protocol) {
4591                 case __constant_htons(ETH_P_IP):
4592                         vlan_macip_lens |= skb_network_header_len(skb);
4593                         type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
4594                         l4_hdr = ip_hdr(skb)->protocol;
4595                         break;
4596                 case __constant_htons(ETH_P_IPV6):
4597                         vlan_macip_lens |= skb_network_header_len(skb);
4598                         l4_hdr = ipv6_hdr(skb)->nexthdr;
4599                         break;
4600                 default:
4601                         if (unlikely(net_ratelimit())) {
4602                                 dev_warn(tx_ring->dev,
4603                                          "partial checksum but proto=%x!\n",
4604                                          first->protocol);
4605                         }
4606                         break;
4607                 }
4608
4609                 switch (l4_hdr) {
4610                 case IPPROTO_TCP:
4611                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
4612                         mss_l4len_idx = tcp_hdrlen(skb) <<
4613                                         E1000_ADVTXD_L4LEN_SHIFT;
4614                         break;
4615                 case IPPROTO_SCTP:
4616                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
4617                         mss_l4len_idx = sizeof(struct sctphdr) <<
4618                                         E1000_ADVTXD_L4LEN_SHIFT;
4619                         break;
4620                 case IPPROTO_UDP:
4621                         mss_l4len_idx = sizeof(struct udphdr) <<
4622                                         E1000_ADVTXD_L4LEN_SHIFT;
4623                         break;
4624                 default:
4625                         if (unlikely(net_ratelimit())) {
4626                                 dev_warn(tx_ring->dev,
4627                                          "partial checksum but l4 proto=%x!\n",
4628                                          l4_hdr);
4629                         }
4630                         break;
4631                 }
4632
4633                 /* update TX checksum flag */
4634                 first->tx_flags |= IGB_TX_FLAGS_CSUM;
4635         }
4636
4637         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
4638         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
4639
4640         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
4641 }
4642
4643 #define IGB_SET_FLAG(_input, _flag, _result) \
4644         ((_flag <= _result) ? \
4645          ((u32)(_input & _flag) * (_result / _flag)) : \
4646          ((u32)(_input & _flag) / (_flag / _result)))
4647
4648 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
4649 {
4650         /* set type for advanced descriptor with frame checksum insertion */
4651         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
4652                        E1000_ADVTXD_DCMD_DEXT |
4653                        E1000_ADVTXD_DCMD_IFCS;
4654
4655         /* set HW vlan bit if vlan is present */
4656         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
4657                                  (E1000_ADVTXD_DCMD_VLE));
4658
4659         /* set segmentation bits for TSO */
4660         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
4661                                  (E1000_ADVTXD_DCMD_TSE));
4662
4663         /* set timestamp bit if present */
4664         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
4665                                  (E1000_ADVTXD_MAC_TSTAMP));
4666
4667         /* insert frame checksum */
4668         cmd_type ^= IGB_SET_FLAG(skb->no_fcs, 1, E1000_ADVTXD_DCMD_IFCS);
4669
4670         return cmd_type;
4671 }
4672
4673 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
4674                                  union e1000_adv_tx_desc *tx_desc,
4675                                  u32 tx_flags, unsigned int paylen)
4676 {
4677         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
4678
4679         /* 82575 requires a unique index per ring */
4680         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
4681                 olinfo_status |= tx_ring->reg_idx << 4;
4682
4683         /* insert L4 checksum */
4684         olinfo_status |= IGB_SET_FLAG(tx_flags,
4685                                       IGB_TX_FLAGS_CSUM,
4686                                       (E1000_TXD_POPTS_TXSM << 8));
4687
4688         /* insert IPv4 checksum */
4689         olinfo_status |= IGB_SET_FLAG(tx_flags,
4690                                       IGB_TX_FLAGS_IPV4,
4691                                       (E1000_TXD_POPTS_IXSM << 8));
4692
4693         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
4694 }
4695
4696 static void igb_tx_map(struct igb_ring *tx_ring,
4697                        struct igb_tx_buffer *first,
4698                        const u8 hdr_len)
4699 {
4700         struct sk_buff *skb = first->skb;
4701         struct igb_tx_buffer *tx_buffer;
4702         union e1000_adv_tx_desc *tx_desc;
4703         struct skb_frag_struct *frag;
4704         dma_addr_t dma;
4705         unsigned int data_len, size;
4706         u32 tx_flags = first->tx_flags;
4707         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
4708         u16 i = tx_ring->next_to_use;
4709
4710         tx_desc = IGB_TX_DESC(tx_ring, i);
4711
4712         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
4713
4714         size = skb_headlen(skb);
4715         data_len = skb->data_len;
4716
4717         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
4718
4719         tx_buffer = first;
4720
4721         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
4722                 if (dma_mapping_error(tx_ring->dev, dma))
4723                         goto dma_error;
4724
4725                 /* record length, and DMA address */
4726                 dma_unmap_len_set(tx_buffer, len, size);
4727                 dma_unmap_addr_set(tx_buffer, dma, dma);
4728
4729                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
4730
4731                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
4732                         tx_desc->read.cmd_type_len =
4733                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
4734
4735                         i++;
4736                         tx_desc++;
4737                         if (i == tx_ring->count) {
4738                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
4739                                 i = 0;
4740                         }
4741                         tx_desc->read.olinfo_status = 0;
4742
4743                         dma += IGB_MAX_DATA_PER_TXD;
4744                         size -= IGB_MAX_DATA_PER_TXD;
4745
4746                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
4747                 }
4748
4749                 if (likely(!data_len))
4750                         break;
4751
4752                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
4753
4754                 i++;
4755                 tx_desc++;
4756                 if (i == tx_ring->count) {
4757                         tx_desc = IGB_TX_DESC(tx_ring, 0);
4758                         i = 0;
4759                 }
4760                 tx_desc->read.olinfo_status = 0;
4761
4762                 size = skb_frag_size(frag);
4763                 data_len -= size;
4764
4765                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
4766                                        size, DMA_TO_DEVICE);
4767
4768                 tx_buffer = &tx_ring->tx_buffer_info[i];
4769         }
4770
4771         /* write last descriptor with RS and EOP bits */
4772         cmd_type |= size | IGB_TXD_DCMD;
4773         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
4774
4775         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
4776
4777         /* set the timestamp */
4778         first->time_stamp = jiffies;
4779
4780         /* Force memory writes to complete before letting h/w know there
4781          * are new descriptors to fetch.  (Only applicable for weak-ordered
4782          * memory model archs, such as IA-64).
4783          *
4784          * We also need this memory barrier to make certain all of the
4785          * status bits have been updated before next_to_watch is written.
4786          */
4787         wmb();
4788
4789         /* set next_to_watch value indicating a packet is present */
4790         first->next_to_watch = tx_desc;
4791
4792         i++;
4793         if (i == tx_ring->count)
4794                 i = 0;
4795
4796         tx_ring->next_to_use = i;
4797
4798         writel(i, tx_ring->tail);
4799
4800         /* we need this if more than one processor can write to our tail
4801          * at a time, it synchronizes IO on IA64/Altix systems
4802          */
4803         mmiowb();
4804
4805         return;
4806
4807 dma_error:
4808         dev_err(tx_ring->dev, "TX DMA map failed\n");
4809
4810         /* clear dma mappings for failed tx_buffer_info map */
4811         for (;;) {
4812                 tx_buffer = &tx_ring->tx_buffer_info[i];
4813                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
4814                 if (tx_buffer == first)
4815                         break;
4816                 if (i == 0)
4817                         i = tx_ring->count;
4818                 i--;
4819         }
4820
4821         tx_ring->next_to_use = i;
4822 }
4823
4824 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4825 {
4826         struct net_device *netdev = tx_ring->netdev;
4827
4828         netif_stop_subqueue(netdev, tx_ring->queue_index);
4829
4830         /* Herbert's original patch had:
4831          *  smp_mb__after_netif_stop_queue();
4832          * but since that doesn't exist yet, just open code it.
4833          */
4834         smp_mb();
4835
4836         /* We need to check again in a case another CPU has just
4837          * made room available.
4838          */
4839         if (igb_desc_unused(tx_ring) < size)
4840                 return -EBUSY;
4841
4842         /* A reprieve! */
4843         netif_wake_subqueue(netdev, tx_ring->queue_index);
4844
4845         u64_stats_update_begin(&tx_ring->tx_syncp2);
4846         tx_ring->tx_stats.restart_queue2++;
4847         u64_stats_update_end(&tx_ring->tx_syncp2);
4848
4849         return 0;
4850 }
4851
4852 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
4853 {
4854         if (igb_desc_unused(tx_ring) >= size)
4855                 return 0;
4856         return __igb_maybe_stop_tx(tx_ring, size);
4857 }
4858
4859 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
4860                                 struct igb_ring *tx_ring)
4861 {
4862         struct igb_tx_buffer *first;
4863         int tso;
4864         u32 tx_flags = 0;
4865         u16 count = TXD_USE_COUNT(skb_headlen(skb));
4866         __be16 protocol = vlan_get_protocol(skb);
4867         u8 hdr_len = 0;
4868
4869         /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
4870          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
4871          *       + 2 desc gap to keep tail from touching head,
4872          *       + 1 desc for context descriptor,
4873          * otherwise try next time
4874          */
4875         if (NETDEV_FRAG_PAGE_MAX_SIZE > IGB_MAX_DATA_PER_TXD) {
4876                 unsigned short f;
4877                 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
4878                         count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
4879         } else {
4880                 count += skb_shinfo(skb)->nr_frags;
4881         }
4882
4883         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
4884                 /* this is a hard error */
4885                 return NETDEV_TX_BUSY;
4886         }
4887
4888         /* record the location of the first descriptor for this packet */
4889         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
4890         first->skb = skb;
4891         first->bytecount = skb->len;
4892         first->gso_segs = 1;
4893
4894         skb_tx_timestamp(skb);
4895
4896         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
4897                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
4898
4899                 if (!(adapter->ptp_tx_skb)) {
4900                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
4901                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
4902
4903                         adapter->ptp_tx_skb = skb_get(skb);
4904                         adapter->ptp_tx_start = jiffies;
4905                         if (adapter->hw.mac.type == e1000_82576)
4906                                 schedule_work(&adapter->ptp_tx_work);
4907                 }
4908         }
4909
4910         if (vlan_tx_tag_present(skb)) {
4911                 tx_flags |= IGB_TX_FLAGS_VLAN;
4912                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
4913         }
4914
4915         /* record initial flags and protocol */
4916         first->tx_flags = tx_flags;
4917         first->protocol = protocol;
4918
4919         tso = igb_tso(tx_ring, first, &hdr_len);
4920         if (tso < 0)
4921                 goto out_drop;
4922         else if (!tso)
4923                 igb_tx_csum(tx_ring, first);
4924
4925         igb_tx_map(tx_ring, first, hdr_len);
4926
4927         /* Make sure there is space in the ring for the next send. */
4928         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
4929
4930         return NETDEV_TX_OK;
4931
4932 out_drop:
4933         igb_unmap_and_free_tx_resource(tx_ring, first);
4934
4935         return NETDEV_TX_OK;
4936 }
4937
4938 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
4939                                                     struct sk_buff *skb)
4940 {
4941         unsigned int r_idx = skb->queue_mapping;
4942
4943         if (r_idx >= adapter->num_tx_queues)
4944                 r_idx = r_idx % adapter->num_tx_queues;
4945
4946         return adapter->tx_ring[r_idx];
4947 }
4948
4949 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
4950                                   struct net_device *netdev)
4951 {
4952         struct igb_adapter *adapter = netdev_priv(netdev);
4953
4954         if (test_bit(__IGB_DOWN, &adapter->state)) {
4955                 dev_kfree_skb_any(skb);
4956                 return NETDEV_TX_OK;
4957         }
4958
4959         if (skb->len <= 0) {
4960                 dev_kfree_skb_any(skb);
4961                 return NETDEV_TX_OK;
4962         }
4963
4964         /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
4965          * in order to meet this minimum size requirement.
4966          */
4967         if (unlikely(skb->len < 17)) {
4968                 if (skb_pad(skb, 17 - skb->len))
4969                         return NETDEV_TX_OK;
4970                 skb->len = 17;
4971                 skb_set_tail_pointer(skb, 17);
4972         }
4973
4974         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
4975 }
4976
4977 /**
4978  *  igb_tx_timeout - Respond to a Tx Hang
4979  *  @netdev: network interface device structure
4980  **/
4981 static void igb_tx_timeout(struct net_device *netdev)
4982 {
4983         struct igb_adapter *adapter = netdev_priv(netdev);
4984         struct e1000_hw *hw = &adapter->hw;
4985
4986         /* Do the reset outside of interrupt context */
4987         adapter->tx_timeout_count++;
4988
4989         if (hw->mac.type >= e1000_82580)
4990                 hw->dev_spec._82575.global_device_reset = true;
4991
4992         schedule_work(&adapter->reset_task);
4993         wr32(E1000_EICS,
4994              (adapter->eims_enable_mask & ~adapter->eims_other));
4995 }
4996
4997 static void igb_reset_task(struct work_struct *work)
4998 {
4999         struct igb_adapter *adapter;
5000         adapter = container_of(work, struct igb_adapter, reset_task);
5001
5002         igb_dump(adapter);
5003         netdev_err(adapter->netdev, "Reset adapter\n");
5004         igb_reinit_locked(adapter);
5005 }
5006
5007 /**
5008  *  igb_get_stats64 - Get System Network Statistics
5009  *  @netdev: network interface device structure
5010  *  @stats: rtnl_link_stats64 pointer
5011  **/
5012 static struct rtnl_link_stats64 *igb_get_stats64(struct net_device *netdev,
5013                                                 struct rtnl_link_stats64 *stats)
5014 {
5015         struct igb_adapter *adapter = netdev_priv(netdev);
5016
5017         spin_lock(&adapter->stats64_lock);
5018         igb_update_stats(adapter, &adapter->stats64);
5019         memcpy(stats, &adapter->stats64, sizeof(*stats));
5020         spin_unlock(&adapter->stats64_lock);
5021
5022         return stats;
5023 }
5024
5025 /**
5026  *  igb_change_mtu - Change the Maximum Transfer Unit
5027  *  @netdev: network interface device structure
5028  *  @new_mtu: new value for maximum frame size
5029  *
5030  *  Returns 0 on success, negative on failure
5031  **/
5032 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5033 {
5034         struct igb_adapter *adapter = netdev_priv(netdev);
5035         struct pci_dev *pdev = adapter->pdev;
5036         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5037
5038         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5039                 dev_err(&pdev->dev, "Invalid MTU setting\n");
5040                 return -EINVAL;
5041         }
5042
5043 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5044         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5045                 dev_err(&pdev->dev, "MTU > 9216 not supported.\n");
5046                 return -EINVAL;
5047         }
5048
5049         /* adjust max frame to be at least the size of a standard frame */
5050         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5051                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5052
5053         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5054                 msleep(1);
5055
5056         /* igb_down has a dependency on max_frame_size */
5057         adapter->max_frame_size = max_frame;
5058
5059         if (netif_running(netdev))
5060                 igb_down(adapter);
5061
5062         dev_info(&pdev->dev, "changing MTU from %d to %d\n",
5063                  netdev->mtu, new_mtu);
5064         netdev->mtu = new_mtu;
5065
5066         if (netif_running(netdev))
5067                 igb_up(adapter);
5068         else
5069                 igb_reset(adapter);
5070
5071         clear_bit(__IGB_RESETTING, &adapter->state);
5072
5073         return 0;
5074 }
5075
5076 /**
5077  *  igb_update_stats - Update the board statistics counters
5078  *  @adapter: board private structure
5079  **/
5080 void igb_update_stats(struct igb_adapter *adapter,
5081                       struct rtnl_link_stats64 *net_stats)
5082 {
5083         struct e1000_hw *hw = &adapter->hw;
5084         struct pci_dev *pdev = adapter->pdev;
5085         u32 reg, mpc;
5086         u16 phy_tmp;
5087         int i;
5088         u64 bytes, packets;
5089         unsigned int start;
5090         u64 _bytes, _packets;
5091
5092 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5093
5094         /* Prevent stats update while adapter is being reset, or if the pci
5095          * connection is down.
5096          */
5097         if (adapter->link_speed == 0)
5098                 return;
5099         if (pci_channel_offline(pdev))
5100                 return;
5101
5102         bytes = 0;
5103         packets = 0;
5104
5105         rcu_read_lock();
5106         for (i = 0; i < adapter->num_rx_queues; i++) {
5107                 u32 rqdpc = rd32(E1000_RQDPC(i));
5108                 struct igb_ring *ring = adapter->rx_ring[i];
5109
5110                 if (rqdpc) {
5111                         ring->rx_stats.drops += rqdpc;
5112                         net_stats->rx_fifo_errors += rqdpc;
5113                 }
5114
5115                 do {
5116                         start = u64_stats_fetch_begin_bh(&ring->rx_syncp);
5117                         _bytes = ring->rx_stats.bytes;
5118                         _packets = ring->rx_stats.packets;
5119                 } while (u64_stats_fetch_retry_bh(&ring->rx_syncp, start));
5120                 bytes += _bytes;
5121                 packets += _packets;
5122         }
5123
5124         net_stats->rx_bytes = bytes;
5125         net_stats->rx_packets = packets;
5126
5127         bytes = 0;
5128         packets = 0;
5129         for (i = 0; i < adapter->num_tx_queues; i++) {
5130                 struct igb_ring *ring = adapter->tx_ring[i];
5131                 do {
5132                         start = u64_stats_fetch_begin_bh(&ring->tx_syncp);
5133                         _bytes = ring->tx_stats.bytes;
5134                         _packets = ring->tx_stats.packets;
5135                 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp, start));
5136                 bytes += _bytes;
5137                 packets += _packets;
5138         }
5139         net_stats->tx_bytes = bytes;
5140         net_stats->tx_packets = packets;
5141         rcu_read_unlock();
5142
5143         /* read stats registers */
5144         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
5145         adapter->stats.gprc += rd32(E1000_GPRC);
5146         adapter->stats.gorc += rd32(E1000_GORCL);
5147         rd32(E1000_GORCH); /* clear GORCL */
5148         adapter->stats.bprc += rd32(E1000_BPRC);
5149         adapter->stats.mprc += rd32(E1000_MPRC);
5150         adapter->stats.roc += rd32(E1000_ROC);
5151
5152         adapter->stats.prc64 += rd32(E1000_PRC64);
5153         adapter->stats.prc127 += rd32(E1000_PRC127);
5154         adapter->stats.prc255 += rd32(E1000_PRC255);
5155         adapter->stats.prc511 += rd32(E1000_PRC511);
5156         adapter->stats.prc1023 += rd32(E1000_PRC1023);
5157         adapter->stats.prc1522 += rd32(E1000_PRC1522);
5158         adapter->stats.symerrs += rd32(E1000_SYMERRS);
5159         adapter->stats.sec += rd32(E1000_SEC);
5160
5161         mpc = rd32(E1000_MPC);
5162         adapter->stats.mpc += mpc;
5163         net_stats->rx_fifo_errors += mpc;
5164         adapter->stats.scc += rd32(E1000_SCC);
5165         adapter->stats.ecol += rd32(E1000_ECOL);
5166         adapter->stats.mcc += rd32(E1000_MCC);
5167         adapter->stats.latecol += rd32(E1000_LATECOL);
5168         adapter->stats.dc += rd32(E1000_DC);
5169         adapter->stats.rlec += rd32(E1000_RLEC);
5170         adapter->stats.xonrxc += rd32(E1000_XONRXC);
5171         adapter->stats.xontxc += rd32(E1000_XONTXC);
5172         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
5173         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
5174         adapter->stats.fcruc += rd32(E1000_FCRUC);
5175         adapter->stats.gptc += rd32(E1000_GPTC);
5176         adapter->stats.gotc += rd32(E1000_GOTCL);
5177         rd32(E1000_GOTCH); /* clear GOTCL */
5178         adapter->stats.rnbc += rd32(E1000_RNBC);
5179         adapter->stats.ruc += rd32(E1000_RUC);
5180         adapter->stats.rfc += rd32(E1000_RFC);
5181         adapter->stats.rjc += rd32(E1000_RJC);
5182         adapter->stats.tor += rd32(E1000_TORH);
5183         adapter->stats.tot += rd32(E1000_TOTH);
5184         adapter->stats.tpr += rd32(E1000_TPR);
5185
5186         adapter->stats.ptc64 += rd32(E1000_PTC64);
5187         adapter->stats.ptc127 += rd32(E1000_PTC127);
5188         adapter->stats.ptc255 += rd32(E1000_PTC255);
5189         adapter->stats.ptc511 += rd32(E1000_PTC511);
5190         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
5191         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
5192
5193         adapter->stats.mptc += rd32(E1000_MPTC);
5194         adapter->stats.bptc += rd32(E1000_BPTC);
5195
5196         adapter->stats.tpt += rd32(E1000_TPT);
5197         adapter->stats.colc += rd32(E1000_COLC);
5198
5199         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
5200         /* read internal phy specific stats */
5201         reg = rd32(E1000_CTRL_EXT);
5202         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5203                 adapter->stats.rxerrc += rd32(E1000_RXERRC);
5204
5205                 /* this stat has invalid values on i210/i211 */
5206                 if ((hw->mac.type != e1000_i210) &&
5207                     (hw->mac.type != e1000_i211))
5208                         adapter->stats.tncrs += rd32(E1000_TNCRS);
5209         }
5210
5211         adapter->stats.tsctc += rd32(E1000_TSCTC);
5212         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
5213
5214         adapter->stats.iac += rd32(E1000_IAC);
5215         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
5216         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
5217         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
5218         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
5219         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
5220         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
5221         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
5222         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
5223
5224         /* Fill out the OS statistics structure */
5225         net_stats->multicast = adapter->stats.mprc;
5226         net_stats->collisions = adapter->stats.colc;
5227
5228         /* Rx Errors */
5229
5230         /* RLEC on some newer hardware can be incorrect so build
5231          * our own version based on RUC and ROC
5232          */
5233         net_stats->rx_errors = adapter->stats.rxerrc +
5234                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5235                 adapter->stats.ruc + adapter->stats.roc +
5236                 adapter->stats.cexterr;
5237         net_stats->rx_length_errors = adapter->stats.ruc +
5238                                       adapter->stats.roc;
5239         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5240         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5241         net_stats->rx_missed_errors = adapter->stats.mpc;
5242
5243         /* Tx Errors */
5244         net_stats->tx_errors = adapter->stats.ecol +
5245                                adapter->stats.latecol;
5246         net_stats->tx_aborted_errors = adapter->stats.ecol;
5247         net_stats->tx_window_errors = adapter->stats.latecol;
5248         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5249
5250         /* Tx Dropped needs to be maintained elsewhere */
5251
5252         /* Phy Stats */
5253         if (hw->phy.media_type == e1000_media_type_copper) {
5254                 if ((adapter->link_speed == SPEED_1000) &&
5255                    (!igb_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5256                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5257                         adapter->phy_stats.idle_errors += phy_tmp;
5258                 }
5259         }
5260
5261         /* Management Stats */
5262         adapter->stats.mgptc += rd32(E1000_MGTPTC);
5263         adapter->stats.mgprc += rd32(E1000_MGTPRC);
5264         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
5265
5266         /* OS2BMC Stats */
5267         reg = rd32(E1000_MANC);
5268         if (reg & E1000_MANC_EN_BMC2OS) {
5269                 adapter->stats.o2bgptc += rd32(E1000_O2BGPTC);
5270                 adapter->stats.o2bspc += rd32(E1000_O2BSPC);
5271                 adapter->stats.b2ospc += rd32(E1000_B2OSPC);
5272                 adapter->stats.b2ogprc += rd32(E1000_B2OGPRC);
5273         }
5274 }
5275
5276 static irqreturn_t igb_msix_other(int irq, void *data)
5277 {
5278         struct igb_adapter *adapter = data;
5279         struct e1000_hw *hw = &adapter->hw;
5280         u32 icr = rd32(E1000_ICR);
5281         /* reading ICR causes bit 31 of EICR to be cleared */
5282
5283         if (icr & E1000_ICR_DRSTA)
5284                 schedule_work(&adapter->reset_task);
5285
5286         if (icr & E1000_ICR_DOUTSYNC) {
5287                 /* HW is reporting DMA is out of sync */
5288                 adapter->stats.doosync++;
5289                 /* The DMA Out of Sync is also indication of a spoof event
5290                  * in IOV mode. Check the Wrong VM Behavior register to
5291                  * see if it is really a spoof event.
5292                  */
5293                 igb_check_wvbr(adapter);
5294         }
5295
5296         /* Check for a mailbox event */
5297         if (icr & E1000_ICR_VMMB)
5298                 igb_msg_task(adapter);
5299
5300         if (icr & E1000_ICR_LSC) {
5301                 hw->mac.get_link_status = 1;
5302                 /* guard against interrupt when we're going down */
5303                 if (!test_bit(__IGB_DOWN, &adapter->state))
5304                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5305         }
5306
5307         if (icr & E1000_ICR_TS) {
5308                 u32 tsicr = rd32(E1000_TSICR);
5309
5310                 if (tsicr & E1000_TSICR_TXTS) {
5311                         /* acknowledge the interrupt */
5312                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
5313                         /* retrieve hardware timestamp */
5314                         schedule_work(&adapter->ptp_tx_work);
5315                 }
5316         }
5317
5318         wr32(E1000_EIMS, adapter->eims_other);
5319
5320         return IRQ_HANDLED;
5321 }
5322
5323 static void igb_write_itr(struct igb_q_vector *q_vector)
5324 {
5325         struct igb_adapter *adapter = q_vector->adapter;
5326         u32 itr_val = q_vector->itr_val & 0x7FFC;
5327
5328         if (!q_vector->set_itr)
5329                 return;
5330
5331         if (!itr_val)
5332                 itr_val = 0x4;
5333
5334         if (adapter->hw.mac.type == e1000_82575)
5335                 itr_val |= itr_val << 16;
5336         else
5337                 itr_val |= E1000_EITR_CNT_IGNR;
5338
5339         writel(itr_val, q_vector->itr_register);
5340         q_vector->set_itr = 0;
5341 }
5342
5343 static irqreturn_t igb_msix_ring(int irq, void *data)
5344 {
5345         struct igb_q_vector *q_vector = data;
5346
5347         /* Write the ITR value calculated from the previous interrupt. */
5348         igb_write_itr(q_vector);
5349
5350         napi_schedule(&q_vector->napi);
5351
5352         return IRQ_HANDLED;
5353 }
5354
5355 #ifdef CONFIG_IGB_DCA
5356 static void igb_update_tx_dca(struct igb_adapter *adapter,
5357                               struct igb_ring *tx_ring,
5358                               int cpu)
5359 {
5360         struct e1000_hw *hw = &adapter->hw;
5361         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5362
5363         if (hw->mac.type != e1000_82575)
5364                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT;
5365
5366         /* We can enable relaxed ordering for reads, but not writes when
5367          * DCA is enabled.  This is due to a known issue in some chipsets
5368          * which will cause the DCA tag to be cleared.
5369          */
5370         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5371                   E1000_DCA_TXCTRL_DATA_RRO_EN |
5372                   E1000_DCA_TXCTRL_DESC_DCA_EN;
5373
5374         wr32(E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5375 }
5376
5377 static void igb_update_rx_dca(struct igb_adapter *adapter,
5378                               struct igb_ring *rx_ring,
5379                               int cpu)
5380 {
5381         struct e1000_hw *hw = &adapter->hw;
5382         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5383
5384         if (hw->mac.type != e1000_82575)
5385                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT;
5386
5387         /* We can enable relaxed ordering for reads, but not writes when
5388          * DCA is enabled.  This is due to a known issue in some chipsets
5389          * which will cause the DCA tag to be cleared.
5390          */
5391         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
5392                   E1000_DCA_RXCTRL_DESC_DCA_EN;
5393
5394         wr32(E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
5395 }
5396
5397 static void igb_update_dca(struct igb_q_vector *q_vector)
5398 {
5399         struct igb_adapter *adapter = q_vector->adapter;
5400         int cpu = get_cpu();
5401
5402         if (q_vector->cpu == cpu)
5403                 goto out_no_update;
5404
5405         if (q_vector->tx.ring)
5406                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
5407
5408         if (q_vector->rx.ring)
5409                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
5410
5411         q_vector->cpu = cpu;
5412 out_no_update:
5413         put_cpu();
5414 }
5415
5416 static void igb_setup_dca(struct igb_adapter *adapter)
5417 {
5418         struct e1000_hw *hw = &adapter->hw;
5419         int i;
5420
5421         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
5422                 return;
5423
5424         /* Always use CB2 mode, difference is masked in the CB driver. */
5425         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
5426
5427         for (i = 0; i < adapter->num_q_vectors; i++) {
5428                 adapter->q_vector[i]->cpu = -1;
5429                 igb_update_dca(adapter->q_vector[i]);
5430         }
5431 }
5432
5433 static int __igb_notify_dca(struct device *dev, void *data)
5434 {
5435         struct net_device *netdev = dev_get_drvdata(dev);
5436         struct igb_adapter *adapter = netdev_priv(netdev);
5437         struct pci_dev *pdev = adapter->pdev;
5438         struct e1000_hw *hw = &adapter->hw;
5439         unsigned long event = *(unsigned long *)data;
5440
5441         switch (event) {
5442         case DCA_PROVIDER_ADD:
5443                 /* if already enabled, don't do it again */
5444                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
5445                         break;
5446                 if (dca_add_requester(dev) == 0) {
5447                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
5448                         dev_info(&pdev->dev, "DCA enabled\n");
5449                         igb_setup_dca(adapter);
5450                         break;
5451                 }
5452                 /* Fall Through since DCA is disabled. */
5453         case DCA_PROVIDER_REMOVE:
5454                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
5455                         /* without this a class_device is left
5456                          * hanging around in the sysfs model
5457                          */
5458                         dca_remove_requester(dev);
5459                         dev_info(&pdev->dev, "DCA disabled\n");
5460                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
5461                         wr32(E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_DISABLE);
5462                 }
5463                 break;
5464         }
5465
5466         return 0;
5467 }
5468
5469 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
5470                           void *p)
5471 {
5472         int ret_val;
5473
5474         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
5475                                          __igb_notify_dca);
5476
5477         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
5478 }
5479 #endif /* CONFIG_IGB_DCA */
5480
5481 #ifdef CONFIG_PCI_IOV
5482 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
5483 {
5484         unsigned char mac_addr[ETH_ALEN];
5485
5486         eth_zero_addr(mac_addr);
5487         igb_set_vf_mac(adapter, vf, mac_addr);
5488
5489         /* By default spoof check is enabled for all VFs */
5490         adapter->vf_data[vf].spoofchk_enabled = true;
5491
5492         return 0;
5493 }
5494
5495 #endif
5496 static void igb_ping_all_vfs(struct igb_adapter *adapter)
5497 {
5498         struct e1000_hw *hw = &adapter->hw;
5499         u32 ping;
5500         int i;
5501
5502         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
5503                 ping = E1000_PF_CONTROL_MSG;
5504                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
5505                         ping |= E1000_VT_MSGTYPE_CTS;
5506                 igb_write_mbx(hw, &ping, 1, i);
5507         }
5508 }
5509
5510 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5511 {
5512         struct e1000_hw *hw = &adapter->hw;
5513         u32 vmolr = rd32(E1000_VMOLR(vf));
5514         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5515
5516         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
5517                             IGB_VF_FLAG_MULTI_PROMISC);
5518         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5519
5520         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
5521                 vmolr |= E1000_VMOLR_MPME;
5522                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
5523                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
5524         } else {
5525                 /* if we have hashes and we are clearing a multicast promisc
5526                  * flag we need to write the hashes to the MTA as this step
5527                  * was previously skipped
5528                  */
5529                 if (vf_data->num_vf_mc_hashes > 30) {
5530                         vmolr |= E1000_VMOLR_MPME;
5531                 } else if (vf_data->num_vf_mc_hashes) {
5532                         int j;
5533                         vmolr |= E1000_VMOLR_ROMPE;
5534                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5535                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5536                 }
5537         }
5538
5539         wr32(E1000_VMOLR(vf), vmolr);
5540
5541         /* there are flags left unprocessed, likely not supported */
5542         if (*msgbuf & E1000_VT_MSGINFO_MASK)
5543                 return -EINVAL;
5544
5545         return 0;
5546 }
5547
5548 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
5549                                   u32 *msgbuf, u32 vf)
5550 {
5551         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5552         u16 *hash_list = (u16 *)&msgbuf[1];
5553         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5554         int i;
5555
5556         /* salt away the number of multicast addresses assigned
5557          * to this VF for later use to restore when the PF multi cast
5558          * list changes
5559          */
5560         vf_data->num_vf_mc_hashes = n;
5561
5562         /* only up to 30 hash values supported */
5563         if (n > 30)
5564                 n = 30;
5565
5566         /* store the hashes for later use */
5567         for (i = 0; i < n; i++)
5568                 vf_data->vf_mc_hashes[i] = hash_list[i];
5569
5570         /* Flush and reset the mta with the new values */
5571         igb_set_rx_mode(adapter->netdev);
5572
5573         return 0;
5574 }
5575
5576 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
5577 {
5578         struct e1000_hw *hw = &adapter->hw;
5579         struct vf_data_storage *vf_data;
5580         int i, j;
5581
5582         for (i = 0; i < adapter->vfs_allocated_count; i++) {
5583                 u32 vmolr = rd32(E1000_VMOLR(i));
5584                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
5585
5586                 vf_data = &adapter->vf_data[i];
5587
5588                 if ((vf_data->num_vf_mc_hashes > 30) ||
5589                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
5590                         vmolr |= E1000_VMOLR_MPME;
5591                 } else if (vf_data->num_vf_mc_hashes) {
5592                         vmolr |= E1000_VMOLR_ROMPE;
5593                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
5594                                 igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
5595                 }
5596                 wr32(E1000_VMOLR(i), vmolr);
5597         }
5598 }
5599
5600 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
5601 {
5602         struct e1000_hw *hw = &adapter->hw;
5603         u32 pool_mask, reg, vid;
5604         int i;
5605
5606         pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5607
5608         /* Find the vlan filter for this id */
5609         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5610                 reg = rd32(E1000_VLVF(i));
5611
5612                 /* remove the vf from the pool */
5613                 reg &= ~pool_mask;
5614
5615                 /* if pool is empty then remove entry from vfta */
5616                 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
5617                     (reg & E1000_VLVF_VLANID_ENABLE)) {
5618                         reg = 0;
5619                         vid = reg & E1000_VLVF_VLANID_MASK;
5620                         igb_vfta_set(hw, vid, false);
5621                 }
5622
5623                 wr32(E1000_VLVF(i), reg);
5624         }
5625
5626         adapter->vf_data[vf].vlans_enabled = 0;
5627 }
5628
5629 static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
5630 {
5631         struct e1000_hw *hw = &adapter->hw;
5632         u32 reg, i;
5633
5634         /* The vlvf table only exists on 82576 hardware and newer */
5635         if (hw->mac.type < e1000_82576)
5636                 return -1;
5637
5638         /* we only need to do this if VMDq is enabled */
5639         if (!adapter->vfs_allocated_count)
5640                 return -1;
5641
5642         /* Find the vlan filter for this id */
5643         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5644                 reg = rd32(E1000_VLVF(i));
5645                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5646                     vid == (reg & E1000_VLVF_VLANID_MASK))
5647                         break;
5648         }
5649
5650         if (add) {
5651                 if (i == E1000_VLVF_ARRAY_SIZE) {
5652                         /* Did not find a matching VLAN ID entry that was
5653                          * enabled.  Search for a free filter entry, i.e.
5654                          * one without the enable bit set
5655                          */
5656                         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5657                                 reg = rd32(E1000_VLVF(i));
5658                                 if (!(reg & E1000_VLVF_VLANID_ENABLE))
5659                                         break;
5660                         }
5661                 }
5662                 if (i < E1000_VLVF_ARRAY_SIZE) {
5663                         /* Found an enabled/available entry */
5664                         reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
5665
5666                         /* if !enabled we need to set this up in vfta */
5667                         if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
5668                                 /* add VID to filter table */
5669                                 igb_vfta_set(hw, vid, true);
5670                                 reg |= E1000_VLVF_VLANID_ENABLE;
5671                         }
5672                         reg &= ~E1000_VLVF_VLANID_MASK;
5673                         reg |= vid;
5674                         wr32(E1000_VLVF(i), reg);
5675
5676                         /* do not modify RLPML for PF devices */
5677                         if (vf >= adapter->vfs_allocated_count)
5678                                 return 0;
5679
5680                         if (!adapter->vf_data[vf].vlans_enabled) {
5681                                 u32 size;
5682                                 reg = rd32(E1000_VMOLR(vf));
5683                                 size = reg & E1000_VMOLR_RLPML_MASK;
5684                                 size += 4;
5685                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5686                                 reg |= size;
5687                                 wr32(E1000_VMOLR(vf), reg);
5688                         }
5689
5690                         adapter->vf_data[vf].vlans_enabled++;
5691                 }
5692         } else {
5693                 if (i < E1000_VLVF_ARRAY_SIZE) {
5694                         /* remove vf from the pool */
5695                         reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
5696                         /* if pool is empty then remove entry from vfta */
5697                         if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
5698                                 reg = 0;
5699                                 igb_vfta_set(hw, vid, false);
5700                         }
5701                         wr32(E1000_VLVF(i), reg);
5702
5703                         /* do not modify RLPML for PF devices */
5704                         if (vf >= adapter->vfs_allocated_count)
5705                                 return 0;
5706
5707                         adapter->vf_data[vf].vlans_enabled--;
5708                         if (!adapter->vf_data[vf].vlans_enabled) {
5709                                 u32 size;
5710                                 reg = rd32(E1000_VMOLR(vf));
5711                                 size = reg & E1000_VMOLR_RLPML_MASK;
5712                                 size -= 4;
5713                                 reg &= ~E1000_VMOLR_RLPML_MASK;
5714                                 reg |= size;
5715                                 wr32(E1000_VMOLR(vf), reg);
5716                         }
5717                 }
5718         }
5719         return 0;
5720 }
5721
5722 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
5723 {
5724         struct e1000_hw *hw = &adapter->hw;
5725
5726         if (vid)
5727                 wr32(E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
5728         else
5729                 wr32(E1000_VMVIR(vf), 0);
5730 }
5731
5732 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
5733                                int vf, u16 vlan, u8 qos)
5734 {
5735         int err = 0;
5736         struct igb_adapter *adapter = netdev_priv(netdev);
5737
5738         if ((vf >= adapter->vfs_allocated_count) || (vlan > 4095) || (qos > 7))
5739                 return -EINVAL;
5740         if (vlan || qos) {
5741                 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
5742                 if (err)
5743                         goto out;
5744                 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
5745                 igb_set_vmolr(adapter, vf, !vlan);
5746                 adapter->vf_data[vf].pf_vlan = vlan;
5747                 adapter->vf_data[vf].pf_qos = qos;
5748                 dev_info(&adapter->pdev->dev,
5749                          "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
5750                 if (test_bit(__IGB_DOWN, &adapter->state)) {
5751                         dev_warn(&adapter->pdev->dev,
5752                                  "The VF VLAN has been set, but the PF device is not up.\n");
5753                         dev_warn(&adapter->pdev->dev,
5754                                  "Bring the PF device up before attempting to use the VF device.\n");
5755                 }
5756         } else {
5757                 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
5758                              false, vf);
5759                 igb_set_vmvir(adapter, vlan, vf);
5760                 igb_set_vmolr(adapter, vf, true);
5761                 adapter->vf_data[vf].pf_vlan = 0;
5762                 adapter->vf_data[vf].pf_qos = 0;
5763         }
5764 out:
5765         return err;
5766 }
5767
5768 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
5769 {
5770         struct e1000_hw *hw = &adapter->hw;
5771         int i;
5772         u32 reg;
5773
5774         /* Find the vlan filter for this id */
5775         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
5776                 reg = rd32(E1000_VLVF(i));
5777                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
5778                     vid == (reg & E1000_VLVF_VLANID_MASK))
5779                         break;
5780         }
5781
5782         if (i >= E1000_VLVF_ARRAY_SIZE)
5783                 i = -1;
5784
5785         return i;
5786 }
5787
5788 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
5789 {
5790         struct e1000_hw *hw = &adapter->hw;
5791         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
5792         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
5793         int err = 0;
5794
5795         /* If in promiscuous mode we need to make sure the PF also has
5796          * the VLAN filter set.
5797          */
5798         if (add && (adapter->netdev->flags & IFF_PROMISC))
5799                 err = igb_vlvf_set(adapter, vid, add,
5800                                    adapter->vfs_allocated_count);
5801         if (err)
5802                 goto out;
5803
5804         err = igb_vlvf_set(adapter, vid, add, vf);
5805
5806         if (err)
5807                 goto out;
5808
5809         /* Go through all the checks to see if the VLAN filter should
5810          * be wiped completely.
5811          */
5812         if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
5813                 u32 vlvf, bits;
5814
5815                 int regndx = igb_find_vlvf_entry(adapter, vid);
5816                 if (regndx < 0)
5817                         goto out;
5818                 /* See if any other pools are set for this VLAN filter
5819                  * entry other than the PF.
5820                  */
5821                 vlvf = bits = rd32(E1000_VLVF(regndx));
5822                 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
5823                               adapter->vfs_allocated_count);
5824                 /* If the filter was removed then ensure PF pool bit
5825                  * is cleared if the PF only added itself to the pool
5826                  * because the PF is in promiscuous mode.
5827                  */
5828                 if ((vlvf & VLAN_VID_MASK) == vid &&
5829                     !test_bit(vid, adapter->active_vlans) &&
5830                     !bits)
5831                         igb_vlvf_set(adapter, vid, add,
5832                                      adapter->vfs_allocated_count);
5833         }
5834
5835 out:
5836         return err;
5837 }
5838
5839 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
5840 {
5841         /* clear flags - except flag that indicates PF has set the MAC */
5842         adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
5843         adapter->vf_data[vf].last_nack = jiffies;
5844
5845         /* reset offloads to defaults */
5846         igb_set_vmolr(adapter, vf, true);
5847
5848         /* reset vlans for device */
5849         igb_clear_vf_vfta(adapter, vf);
5850         if (adapter->vf_data[vf].pf_vlan)
5851                 igb_ndo_set_vf_vlan(adapter->netdev, vf,
5852                                     adapter->vf_data[vf].pf_vlan,
5853                                     adapter->vf_data[vf].pf_qos);
5854         else
5855                 igb_clear_vf_vfta(adapter, vf);
5856
5857         /* reset multicast table array for vf */
5858         adapter->vf_data[vf].num_vf_mc_hashes = 0;
5859
5860         /* Flush and reset the mta with the new values */
5861         igb_set_rx_mode(adapter->netdev);
5862 }
5863
5864 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
5865 {
5866         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5867
5868         /* clear mac address as we were hotplug removed/added */
5869         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
5870                 eth_zero_addr(vf_mac);
5871
5872         /* process remaining reset events */
5873         igb_vf_reset(adapter, vf);
5874 }
5875
5876 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
5877 {
5878         struct e1000_hw *hw = &adapter->hw;
5879         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
5880         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
5881         u32 reg, msgbuf[3];
5882         u8 *addr = (u8 *)(&msgbuf[1]);
5883
5884         /* process all the same items cleared in a function level reset */
5885         igb_vf_reset(adapter, vf);
5886
5887         /* set vf mac address */
5888         igb_rar_set_qsel(adapter, vf_mac, rar_entry, vf);
5889
5890         /* enable transmit and receive for vf */
5891         reg = rd32(E1000_VFTE);
5892         wr32(E1000_VFTE, reg | (1 << vf));
5893         reg = rd32(E1000_VFRE);
5894         wr32(E1000_VFRE, reg | (1 << vf));
5895
5896         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
5897
5898         /* reply to reset with ack and vf mac address */
5899         msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
5900         memcpy(addr, vf_mac, ETH_ALEN);
5901         igb_write_mbx(hw, msgbuf, 3, vf);
5902 }
5903
5904 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
5905 {
5906         /* The VF MAC Address is stored in a packed array of bytes
5907          * starting at the second 32 bit word of the msg array
5908          */
5909         unsigned char *addr = (char *)&msg[1];
5910         int err = -1;
5911
5912         if (is_valid_ether_addr(addr))
5913                 err = igb_set_vf_mac(adapter, vf, addr);
5914
5915         return err;
5916 }
5917
5918 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
5919 {
5920         struct e1000_hw *hw = &adapter->hw;
5921         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5922         u32 msg = E1000_VT_MSGTYPE_NACK;
5923
5924         /* if device isn't clear to send it shouldn't be reading either */
5925         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
5926             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
5927                 igb_write_mbx(hw, &msg, 1, vf);
5928                 vf_data->last_nack = jiffies;
5929         }
5930 }
5931
5932 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
5933 {
5934         struct pci_dev *pdev = adapter->pdev;
5935         u32 msgbuf[E1000_VFMAILBOX_SIZE];
5936         struct e1000_hw *hw = &adapter->hw;
5937         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
5938         s32 retval;
5939
5940         retval = igb_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
5941
5942         if (retval) {
5943                 /* if receive failed revoke VF CTS stats and restart init */
5944                 dev_err(&pdev->dev, "Error receiving message from VF\n");
5945                 vf_data->flags &= ~IGB_VF_FLAG_CTS;
5946                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5947                         return;
5948                 goto out;
5949         }
5950
5951         /* this is a message we already processed, do nothing */
5952         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
5953                 return;
5954
5955         /* until the vf completes a reset it should not be
5956          * allowed to start any configuration.
5957          */
5958         if (msgbuf[0] == E1000_VF_RESET) {
5959                 igb_vf_reset_msg(adapter, vf);
5960                 return;
5961         }
5962
5963         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
5964                 if (!time_after(jiffies, vf_data->last_nack + (2 * HZ)))
5965                         return;
5966                 retval = -1;
5967                 goto out;
5968         }
5969
5970         switch ((msgbuf[0] & 0xFFFF)) {
5971         case E1000_VF_SET_MAC_ADDR:
5972                 retval = -EINVAL;
5973                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
5974                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
5975                 else
5976                         dev_warn(&pdev->dev,
5977                                  "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
5978                                  vf);
5979                 break;
5980         case E1000_VF_SET_PROMISC:
5981                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
5982                 break;
5983         case E1000_VF_SET_MULTICAST:
5984                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
5985                 break;
5986         case E1000_VF_SET_LPE:
5987                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
5988                 break;
5989         case E1000_VF_SET_VLAN:
5990                 retval = -1;
5991                 if (vf_data->pf_vlan)
5992                         dev_warn(&pdev->dev,
5993                                  "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
5994                                  vf);
5995                 else
5996                         retval = igb_set_vf_vlan(adapter, msgbuf, vf);
5997                 break;
5998         default:
5999                 dev_err(&pdev->dev, "Unhandled Msg %08x\n", msgbuf[0]);
6000                 retval = -1;
6001                 break;
6002         }
6003
6004         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6005 out:
6006         /* notify the VF of the results of what it sent us */
6007         if (retval)
6008                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6009         else
6010                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6011
6012         igb_write_mbx(hw, msgbuf, 1, vf);
6013 }
6014
6015 static void igb_msg_task(struct igb_adapter *adapter)
6016 {
6017         struct e1000_hw *hw = &adapter->hw;
6018         u32 vf;
6019
6020         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6021                 /* process any reset requests */
6022                 if (!igb_check_for_rst(hw, vf))
6023                         igb_vf_reset_event(adapter, vf);
6024
6025                 /* process any messages pending */
6026                 if (!igb_check_for_msg(hw, vf))
6027                         igb_rcv_msg_from_vf(adapter, vf);
6028
6029                 /* process any acks */
6030                 if (!igb_check_for_ack(hw, vf))
6031                         igb_rcv_ack_from_vf(adapter, vf);
6032         }
6033 }
6034
6035 /**
6036  *  igb_set_uta - Set unicast filter table address
6037  *  @adapter: board private structure
6038  *
6039  *  The unicast table address is a register array of 32-bit registers.
6040  *  The table is meant to be used in a way similar to how the MTA is used
6041  *  however due to certain limitations in the hardware it is necessary to
6042  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6043  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6044  **/
6045 static void igb_set_uta(struct igb_adapter *adapter)
6046 {
6047         struct e1000_hw *hw = &adapter->hw;
6048         int i;
6049
6050         /* The UTA table only exists on 82576 hardware and newer */
6051         if (hw->mac.type < e1000_82576)
6052                 return;
6053
6054         /* we only need to do this if VMDq is enabled */
6055         if (!adapter->vfs_allocated_count)
6056                 return;
6057
6058         for (i = 0; i < hw->mac.uta_reg_count; i++)
6059                 array_wr32(E1000_UTA, i, ~0);
6060 }
6061
6062 /**
6063  *  igb_intr_msi - Interrupt Handler
6064  *  @irq: interrupt number
6065  *  @data: pointer to a network interface device structure
6066  **/
6067 static irqreturn_t igb_intr_msi(int irq, void *data)
6068 {
6069         struct igb_adapter *adapter = data;
6070         struct igb_q_vector *q_vector = adapter->q_vector[0];
6071         struct e1000_hw *hw = &adapter->hw;
6072         /* read ICR disables interrupts using IAM */
6073         u32 icr = rd32(E1000_ICR);
6074
6075         igb_write_itr(q_vector);
6076
6077         if (icr & E1000_ICR_DRSTA)
6078                 schedule_work(&adapter->reset_task);
6079
6080         if (icr & E1000_ICR_DOUTSYNC) {
6081                 /* HW is reporting DMA is out of sync */
6082                 adapter->stats.doosync++;
6083         }
6084
6085         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6086                 hw->mac.get_link_status = 1;
6087                 if (!test_bit(__IGB_DOWN, &adapter->state))
6088                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6089         }
6090
6091         if (icr & E1000_ICR_TS) {
6092                 u32 tsicr = rd32(E1000_TSICR);
6093
6094                 if (tsicr & E1000_TSICR_TXTS) {
6095                         /* acknowledge the interrupt */
6096                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
6097                         /* retrieve hardware timestamp */
6098                         schedule_work(&adapter->ptp_tx_work);
6099                 }
6100         }
6101
6102         napi_schedule(&q_vector->napi);
6103
6104         return IRQ_HANDLED;
6105 }
6106
6107 /**
6108  *  igb_intr - Legacy Interrupt Handler
6109  *  @irq: interrupt number
6110  *  @data: pointer to a network interface device structure
6111  **/
6112 static irqreturn_t igb_intr(int irq, void *data)
6113 {
6114         struct igb_adapter *adapter = data;
6115         struct igb_q_vector *q_vector = adapter->q_vector[0];
6116         struct e1000_hw *hw = &adapter->hw;
6117         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6118          * need for the IMC write
6119          */
6120         u32 icr = rd32(E1000_ICR);
6121
6122         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6123          * not set, then the adapter didn't send an interrupt
6124          */
6125         if (!(icr & E1000_ICR_INT_ASSERTED))
6126                 return IRQ_NONE;
6127
6128         igb_write_itr(q_vector);
6129
6130         if (icr & E1000_ICR_DRSTA)
6131                 schedule_work(&adapter->reset_task);
6132
6133         if (icr & E1000_ICR_DOUTSYNC) {
6134                 /* HW is reporting DMA is out of sync */
6135                 adapter->stats.doosync++;
6136         }
6137
6138         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6139                 hw->mac.get_link_status = 1;
6140                 /* guard against interrupt when we're going down */
6141                 if (!test_bit(__IGB_DOWN, &adapter->state))
6142                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6143         }
6144
6145         if (icr & E1000_ICR_TS) {
6146                 u32 tsicr = rd32(E1000_TSICR);
6147
6148                 if (tsicr & E1000_TSICR_TXTS) {
6149                         /* acknowledge the interrupt */
6150                         wr32(E1000_TSICR, E1000_TSICR_TXTS);
6151                         /* retrieve hardware timestamp */
6152                         schedule_work(&adapter->ptp_tx_work);
6153                 }
6154         }
6155
6156         napi_schedule(&q_vector->napi);
6157
6158         return IRQ_HANDLED;
6159 }
6160
6161 static void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6162 {
6163         struct igb_adapter *adapter = q_vector->adapter;
6164         struct e1000_hw *hw = &adapter->hw;
6165
6166         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6167             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6168                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6169                         igb_set_itr(q_vector);
6170                 else
6171                         igb_update_ring_itr(q_vector);
6172         }
6173
6174         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6175                 if (adapter->msix_entries)
6176                         wr32(E1000_EIMS, q_vector->eims_value);
6177                 else
6178                         igb_irq_enable(adapter);
6179         }
6180 }
6181
6182 /**
6183  *  igb_poll - NAPI Rx polling callback
6184  *  @napi: napi polling structure
6185  *  @budget: count of how many packets we should handle
6186  **/
6187 static int igb_poll(struct napi_struct *napi, int budget)
6188 {
6189         struct igb_q_vector *q_vector = container_of(napi,
6190                                                      struct igb_q_vector,
6191                                                      napi);
6192         bool clean_complete = true;
6193
6194 #ifdef CONFIG_IGB_DCA
6195         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6196                 igb_update_dca(q_vector);
6197 #endif
6198         if (q_vector->tx.ring)
6199                 clean_complete = igb_clean_tx_irq(q_vector);
6200
6201         if (q_vector->rx.ring)
6202                 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6203
6204         /* If all work not completed, return budget and keep polling */
6205         if (!clean_complete)
6206                 return budget;
6207
6208         /* If not enough Rx work done, exit the polling mode */
6209         napi_complete(napi);
6210         igb_ring_irq_enable(q_vector);
6211
6212         return 0;
6213 }
6214
6215 /**
6216  *  igb_clean_tx_irq - Reclaim resources after transmit completes
6217  *  @q_vector: pointer to q_vector containing needed info
6218  *
6219  *  returns true if ring is completely cleaned
6220  **/
6221 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
6222 {
6223         struct igb_adapter *adapter = q_vector->adapter;
6224         struct igb_ring *tx_ring = q_vector->tx.ring;
6225         struct igb_tx_buffer *tx_buffer;
6226         union e1000_adv_tx_desc *tx_desc;
6227         unsigned int total_bytes = 0, total_packets = 0;
6228         unsigned int budget = q_vector->tx.work_limit;
6229         unsigned int i = tx_ring->next_to_clean;
6230
6231         if (test_bit(__IGB_DOWN, &adapter->state))
6232                 return true;
6233
6234         tx_buffer = &tx_ring->tx_buffer_info[i];
6235         tx_desc = IGB_TX_DESC(tx_ring, i);
6236         i -= tx_ring->count;
6237
6238         do {
6239                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6240
6241                 /* if next_to_watch is not set then there is no work pending */
6242                 if (!eop_desc)
6243                         break;
6244
6245                 /* prevent any other reads prior to eop_desc */
6246                 read_barrier_depends();
6247
6248                 /* if DD is not set pending work has not been completed */
6249                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6250                         break;
6251
6252                 /* clear next_to_watch to prevent false hangs */
6253                 tx_buffer->next_to_watch = NULL;
6254
6255                 /* update the statistics for this packet */
6256                 total_bytes += tx_buffer->bytecount;
6257                 total_packets += tx_buffer->gso_segs;
6258
6259                 /* free the skb */
6260                 dev_kfree_skb_any(tx_buffer->skb);
6261
6262                 /* unmap skb header data */
6263                 dma_unmap_single(tx_ring->dev,
6264                                  dma_unmap_addr(tx_buffer, dma),
6265                                  dma_unmap_len(tx_buffer, len),
6266                                  DMA_TO_DEVICE);
6267
6268                 /* clear tx_buffer data */
6269                 tx_buffer->skb = NULL;
6270                 dma_unmap_len_set(tx_buffer, len, 0);
6271
6272                 /* clear last DMA location and unmap remaining buffers */
6273                 while (tx_desc != eop_desc) {
6274                         tx_buffer++;
6275                         tx_desc++;
6276                         i++;
6277                         if (unlikely(!i)) {
6278                                 i -= tx_ring->count;
6279                                 tx_buffer = tx_ring->tx_buffer_info;
6280                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
6281                         }
6282
6283                         /* unmap any remaining paged data */
6284                         if (dma_unmap_len(tx_buffer, len)) {
6285                                 dma_unmap_page(tx_ring->dev,
6286                                                dma_unmap_addr(tx_buffer, dma),
6287                                                dma_unmap_len(tx_buffer, len),
6288                                                DMA_TO_DEVICE);
6289                                 dma_unmap_len_set(tx_buffer, len, 0);
6290                         }
6291                 }
6292
6293                 /* move us one more past the eop_desc for start of next pkt */
6294                 tx_buffer++;
6295                 tx_desc++;
6296                 i++;
6297                 if (unlikely(!i)) {
6298                         i -= tx_ring->count;
6299                         tx_buffer = tx_ring->tx_buffer_info;
6300                         tx_desc = IGB_TX_DESC(tx_ring, 0);
6301                 }
6302
6303                 /* issue prefetch for next Tx descriptor */
6304                 prefetch(tx_desc);
6305
6306                 /* update budget accounting */
6307                 budget--;
6308         } while (likely(budget));
6309
6310         netdev_tx_completed_queue(txring_txq(tx_ring),
6311                                   total_packets, total_bytes);
6312         i += tx_ring->count;
6313         tx_ring->next_to_clean = i;
6314         u64_stats_update_begin(&tx_ring->tx_syncp);
6315         tx_ring->tx_stats.bytes += total_bytes;
6316         tx_ring->tx_stats.packets += total_packets;
6317         u64_stats_update_end(&tx_ring->tx_syncp);
6318         q_vector->tx.total_bytes += total_bytes;
6319         q_vector->tx.total_packets += total_packets;
6320
6321         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
6322                 struct e1000_hw *hw = &adapter->hw;
6323
6324                 /* Detect a transmit hang in hardware, this serializes the
6325                  * check with the clearing of time_stamp and movement of i
6326                  */
6327                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
6328                 if (tx_buffer->next_to_watch &&
6329                     time_after(jiffies, tx_buffer->time_stamp +
6330                                (adapter->tx_timeout_factor * HZ)) &&
6331                     !(rd32(E1000_STATUS) & E1000_STATUS_TXOFF)) {
6332
6333                         /* detected Tx unit hang */
6334                         dev_err(tx_ring->dev,
6335                                 "Detected Tx Unit Hang\n"
6336                                 "  Tx Queue             <%d>\n"
6337                                 "  TDH                  <%x>\n"
6338                                 "  TDT                  <%x>\n"
6339                                 "  next_to_use          <%x>\n"
6340                                 "  next_to_clean        <%x>\n"
6341                                 "buffer_info[next_to_clean]\n"
6342                                 "  time_stamp           <%lx>\n"
6343                                 "  next_to_watch        <%p>\n"
6344                                 "  jiffies              <%lx>\n"
6345                                 "  desc.status          <%x>\n",
6346                                 tx_ring->queue_index,
6347                                 rd32(E1000_TDH(tx_ring->reg_idx)),
6348                                 readl(tx_ring->tail),
6349                                 tx_ring->next_to_use,
6350                                 tx_ring->next_to_clean,
6351                                 tx_buffer->time_stamp,
6352                                 tx_buffer->next_to_watch,
6353                                 jiffies,
6354                                 tx_buffer->next_to_watch->wb.status);
6355                         netif_stop_subqueue(tx_ring->netdev,
6356                                             tx_ring->queue_index);
6357
6358                         /* we are about to reset, no point in enabling stuff */
6359                         return true;
6360                 }
6361         }
6362
6363 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6364         if (unlikely(total_packets &&
6365             netif_carrier_ok(tx_ring->netdev) &&
6366             igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
6367                 /* Make sure that anybody stopping the queue after this
6368                  * sees the new next_to_clean.
6369                  */
6370                 smp_mb();
6371                 if (__netif_subqueue_stopped(tx_ring->netdev,
6372                                              tx_ring->queue_index) &&
6373                     !(test_bit(__IGB_DOWN, &adapter->state))) {
6374                         netif_wake_subqueue(tx_ring->netdev,
6375                                             tx_ring->queue_index);
6376
6377                         u64_stats_update_begin(&tx_ring->tx_syncp);
6378                         tx_ring->tx_stats.restart_queue++;
6379                         u64_stats_update_end(&tx_ring->tx_syncp);
6380                 }
6381         }
6382
6383         return !!budget;
6384 }
6385
6386 /**
6387  *  igb_reuse_rx_page - page flip buffer and store it back on the ring
6388  *  @rx_ring: rx descriptor ring to store buffers on
6389  *  @old_buff: donor buffer to have page reused
6390  *
6391  *  Synchronizes page for reuse by the adapter
6392  **/
6393 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
6394                               struct igb_rx_buffer *old_buff)
6395 {
6396         struct igb_rx_buffer *new_buff;
6397         u16 nta = rx_ring->next_to_alloc;
6398
6399         new_buff = &rx_ring->rx_buffer_info[nta];
6400
6401         /* update, and store next to alloc */
6402         nta++;
6403         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
6404
6405         /* transfer page from old buffer to new buffer */
6406         memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
6407
6408         /* sync the buffer for use by the device */
6409         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
6410                                          old_buff->page_offset,
6411                                          IGB_RX_BUFSZ,
6412                                          DMA_FROM_DEVICE);
6413 }
6414
6415 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
6416                                   struct page *page,
6417                                   unsigned int truesize)
6418 {
6419         /* avoid re-using remote pages */
6420         if (unlikely(page_to_nid(page) != numa_node_id()))
6421                 return false;
6422
6423 #if (PAGE_SIZE < 8192)
6424         /* if we are only owner of page we can reuse it */
6425         if (unlikely(page_count(page) != 1))
6426                 return false;
6427
6428         /* flip page offset to other buffer */
6429         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
6430
6431         /* since we are the only owner of the page and we need to
6432          * increment it, just set the value to 2 in order to avoid
6433          * an unnecessary locked operation
6434          */
6435         atomic_set(&page->_count, 2);
6436 #else
6437         /* move offset up to the next cache line */
6438         rx_buffer->page_offset += truesize;
6439
6440         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
6441                 return false;
6442
6443         /* bump ref count on page before it is given to the stack */
6444         get_page(page);
6445 #endif
6446
6447         return true;
6448 }
6449
6450 /**
6451  *  igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6452  *  @rx_ring: rx descriptor ring to transact packets on
6453  *  @rx_buffer: buffer containing page to add
6454  *  @rx_desc: descriptor containing length of buffer written by hardware
6455  *  @skb: sk_buff to place the data into
6456  *
6457  *  This function will add the data contained in rx_buffer->page to the skb.
6458  *  This is done either through a direct copy if the data in the buffer is
6459  *  less than the skb header size, otherwise it will just attach the page as
6460  *  a frag to the skb.
6461  *
6462  *  The function will then update the page offset if necessary and return
6463  *  true if the buffer can be reused by the adapter.
6464  **/
6465 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
6466                             struct igb_rx_buffer *rx_buffer,
6467                             union e1000_adv_rx_desc *rx_desc,
6468                             struct sk_buff *skb)
6469 {
6470         struct page *page = rx_buffer->page;
6471         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
6472 #if (PAGE_SIZE < 8192)
6473         unsigned int truesize = IGB_RX_BUFSZ;
6474 #else
6475         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
6476 #endif
6477
6478         if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
6479                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
6480
6481                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6482                         igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6483                         va += IGB_TS_HDR_LEN;
6484                         size -= IGB_TS_HDR_LEN;
6485                 }
6486
6487                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
6488
6489                 /* we can reuse buffer as-is, just make sure it is local */
6490                 if (likely(page_to_nid(page) == numa_node_id()))
6491                         return true;
6492
6493                 /* this page cannot be reused so discard it */
6494                 put_page(page);
6495                 return false;
6496         }
6497
6498         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
6499                         rx_buffer->page_offset, size, truesize);
6500
6501         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
6502 }
6503
6504 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
6505                                            union e1000_adv_rx_desc *rx_desc,
6506                                            struct sk_buff *skb)
6507 {
6508         struct igb_rx_buffer *rx_buffer;
6509         struct page *page;
6510
6511         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
6512
6513         page = rx_buffer->page;
6514         prefetchw(page);
6515
6516         if (likely(!skb)) {
6517                 void *page_addr = page_address(page) +
6518                                   rx_buffer->page_offset;
6519
6520                 /* prefetch first cache line of first page */
6521                 prefetch(page_addr);
6522 #if L1_CACHE_BYTES < 128
6523                 prefetch(page_addr + L1_CACHE_BYTES);
6524 #endif
6525
6526                 /* allocate a skb to store the frags */
6527                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
6528                                                 IGB_RX_HDR_LEN);
6529                 if (unlikely(!skb)) {
6530                         rx_ring->rx_stats.alloc_failed++;
6531                         return NULL;
6532                 }
6533
6534                 /* we will be copying header into skb->data in
6535                  * pskb_may_pull so it is in our interest to prefetch
6536                  * it now to avoid a possible cache miss
6537                  */
6538                 prefetchw(skb->data);
6539         }
6540
6541         /* we are reusing so sync this buffer for CPU use */
6542         dma_sync_single_range_for_cpu(rx_ring->dev,
6543                                       rx_buffer->dma,
6544                                       rx_buffer->page_offset,
6545                                       IGB_RX_BUFSZ,
6546                                       DMA_FROM_DEVICE);
6547
6548         /* pull page into skb */
6549         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
6550                 /* hand second half of page back to the ring */
6551                 igb_reuse_rx_page(rx_ring, rx_buffer);
6552         } else {
6553                 /* we are not reusing the buffer so unmap it */
6554                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
6555                                PAGE_SIZE, DMA_FROM_DEVICE);
6556         }
6557
6558         /* clear contents of rx_buffer */
6559         rx_buffer->page = NULL;
6560
6561         return skb;
6562 }
6563
6564 static inline void igb_rx_checksum(struct igb_ring *ring,
6565                                    union e1000_adv_rx_desc *rx_desc,
6566                                    struct sk_buff *skb)
6567 {
6568         skb_checksum_none_assert(skb);
6569
6570         /* Ignore Checksum bit is set */
6571         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
6572                 return;
6573
6574         /* Rx checksum disabled via ethtool */
6575         if (!(ring->netdev->features & NETIF_F_RXCSUM))
6576                 return;
6577
6578         /* TCP/UDP checksum error bit is set */
6579         if (igb_test_staterr(rx_desc,
6580                              E1000_RXDEXT_STATERR_TCPE |
6581                              E1000_RXDEXT_STATERR_IPE)) {
6582                 /* work around errata with sctp packets where the TCPE aka
6583                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6584                  * packets, (aka let the stack check the crc32c)
6585                  */
6586                 if (!((skb->len == 60) &&
6587                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags))) {
6588                         u64_stats_update_begin(&ring->rx_syncp);
6589                         ring->rx_stats.csum_err++;
6590                         u64_stats_update_end(&ring->rx_syncp);
6591                 }
6592                 /* let the stack verify checksum errors */
6593                 return;
6594         }
6595         /* It must be a TCP or UDP packet with a valid checksum */
6596         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
6597                                       E1000_RXD_STAT_UDPCS))
6598                 skb->ip_summed = CHECKSUM_UNNECESSARY;
6599
6600         dev_dbg(ring->dev, "cksum success: bits %08X\n",
6601                 le32_to_cpu(rx_desc->wb.upper.status_error));
6602 }
6603
6604 static inline void igb_rx_hash(struct igb_ring *ring,
6605                                union e1000_adv_rx_desc *rx_desc,
6606                                struct sk_buff *skb)
6607 {
6608         if (ring->netdev->features & NETIF_F_RXHASH)
6609                 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
6610 }
6611
6612 /**
6613  *  igb_is_non_eop - process handling of non-EOP buffers
6614  *  @rx_ring: Rx ring being processed
6615  *  @rx_desc: Rx descriptor for current buffer
6616  *  @skb: current socket buffer containing buffer in progress
6617  *
6618  *  This function updates next to clean.  If the buffer is an EOP buffer
6619  *  this function exits returning false, otherwise it will place the
6620  *  sk_buff in the next buffer to be chained and return true indicating
6621  *  that this is in fact a non-EOP buffer.
6622  **/
6623 static bool igb_is_non_eop(struct igb_ring *rx_ring,
6624                            union e1000_adv_rx_desc *rx_desc)
6625 {
6626         u32 ntc = rx_ring->next_to_clean + 1;
6627
6628         /* fetch, update, and store next to clean */
6629         ntc = (ntc < rx_ring->count) ? ntc : 0;
6630         rx_ring->next_to_clean = ntc;
6631
6632         prefetch(IGB_RX_DESC(rx_ring, ntc));
6633
6634         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
6635                 return false;
6636
6637         return true;
6638 }
6639
6640 /**
6641  *  igb_get_headlen - determine size of header for LRO/GRO
6642  *  @data: pointer to the start of the headers
6643  *  @max_len: total length of section to find headers in
6644  *
6645  *  This function is meant to determine the length of headers that will
6646  *  be recognized by hardware for LRO, and GRO offloads.  The main
6647  *  motivation of doing this is to only perform one pull for IPv4 TCP
6648  *  packets so that we can do basic things like calculating the gso_size
6649  *  based on the average data per packet.
6650  **/
6651 static unsigned int igb_get_headlen(unsigned char *data,
6652                                     unsigned int max_len)
6653 {
6654         union {
6655                 unsigned char *network;
6656                 /* l2 headers */
6657                 struct ethhdr *eth;
6658                 struct vlan_hdr *vlan;
6659                 /* l3 headers */
6660                 struct iphdr *ipv4;
6661                 struct ipv6hdr *ipv6;
6662         } hdr;
6663         __be16 protocol;
6664         u8 nexthdr = 0; /* default to not TCP */
6665         u8 hlen;
6666
6667         /* this should never happen, but better safe than sorry */
6668         if (max_len < ETH_HLEN)
6669                 return max_len;
6670
6671         /* initialize network frame pointer */
6672         hdr.network = data;
6673
6674         /* set first protocol and move network header forward */
6675         protocol = hdr.eth->h_proto;
6676         hdr.network += ETH_HLEN;
6677
6678         /* handle any vlan tag if present */
6679         if (protocol == __constant_htons(ETH_P_8021Q)) {
6680                 if ((hdr.network - data) > (max_len - VLAN_HLEN))
6681                         return max_len;
6682
6683                 protocol = hdr.vlan->h_vlan_encapsulated_proto;
6684                 hdr.network += VLAN_HLEN;
6685         }
6686
6687         /* handle L3 protocols */
6688         if (protocol == __constant_htons(ETH_P_IP)) {
6689                 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
6690                         return max_len;
6691
6692                 /* access ihl as a u8 to avoid unaligned access on ia64 */
6693                 hlen = (hdr.network[0] & 0x0F) << 2;
6694
6695                 /* verify hlen meets minimum size requirements */
6696                 if (hlen < sizeof(struct iphdr))
6697                         return hdr.network - data;
6698
6699                 /* record next protocol if header is present */
6700                 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
6701                         nexthdr = hdr.ipv4->protocol;
6702         } else if (protocol == __constant_htons(ETH_P_IPV6)) {
6703                 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
6704                         return max_len;
6705
6706                 /* record next protocol */
6707                 nexthdr = hdr.ipv6->nexthdr;
6708                 hlen = sizeof(struct ipv6hdr);
6709         } else {
6710                 return hdr.network - data;
6711         }
6712
6713         /* relocate pointer to start of L4 header */
6714         hdr.network += hlen;
6715
6716         /* finally sort out TCP */
6717         if (nexthdr == IPPROTO_TCP) {
6718                 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
6719                         return max_len;
6720
6721                 /* access doff as a u8 to avoid unaligned access on ia64 */
6722                 hlen = (hdr.network[12] & 0xF0) >> 2;
6723
6724                 /* verify hlen meets minimum size requirements */
6725                 if (hlen < sizeof(struct tcphdr))
6726                         return hdr.network - data;
6727
6728                 hdr.network += hlen;
6729         } else if (nexthdr == IPPROTO_UDP) {
6730                 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
6731                         return max_len;
6732
6733                 hdr.network += sizeof(struct udphdr);
6734         }
6735
6736         /* If everything has gone correctly hdr.network should be the
6737          * data section of the packet and will be the end of the header.
6738          * If not then it probably represents the end of the last recognized
6739          * header.
6740          */
6741         if ((hdr.network - data) < max_len)
6742                 return hdr.network - data;
6743         else
6744                 return max_len;
6745 }
6746
6747 /**
6748  *  igb_pull_tail - igb specific version of skb_pull_tail
6749  *  @rx_ring: rx descriptor ring packet is being transacted on
6750  *  @rx_desc: pointer to the EOP Rx descriptor
6751  *  @skb: pointer to current skb being adjusted
6752  *
6753  *  This function is an igb specific version of __pskb_pull_tail.  The
6754  *  main difference between this version and the original function is that
6755  *  this function can make several assumptions about the state of things
6756  *  that allow for significant optimizations versus the standard function.
6757  *  As a result we can do things like drop a frag and maintain an accurate
6758  *  truesize for the skb.
6759  */
6760 static void igb_pull_tail(struct igb_ring *rx_ring,
6761                           union e1000_adv_rx_desc *rx_desc,
6762                           struct sk_buff *skb)
6763 {
6764         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
6765         unsigned char *va;
6766         unsigned int pull_len;
6767
6768         /* it is valid to use page_address instead of kmap since we are
6769          * working with pages allocated out of the lomem pool per
6770          * alloc_page(GFP_ATOMIC)
6771          */
6772         va = skb_frag_address(frag);
6773
6774         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
6775                 /* retrieve timestamp from buffer */
6776                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
6777
6778                 /* update pointers to remove timestamp header */
6779                 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
6780                 frag->page_offset += IGB_TS_HDR_LEN;
6781                 skb->data_len -= IGB_TS_HDR_LEN;
6782                 skb->len -= IGB_TS_HDR_LEN;
6783
6784                 /* move va to start of packet data */
6785                 va += IGB_TS_HDR_LEN;
6786         }
6787
6788         /* we need the header to contain the greater of either ETH_HLEN or
6789          * 60 bytes if the skb->len is less than 60 for skb_pad.
6790          */
6791         pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
6792
6793         /* align pull length to size of long to optimize memcpy performance */
6794         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
6795
6796         /* update all of the pointers */
6797         skb_frag_size_sub(frag, pull_len);
6798         frag->page_offset += pull_len;
6799         skb->data_len -= pull_len;
6800         skb->tail += pull_len;
6801 }
6802
6803 /**
6804  *  igb_cleanup_headers - Correct corrupted or empty headers
6805  *  @rx_ring: rx descriptor ring packet is being transacted on
6806  *  @rx_desc: pointer to the EOP Rx descriptor
6807  *  @skb: pointer to current skb being fixed
6808  *
6809  *  Address the case where we are pulling data in on pages only
6810  *  and as such no data is present in the skb header.
6811  *
6812  *  In addition if skb is not at least 60 bytes we need to pad it so that
6813  *  it is large enough to qualify as a valid Ethernet frame.
6814  *
6815  *  Returns true if an error was encountered and skb was freed.
6816  **/
6817 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
6818                                 union e1000_adv_rx_desc *rx_desc,
6819                                 struct sk_buff *skb)
6820 {
6821         if (unlikely((igb_test_staterr(rx_desc,
6822                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
6823                 struct net_device *netdev = rx_ring->netdev;
6824                 if (!(netdev->features & NETIF_F_RXALL)) {
6825                         dev_kfree_skb_any(skb);
6826                         return true;
6827                 }
6828         }
6829
6830         /* place header in linear portion of buffer */
6831         if (skb_is_nonlinear(skb))
6832                 igb_pull_tail(rx_ring, rx_desc, skb);
6833
6834         /* if skb_pad returns an error the skb was freed */
6835         if (unlikely(skb->len < 60)) {
6836                 int pad_len = 60 - skb->len;
6837
6838                 if (skb_pad(skb, pad_len))
6839                         return true;
6840                 __skb_put(skb, pad_len);
6841         }
6842
6843         return false;
6844 }
6845
6846 /**
6847  *  igb_process_skb_fields - Populate skb header fields from Rx descriptor
6848  *  @rx_ring: rx descriptor ring packet is being transacted on
6849  *  @rx_desc: pointer to the EOP Rx descriptor
6850  *  @skb: pointer to current skb being populated
6851  *
6852  *  This function checks the ring, descriptor, and packet information in
6853  *  order to populate the hash, checksum, VLAN, timestamp, protocol, and
6854  *  other fields within the skb.
6855  **/
6856 static void igb_process_skb_fields(struct igb_ring *rx_ring,
6857                                    union e1000_adv_rx_desc *rx_desc,
6858                                    struct sk_buff *skb)
6859 {
6860         struct net_device *dev = rx_ring->netdev;
6861
6862         igb_rx_hash(rx_ring, rx_desc, skb);
6863
6864         igb_rx_checksum(rx_ring, rx_desc, skb);
6865
6866         igb_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
6867
6868         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
6869             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
6870                 u16 vid;
6871                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
6872                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
6873                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
6874                 else
6875                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
6876
6877                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
6878         }
6879
6880         skb_record_rx_queue(skb, rx_ring->queue_index);
6881
6882         skb->protocol = eth_type_trans(skb, rx_ring->netdev);
6883 }
6884
6885 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
6886 {
6887         struct igb_ring *rx_ring = q_vector->rx.ring;
6888         struct sk_buff *skb = rx_ring->skb;
6889         unsigned int total_bytes = 0, total_packets = 0;
6890         u16 cleaned_count = igb_desc_unused(rx_ring);
6891
6892         do {
6893                 union e1000_adv_rx_desc *rx_desc;
6894
6895                 /* return some buffers to hardware, one at a time is too slow */
6896                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
6897                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
6898                         cleaned_count = 0;
6899                 }
6900
6901                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
6902
6903                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
6904                         break;
6905
6906                 /* This memory barrier is needed to keep us from reading
6907                  * any other fields out of the rx_desc until we know the
6908                  * RXD_STAT_DD bit is set
6909                  */
6910                 rmb();
6911
6912                 /* retrieve a buffer from the ring */
6913                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
6914
6915                 /* exit if we failed to retrieve a buffer */
6916                 if (!skb)
6917                         break;
6918
6919                 cleaned_count++;
6920
6921                 /* fetch next buffer in frame if non-eop */
6922                 if (igb_is_non_eop(rx_ring, rx_desc))
6923                         continue;
6924
6925                 /* verify the packet layout is correct */
6926                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
6927                         skb = NULL;
6928                         continue;
6929                 }
6930
6931                 /* probably a little skewed due to removing CRC */
6932                 total_bytes += skb->len;
6933
6934                 /* populate checksum, timestamp, VLAN, and protocol */
6935                 igb_process_skb_fields(rx_ring, rx_desc, skb);
6936
6937                 napi_gro_receive(&q_vector->napi, skb);
6938
6939                 /* reset skb pointer */
6940                 skb = NULL;
6941
6942                 /* update budget accounting */
6943                 total_packets++;
6944         } while (likely(total_packets < budget));
6945
6946         /* place incomplete frames back on ring for completion */
6947         rx_ring->skb = skb;
6948
6949         u64_stats_update_begin(&rx_ring->rx_syncp);
6950         rx_ring->rx_stats.packets += total_packets;
6951         rx_ring->rx_stats.bytes += total_bytes;
6952         u64_stats_update_end(&rx_ring->rx_syncp);
6953         q_vector->rx.total_packets += total_packets;
6954         q_vector->rx.total_bytes += total_bytes;
6955
6956         if (cleaned_count)
6957                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
6958
6959         return (total_packets < budget);
6960 }
6961
6962 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
6963                                   struct igb_rx_buffer *bi)
6964 {
6965         struct page *page = bi->page;
6966         dma_addr_t dma;
6967
6968         /* since we are recycling buffers we should seldom need to alloc */
6969         if (likely(page))
6970                 return true;
6971
6972         /* alloc new page for storage */
6973         page = __skb_alloc_page(GFP_ATOMIC | __GFP_COLD, NULL);
6974         if (unlikely(!page)) {
6975                 rx_ring->rx_stats.alloc_failed++;
6976                 return false;
6977         }
6978
6979         /* map page for use */
6980         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
6981
6982         /* if mapping failed free memory back to system since
6983          * there isn't much point in holding memory we can't use
6984          */
6985         if (dma_mapping_error(rx_ring->dev, dma)) {
6986                 __free_page(page);
6987
6988                 rx_ring->rx_stats.alloc_failed++;
6989                 return false;
6990         }
6991
6992         bi->dma = dma;
6993         bi->page = page;
6994         bi->page_offset = 0;
6995
6996         return true;
6997 }
6998
6999 /**
7000  *  igb_alloc_rx_buffers - Replace used receive buffers; packet split
7001  *  @adapter: address of board private structure
7002  **/
7003 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
7004 {
7005         union e1000_adv_rx_desc *rx_desc;
7006         struct igb_rx_buffer *bi;
7007         u16 i = rx_ring->next_to_use;
7008
7009         /* nothing to do */
7010         if (!cleaned_count)
7011                 return;
7012
7013         rx_desc = IGB_RX_DESC(rx_ring, i);
7014         bi = &rx_ring->rx_buffer_info[i];
7015         i -= rx_ring->count;
7016
7017         do {
7018                 if (!igb_alloc_mapped_page(rx_ring, bi))
7019                         break;
7020
7021                 /* Refresh the desc even if buffer_addrs didn't change
7022                  * because each write-back erases this info.
7023                  */
7024                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
7025
7026                 rx_desc++;
7027                 bi++;
7028                 i++;
7029                 if (unlikely(!i)) {
7030                         rx_desc = IGB_RX_DESC(rx_ring, 0);
7031                         bi = rx_ring->rx_buffer_info;
7032                         i -= rx_ring->count;
7033                 }
7034
7035                 /* clear the hdr_addr for the next_to_use descriptor */
7036                 rx_desc->read.hdr_addr = 0;
7037
7038                 cleaned_count--;
7039         } while (cleaned_count);
7040
7041         i += rx_ring->count;
7042
7043         if (rx_ring->next_to_use != i) {
7044                 /* record the next descriptor to use */
7045                 rx_ring->next_to_use = i;
7046
7047                 /* update next to alloc since we have filled the ring */
7048                 rx_ring->next_to_alloc = i;
7049
7050                 /* Force memory writes to complete before letting h/w
7051                  * know there are new descriptors to fetch.  (Only
7052                  * applicable for weak-ordered memory model archs,
7053                  * such as IA-64).
7054                  */
7055                 wmb();
7056                 writel(i, rx_ring->tail);
7057         }
7058 }
7059
7060 /**
7061  * igb_mii_ioctl -
7062  * @netdev:
7063  * @ifreq:
7064  * @cmd:
7065  **/
7066 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7067 {
7068         struct igb_adapter *adapter = netdev_priv(netdev);
7069         struct mii_ioctl_data *data = if_mii(ifr);
7070
7071         if (adapter->hw.phy.media_type != e1000_media_type_copper)
7072                 return -EOPNOTSUPP;
7073
7074         switch (cmd) {
7075         case SIOCGMIIPHY:
7076                 data->phy_id = adapter->hw.phy.addr;
7077                 break;
7078         case SIOCGMIIREG:
7079                 if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
7080                                      &data->val_out))
7081                         return -EIO;
7082                 break;
7083         case SIOCSMIIREG:
7084         default:
7085                 return -EOPNOTSUPP;
7086         }
7087         return 0;
7088 }
7089
7090 /**
7091  * igb_ioctl -
7092  * @netdev:
7093  * @ifreq:
7094  * @cmd:
7095  **/
7096 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
7097 {
7098         switch (cmd) {
7099         case SIOCGMIIPHY:
7100         case SIOCGMIIREG:
7101         case SIOCSMIIREG:
7102                 return igb_mii_ioctl(netdev, ifr, cmd);
7103         case SIOCSHWTSTAMP:
7104                 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
7105         default:
7106                 return -EOPNOTSUPP;
7107         }
7108 }
7109
7110 s32 igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7111 {
7112         struct igb_adapter *adapter = hw->back;
7113
7114         if (pcie_capability_read_word(adapter->pdev, reg, value))
7115                 return -E1000_ERR_CONFIG;
7116
7117         return 0;
7118 }
7119
7120 s32 igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
7121 {
7122         struct igb_adapter *adapter = hw->back;
7123
7124         if (pcie_capability_write_word(adapter->pdev, reg, *value))
7125                 return -E1000_ERR_CONFIG;
7126
7127         return 0;
7128 }
7129
7130 static void igb_vlan_mode(struct net_device *netdev, netdev_features_t features)
7131 {
7132         struct igb_adapter *adapter = netdev_priv(netdev);
7133         struct e1000_hw *hw = &adapter->hw;
7134         u32 ctrl, rctl;
7135         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
7136
7137         if (enable) {
7138                 /* enable VLAN tag insert/strip */
7139                 ctrl = rd32(E1000_CTRL);
7140                 ctrl |= E1000_CTRL_VME;
7141                 wr32(E1000_CTRL, ctrl);
7142
7143                 /* Disable CFI check */
7144                 rctl = rd32(E1000_RCTL);
7145                 rctl &= ~E1000_RCTL_CFIEN;
7146                 wr32(E1000_RCTL, rctl);
7147         } else {
7148                 /* disable VLAN tag insert/strip */
7149                 ctrl = rd32(E1000_CTRL);
7150                 ctrl &= ~E1000_CTRL_VME;
7151                 wr32(E1000_CTRL, ctrl);
7152         }
7153
7154         igb_rlpml_set(adapter);
7155 }
7156
7157 static int igb_vlan_rx_add_vid(struct net_device *netdev,
7158                                __be16 proto, u16 vid)
7159 {
7160         struct igb_adapter *adapter = netdev_priv(netdev);
7161         struct e1000_hw *hw = &adapter->hw;
7162         int pf_id = adapter->vfs_allocated_count;
7163
7164         /* attempt to add filter to vlvf array */
7165         igb_vlvf_set(adapter, vid, true, pf_id);
7166
7167         /* add the filter since PF can receive vlans w/o entry in vlvf */
7168         igb_vfta_set(hw, vid, true);
7169
7170         set_bit(vid, adapter->active_vlans);
7171
7172         return 0;
7173 }
7174
7175 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
7176                                 __be16 proto, u16 vid)
7177 {
7178         struct igb_adapter *adapter = netdev_priv(netdev);
7179         struct e1000_hw *hw = &adapter->hw;
7180         int pf_id = adapter->vfs_allocated_count;
7181         s32 err;
7182
7183         /* remove vlan from VLVF table array */
7184         err = igb_vlvf_set(adapter, vid, false, pf_id);
7185
7186         /* if vid was not present in VLVF just remove it from table */
7187         if (err)
7188                 igb_vfta_set(hw, vid, false);
7189
7190         clear_bit(vid, adapter->active_vlans);
7191
7192         return 0;
7193 }
7194
7195 static void igb_restore_vlan(struct igb_adapter *adapter)
7196 {
7197         u16 vid;
7198
7199         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
7200
7201         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
7202                 igb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
7203 }
7204
7205 int igb_set_spd_dplx(struct igb_adapter *adapter, u32 spd, u8 dplx)
7206 {
7207         struct pci_dev *pdev = adapter->pdev;
7208         struct e1000_mac_info *mac = &adapter->hw.mac;
7209
7210         mac->autoneg = 0;
7211
7212         /* Make sure dplx is at most 1 bit and lsb of speed is not set
7213          * for the switch() below to work
7214          */
7215         if ((spd & 1) || (dplx & ~1))
7216                 goto err_inval;
7217
7218         /* Fiber NIC's only allow 1000 gbps Full duplex
7219          * and 100Mbps Full duplex for 100baseFx sfp
7220          */
7221         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
7222                 switch (spd + dplx) {
7223                 case SPEED_10 + DUPLEX_HALF:
7224                 case SPEED_10 + DUPLEX_FULL:
7225                 case SPEED_100 + DUPLEX_HALF:
7226                         goto err_inval;
7227                 default:
7228                         break;
7229                 }
7230         }
7231
7232         switch (spd + dplx) {
7233         case SPEED_10 + DUPLEX_HALF:
7234                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
7235                 break;
7236         case SPEED_10 + DUPLEX_FULL:
7237                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
7238                 break;
7239         case SPEED_100 + DUPLEX_HALF:
7240                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
7241                 break;
7242         case SPEED_100 + DUPLEX_FULL:
7243                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
7244                 break;
7245         case SPEED_1000 + DUPLEX_FULL:
7246                 mac->autoneg = 1;
7247                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
7248                 break;
7249         case SPEED_1000 + DUPLEX_HALF: /* not supported */
7250         default:
7251                 goto err_inval;
7252         }
7253
7254         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7255         adapter->hw.phy.mdix = AUTO_ALL_MODES;
7256
7257         return 0;
7258
7259 err_inval:
7260         dev_err(&pdev->dev, "Unsupported Speed/Duplex configuration\n");
7261         return -EINVAL;
7262 }
7263
7264 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
7265                           bool runtime)
7266 {
7267         struct net_device *netdev = pci_get_drvdata(pdev);
7268         struct igb_adapter *adapter = netdev_priv(netdev);
7269         struct e1000_hw *hw = &adapter->hw;
7270         u32 ctrl, rctl, status;
7271         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
7272 #ifdef CONFIG_PM
7273         int retval = 0;
7274 #endif
7275
7276         netif_device_detach(netdev);
7277
7278         if (netif_running(netdev))
7279                 __igb_close(netdev, true);
7280
7281         igb_clear_interrupt_scheme(adapter);
7282
7283 #ifdef CONFIG_PM
7284         retval = pci_save_state(pdev);
7285         if (retval)
7286                 return retval;
7287 #endif
7288
7289         status = rd32(E1000_STATUS);
7290         if (status & E1000_STATUS_LU)
7291                 wufc &= ~E1000_WUFC_LNKC;
7292
7293         if (wufc) {
7294                 igb_setup_rctl(adapter);
7295                 igb_set_rx_mode(netdev);
7296
7297                 /* turn on all-multi mode if wake on multicast is enabled */
7298                 if (wufc & E1000_WUFC_MC) {
7299                         rctl = rd32(E1000_RCTL);
7300                         rctl |= E1000_RCTL_MPE;
7301                         wr32(E1000_RCTL, rctl);
7302                 }
7303
7304                 ctrl = rd32(E1000_CTRL);
7305                 /* advertise wake from D3Cold */
7306                 #define E1000_CTRL_ADVD3WUC 0x00100000
7307                 /* phy power management enable */
7308                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7309                 ctrl |= E1000_CTRL_ADVD3WUC;
7310                 wr32(E1000_CTRL, ctrl);
7311
7312                 /* Allow time for pending master requests to run */
7313                 igb_disable_pcie_master(hw);
7314
7315                 wr32(E1000_WUC, E1000_WUC_PME_EN);
7316                 wr32(E1000_WUFC, wufc);
7317         } else {
7318                 wr32(E1000_WUC, 0);
7319                 wr32(E1000_WUFC, 0);
7320         }
7321
7322         *enable_wake = wufc || adapter->en_mng_pt;
7323         if (!*enable_wake)
7324                 igb_power_down_link(adapter);
7325         else
7326                 igb_power_up_link(adapter);
7327
7328         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
7329          * would have already happened in close and is redundant.
7330          */
7331         igb_release_hw_control(adapter);
7332
7333         pci_disable_device(pdev);
7334
7335         return 0;
7336 }
7337
7338 #ifdef CONFIG_PM
7339 #ifdef CONFIG_PM_SLEEP
7340 static int igb_suspend(struct device *dev)
7341 {
7342         int retval;
7343         bool wake;
7344         struct pci_dev *pdev = to_pci_dev(dev);
7345
7346         retval = __igb_shutdown(pdev, &wake, 0);
7347         if (retval)
7348                 return retval;
7349
7350         if (wake) {
7351                 pci_prepare_to_sleep(pdev);
7352         } else {
7353                 pci_wake_from_d3(pdev, false);
7354                 pci_set_power_state(pdev, PCI_D3hot);
7355         }
7356
7357         return 0;
7358 }
7359 #endif /* CONFIG_PM_SLEEP */
7360
7361 static int igb_resume(struct device *dev)
7362 {
7363         struct pci_dev *pdev = to_pci_dev(dev);
7364         struct net_device *netdev = pci_get_drvdata(pdev);
7365         struct igb_adapter *adapter = netdev_priv(netdev);
7366         struct e1000_hw *hw = &adapter->hw;
7367         u32 err;
7368
7369         pci_set_power_state(pdev, PCI_D0);
7370         pci_restore_state(pdev);
7371         pci_save_state(pdev);
7372
7373         err = pci_enable_device_mem(pdev);
7374         if (err) {
7375                 dev_err(&pdev->dev,
7376                         "igb: Cannot enable PCI device from suspend\n");
7377                 return err;
7378         }
7379         pci_set_master(pdev);
7380
7381         pci_enable_wake(pdev, PCI_D3hot, 0);
7382         pci_enable_wake(pdev, PCI_D3cold, 0);
7383
7384         if (igb_init_interrupt_scheme(adapter, true)) {
7385                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7386                 return -ENOMEM;
7387         }
7388
7389         igb_reset(adapter);
7390
7391         /* let the f/w know that the h/w is now under the control of the
7392          * driver.
7393          */
7394         igb_get_hw_control(adapter);
7395
7396         wr32(E1000_WUS, ~0);
7397
7398         if (netdev->flags & IFF_UP) {
7399                 rtnl_lock();
7400                 err = __igb_open(netdev, true);
7401                 rtnl_unlock();
7402                 if (err)
7403                         return err;
7404         }
7405
7406         netif_device_attach(netdev);
7407         return 0;
7408 }
7409
7410 #ifdef CONFIG_PM_RUNTIME
7411 static int igb_runtime_idle(struct device *dev)
7412 {
7413         struct pci_dev *pdev = to_pci_dev(dev);
7414         struct net_device *netdev = pci_get_drvdata(pdev);
7415         struct igb_adapter *adapter = netdev_priv(netdev);
7416
7417         if (!igb_has_link(adapter))
7418                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
7419
7420         return -EBUSY;
7421 }
7422
7423 static int igb_runtime_suspend(struct device *dev)
7424 {
7425         struct pci_dev *pdev = to_pci_dev(dev);
7426         int retval;
7427         bool wake;
7428
7429         retval = __igb_shutdown(pdev, &wake, 1);
7430         if (retval)
7431                 return retval;
7432
7433         if (wake) {
7434                 pci_prepare_to_sleep(pdev);
7435         } else {
7436                 pci_wake_from_d3(pdev, false);
7437                 pci_set_power_state(pdev, PCI_D3hot);
7438         }
7439
7440         return 0;
7441 }
7442
7443 static int igb_runtime_resume(struct device *dev)
7444 {
7445         return igb_resume(dev);
7446 }
7447 #endif /* CONFIG_PM_RUNTIME */
7448 #endif
7449
7450 static void igb_shutdown(struct pci_dev *pdev)
7451 {
7452         bool wake;
7453
7454         __igb_shutdown(pdev, &wake, 0);
7455
7456         if (system_state == SYSTEM_POWER_OFF) {
7457                 pci_wake_from_d3(pdev, wake);
7458                 pci_set_power_state(pdev, PCI_D3hot);
7459         }
7460 }
7461
7462 #ifdef CONFIG_PCI_IOV
7463 static int igb_sriov_reinit(struct pci_dev *dev)
7464 {
7465         struct net_device *netdev = pci_get_drvdata(dev);
7466         struct igb_adapter *adapter = netdev_priv(netdev);
7467         struct pci_dev *pdev = adapter->pdev;
7468
7469         rtnl_lock();
7470
7471         if (netif_running(netdev))
7472                 igb_close(netdev);
7473
7474         igb_clear_interrupt_scheme(adapter);
7475
7476         igb_init_queue_configuration(adapter);
7477
7478         if (igb_init_interrupt_scheme(adapter, true)) {
7479                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
7480                 return -ENOMEM;
7481         }
7482
7483         if (netif_running(netdev))
7484                 igb_open(netdev);
7485
7486         rtnl_unlock();
7487
7488         return 0;
7489 }
7490
7491 static int igb_pci_disable_sriov(struct pci_dev *dev)
7492 {
7493         int err = igb_disable_sriov(dev);
7494
7495         if (!err)
7496                 err = igb_sriov_reinit(dev);
7497
7498         return err;
7499 }
7500
7501 static int igb_pci_enable_sriov(struct pci_dev *dev, int num_vfs)
7502 {
7503         int err = igb_enable_sriov(dev, num_vfs);
7504
7505         if (err)
7506                 goto out;
7507
7508         err = igb_sriov_reinit(dev);
7509         if (!err)
7510                 return num_vfs;
7511
7512 out:
7513         return err;
7514 }
7515
7516 #endif
7517 static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
7518 {
7519 #ifdef CONFIG_PCI_IOV
7520         if (num_vfs == 0)
7521                 return igb_pci_disable_sriov(dev);
7522         else
7523                 return igb_pci_enable_sriov(dev, num_vfs);
7524 #endif
7525         return 0;
7526 }
7527
7528 #ifdef CONFIG_NET_POLL_CONTROLLER
7529 /* Polling 'interrupt' - used by things like netconsole to send skbs
7530  * without having to re-enable interrupts. It's not called while
7531  * the interrupt routine is executing.
7532  */
7533 static void igb_netpoll(struct net_device *netdev)
7534 {
7535         struct igb_adapter *adapter = netdev_priv(netdev);
7536         struct e1000_hw *hw = &adapter->hw;
7537         struct igb_q_vector *q_vector;
7538         int i;
7539
7540         for (i = 0; i < adapter->num_q_vectors; i++) {
7541                 q_vector = adapter->q_vector[i];
7542                 if (adapter->msix_entries)
7543                         wr32(E1000_EIMC, q_vector->eims_value);
7544                 else
7545                         igb_irq_disable(adapter);
7546                 napi_schedule(&q_vector->napi);
7547         }
7548 }
7549 #endif /* CONFIG_NET_POLL_CONTROLLER */
7550
7551 /**
7552  *  igb_io_error_detected - called when PCI error is detected
7553  *  @pdev: Pointer to PCI device
7554  *  @state: The current pci connection state
7555  *
7556  *  This function is called after a PCI bus error affecting
7557  *  this device has been detected.
7558  **/
7559 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
7560                                               pci_channel_state_t state)
7561 {
7562         struct net_device *netdev = pci_get_drvdata(pdev);
7563         struct igb_adapter *adapter = netdev_priv(netdev);
7564
7565         netif_device_detach(netdev);
7566
7567         if (state == pci_channel_io_perm_failure)
7568                 return PCI_ERS_RESULT_DISCONNECT;
7569
7570         if (netif_running(netdev))
7571                 igb_down(adapter);
7572         pci_disable_device(pdev);
7573
7574         /* Request a slot slot reset. */
7575         return PCI_ERS_RESULT_NEED_RESET;
7576 }
7577
7578 /**
7579  *  igb_io_slot_reset - called after the pci bus has been reset.
7580  *  @pdev: Pointer to PCI device
7581  *
7582  *  Restart the card from scratch, as if from a cold-boot. Implementation
7583  *  resembles the first-half of the igb_resume routine.
7584  **/
7585 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
7586 {
7587         struct net_device *netdev = pci_get_drvdata(pdev);
7588         struct igb_adapter *adapter = netdev_priv(netdev);
7589         struct e1000_hw *hw = &adapter->hw;
7590         pci_ers_result_t result;
7591         int err;
7592
7593         if (pci_enable_device_mem(pdev)) {
7594                 dev_err(&pdev->dev,
7595                         "Cannot re-enable PCI device after reset.\n");
7596                 result = PCI_ERS_RESULT_DISCONNECT;
7597         } else {
7598                 pci_set_master(pdev);
7599                 pci_restore_state(pdev);
7600                 pci_save_state(pdev);
7601
7602                 pci_enable_wake(pdev, PCI_D3hot, 0);
7603                 pci_enable_wake(pdev, PCI_D3cold, 0);
7604
7605                 igb_reset(adapter);
7606                 wr32(E1000_WUS, ~0);
7607                 result = PCI_ERS_RESULT_RECOVERED;
7608         }
7609
7610         err = pci_cleanup_aer_uncorrect_error_status(pdev);
7611         if (err) {
7612                 dev_err(&pdev->dev,
7613                         "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7614                         err);
7615                 /* non-fatal, continue */
7616         }
7617
7618         return result;
7619 }
7620
7621 /**
7622  *  igb_io_resume - called when traffic can start flowing again.
7623  *  @pdev: Pointer to PCI device
7624  *
7625  *  This callback is called when the error recovery driver tells us that
7626  *  its OK to resume normal operation. Implementation resembles the
7627  *  second-half of the igb_resume routine.
7628  */
7629 static void igb_io_resume(struct pci_dev *pdev)
7630 {
7631         struct net_device *netdev = pci_get_drvdata(pdev);
7632         struct igb_adapter *adapter = netdev_priv(netdev);
7633
7634         if (netif_running(netdev)) {
7635                 if (igb_up(adapter)) {
7636                         dev_err(&pdev->dev, "igb_up failed after reset\n");
7637                         return;
7638                 }
7639         }
7640
7641         netif_device_attach(netdev);
7642
7643         /* let the f/w know that the h/w is now under the control of the
7644          * driver.
7645          */
7646         igb_get_hw_control(adapter);
7647 }
7648
7649 static void igb_rar_set_qsel(struct igb_adapter *adapter, u8 *addr, u32 index,
7650                              u8 qsel)
7651 {
7652         u32 rar_low, rar_high;
7653         struct e1000_hw *hw = &adapter->hw;
7654
7655         /* HW expects these in little endian so we reverse the byte order
7656          * from network order (big endian) to little endian
7657          */
7658         rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
7659                    ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
7660         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
7661
7662         /* Indicate to hardware the Address is Valid. */
7663         rar_high |= E1000_RAH_AV;
7664
7665         if (hw->mac.type == e1000_82575)
7666                 rar_high |= E1000_RAH_POOL_1 * qsel;
7667         else
7668                 rar_high |= E1000_RAH_POOL_1 << qsel;
7669
7670         wr32(E1000_RAL(index), rar_low);
7671         wrfl();
7672         wr32(E1000_RAH(index), rar_high);
7673         wrfl();
7674 }
7675
7676 static int igb_set_vf_mac(struct igb_adapter *adapter,
7677                           int vf, unsigned char *mac_addr)
7678 {
7679         struct e1000_hw *hw = &adapter->hw;
7680         /* VF MAC addresses start at end of receive addresses and moves
7681          * towards the first, as a result a collision should not be possible
7682          */
7683         int rar_entry = hw->mac.rar_entry_count - (vf + 1);
7684
7685         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
7686
7687         igb_rar_set_qsel(adapter, mac_addr, rar_entry, vf);
7688
7689         return 0;
7690 }
7691
7692 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
7693 {
7694         struct igb_adapter *adapter = netdev_priv(netdev);
7695         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
7696                 return -EINVAL;
7697         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
7698         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
7699         dev_info(&adapter->pdev->dev,
7700                  "Reload the VF driver to make this change effective.");
7701         if (test_bit(__IGB_DOWN, &adapter->state)) {
7702                 dev_warn(&adapter->pdev->dev,
7703                          "The VF MAC address has been set, but the PF device is not up.\n");
7704                 dev_warn(&adapter->pdev->dev,
7705                          "Bring the PF device up before attempting to use the VF device.\n");
7706         }
7707         return igb_set_vf_mac(adapter, vf, mac);
7708 }
7709
7710 static int igb_link_mbps(int internal_link_speed)
7711 {
7712         switch (internal_link_speed) {
7713         case SPEED_100:
7714                 return 100;
7715         case SPEED_1000:
7716                 return 1000;
7717         default:
7718                 return 0;
7719         }
7720 }
7721
7722 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
7723                                   int link_speed)
7724 {
7725         int rf_dec, rf_int;
7726         u32 bcnrc_val;
7727
7728         if (tx_rate != 0) {
7729                 /* Calculate the rate factor values to set */
7730                 rf_int = link_speed / tx_rate;
7731                 rf_dec = (link_speed - (rf_int * tx_rate));
7732                 rf_dec = (rf_dec * (1 << E1000_RTTBCNRC_RF_INT_SHIFT)) /
7733                          tx_rate;
7734
7735                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
7736                 bcnrc_val |= ((rf_int << E1000_RTTBCNRC_RF_INT_SHIFT) &
7737                               E1000_RTTBCNRC_RF_INT_MASK);
7738                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
7739         } else {
7740                 bcnrc_val = 0;
7741         }
7742
7743         wr32(E1000_RTTDQSEL, vf); /* vf X uses queue X */
7744         /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7745          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7746          */
7747         wr32(E1000_RTTBCNRM, 0x14);
7748         wr32(E1000_RTTBCNRC, bcnrc_val);
7749 }
7750
7751 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
7752 {
7753         int actual_link_speed, i;
7754         bool reset_rate = false;
7755
7756         /* VF TX rate limit was not set or not supported */
7757         if ((adapter->vf_rate_link_speed == 0) ||
7758             (adapter->hw.mac.type != e1000_82576))
7759                 return;
7760
7761         actual_link_speed = igb_link_mbps(adapter->link_speed);
7762         if (actual_link_speed != adapter->vf_rate_link_speed) {
7763                 reset_rate = true;
7764                 adapter->vf_rate_link_speed = 0;
7765                 dev_info(&adapter->pdev->dev,
7766                          "Link speed has been changed. VF Transmit rate is disabled\n");
7767         }
7768
7769         for (i = 0; i < adapter->vfs_allocated_count; i++) {
7770                 if (reset_rate)
7771                         adapter->vf_data[i].tx_rate = 0;
7772
7773                 igb_set_vf_rate_limit(&adapter->hw, i,
7774                                       adapter->vf_data[i].tx_rate,
7775                                       actual_link_speed);
7776         }
7777 }
7778
7779 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
7780 {
7781         struct igb_adapter *adapter = netdev_priv(netdev);
7782         struct e1000_hw *hw = &adapter->hw;
7783         int actual_link_speed;
7784
7785         if (hw->mac.type != e1000_82576)
7786                 return -EOPNOTSUPP;
7787
7788         actual_link_speed = igb_link_mbps(adapter->link_speed);
7789         if ((vf >= adapter->vfs_allocated_count) ||
7790             (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) ||
7791             (tx_rate < 0) || (tx_rate > actual_link_speed))
7792                 return -EINVAL;
7793
7794         adapter->vf_rate_link_speed = actual_link_speed;
7795         adapter->vf_data[vf].tx_rate = (u16)tx_rate;
7796         igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
7797
7798         return 0;
7799 }
7800
7801 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
7802                                    bool setting)
7803 {
7804         struct igb_adapter *adapter = netdev_priv(netdev);
7805         struct e1000_hw *hw = &adapter->hw;
7806         u32 reg_val, reg_offset;
7807
7808         if (!adapter->vfs_allocated_count)
7809                 return -EOPNOTSUPP;
7810
7811         if (vf >= adapter->vfs_allocated_count)
7812                 return -EINVAL;
7813
7814         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
7815         reg_val = rd32(reg_offset);
7816         if (setting)
7817                 reg_val |= ((1 << vf) |
7818                             (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7819         else
7820                 reg_val &= ~((1 << vf) |
7821                              (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
7822         wr32(reg_offset, reg_val);
7823
7824         adapter->vf_data[vf].spoofchk_enabled = setting;
7825         return E1000_SUCCESS;
7826 }
7827
7828 static int igb_ndo_get_vf_config(struct net_device *netdev,
7829                                  int vf, struct ifla_vf_info *ivi)
7830 {
7831         struct igb_adapter *adapter = netdev_priv(netdev);
7832         if (vf >= adapter->vfs_allocated_count)
7833                 return -EINVAL;
7834         ivi->vf = vf;
7835         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
7836         ivi->tx_rate = adapter->vf_data[vf].tx_rate;
7837         ivi->vlan = adapter->vf_data[vf].pf_vlan;
7838         ivi->qos = adapter->vf_data[vf].pf_qos;
7839         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
7840         return 0;
7841 }
7842
7843 static void igb_vmm_control(struct igb_adapter *adapter)
7844 {
7845         struct e1000_hw *hw = &adapter->hw;
7846         u32 reg;
7847
7848         switch (hw->mac.type) {
7849         case e1000_82575:
7850         case e1000_i210:
7851         case e1000_i211:
7852         case e1000_i354:
7853         default:
7854                 /* replication is not supported for 82575 */
7855                 return;
7856         case e1000_82576:
7857                 /* notify HW that the MAC is adding vlan tags */
7858                 reg = rd32(E1000_DTXCTL);
7859                 reg |= E1000_DTXCTL_VLAN_ADDED;
7860                 wr32(E1000_DTXCTL, reg);
7861         case e1000_82580:
7862                 /* enable replication vlan tag stripping */
7863                 reg = rd32(E1000_RPLOLR);
7864                 reg |= E1000_RPLOLR_STRVLAN;
7865                 wr32(E1000_RPLOLR, reg);
7866         case e1000_i350:
7867                 /* none of the above registers are supported by i350 */
7868                 break;
7869         }
7870
7871         if (adapter->vfs_allocated_count) {
7872                 igb_vmdq_set_loopback_pf(hw, true);
7873                 igb_vmdq_set_replication_pf(hw, true);
7874                 igb_vmdq_set_anti_spoofing_pf(hw, true,
7875                                               adapter->vfs_allocated_count);
7876         } else {
7877                 igb_vmdq_set_loopback_pf(hw, false);
7878                 igb_vmdq_set_replication_pf(hw, false);
7879         }
7880 }
7881
7882 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
7883 {
7884         struct e1000_hw *hw = &adapter->hw;
7885         u32 dmac_thr;
7886         u16 hwm;
7887
7888         if (hw->mac.type > e1000_82580) {
7889                 if (adapter->flags & IGB_FLAG_DMAC) {
7890                         u32 reg;
7891
7892                         /* force threshold to 0. */
7893                         wr32(E1000_DMCTXTH, 0);
7894
7895                         /* DMA Coalescing high water mark needs to be greater
7896                          * than the Rx threshold. Set hwm to PBA - max frame
7897                          * size in 16B units, capping it at PBA - 6KB.
7898                          */
7899                         hwm = 64 * pba - adapter->max_frame_size / 16;
7900                         if (hwm < 64 * (pba - 6))
7901                                 hwm = 64 * (pba - 6);
7902                         reg = rd32(E1000_FCRTC);
7903                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
7904                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
7905                                 & E1000_FCRTC_RTH_COAL_MASK);
7906                         wr32(E1000_FCRTC, reg);
7907
7908                         /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
7909                          * frame size, capping it at PBA - 10KB.
7910                          */
7911                         dmac_thr = pba - adapter->max_frame_size / 512;
7912                         if (dmac_thr < pba - 10)
7913                                 dmac_thr = pba - 10;
7914                         reg = rd32(E1000_DMACR);
7915                         reg &= ~E1000_DMACR_DMACTHR_MASK;
7916                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
7917                                 & E1000_DMACR_DMACTHR_MASK);
7918
7919                         /* transition to L0x or L1 if available..*/
7920                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
7921
7922                         /* watchdog timer= +-1000 usec in 32usec intervals */
7923                         reg |= (1000 >> 5);
7924
7925                         /* Disable BMC-to-OS Watchdog Enable */
7926                         if (hw->mac.type != e1000_i354)
7927                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
7928
7929                         wr32(E1000_DMACR, reg);
7930
7931                         /* no lower threshold to disable
7932                          * coalescing(smart fifb)-UTRESH=0
7933                          */
7934                         wr32(E1000_DMCRTRH, 0);
7935
7936                         reg = (IGB_DMCTLX_DCFLUSH_DIS | 0x4);
7937
7938                         wr32(E1000_DMCTLX, reg);
7939
7940                         /* free space in tx packet buffer to wake from
7941                          * DMA coal
7942                          */
7943                         wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
7944                              (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
7945
7946                         /* make low power state decision controlled
7947                          * by DMA coal
7948                          */
7949                         reg = rd32(E1000_PCIEMISC);
7950                         reg &= ~E1000_PCIEMISC_LX_DECISION;
7951                         wr32(E1000_PCIEMISC, reg);
7952                 } /* endif adapter->dmac is not disabled */
7953         } else if (hw->mac.type == e1000_82580) {
7954                 u32 reg = rd32(E1000_PCIEMISC);
7955                 wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
7956                 wr32(E1000_DMACR, 0);
7957         }
7958 }
7959
7960 /**
7961  *  igb_read_i2c_byte - Reads 8 bit word over I2C
7962  *  @hw: pointer to hardware structure
7963  *  @byte_offset: byte offset to read
7964  *  @dev_addr: device address
7965  *  @data: value read
7966  *
7967  *  Performs byte read operation over I2C interface at
7968  *  a specified device address.
7969  **/
7970 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
7971                       u8 dev_addr, u8 *data)
7972 {
7973         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
7974         struct i2c_client *this_client = adapter->i2c_client;
7975         s32 status;
7976         u16 swfw_mask = 0;
7977
7978         if (!this_client)
7979                 return E1000_ERR_I2C;
7980
7981         swfw_mask = E1000_SWFW_PHY0_SM;
7982
7983         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
7984             != E1000_SUCCESS)
7985                 return E1000_ERR_SWFW_SYNC;
7986
7987         status = i2c_smbus_read_byte_data(this_client, byte_offset);
7988         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
7989
7990         if (status < 0)
7991                 return E1000_ERR_I2C;
7992         else {
7993                 *data = status;
7994                 return E1000_SUCCESS;
7995         }
7996 }
7997
7998 /**
7999  *  igb_write_i2c_byte - Writes 8 bit word over I2C
8000  *  @hw: pointer to hardware structure
8001  *  @byte_offset: byte offset to write
8002  *  @dev_addr: device address
8003  *  @data: value to write
8004  *
8005  *  Performs byte write operation over I2C interface at
8006  *  a specified device address.
8007  **/
8008 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
8009                        u8 dev_addr, u8 data)
8010 {
8011         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
8012         struct i2c_client *this_client = adapter->i2c_client;
8013         s32 status;
8014         u16 swfw_mask = E1000_SWFW_PHY0_SM;
8015
8016         if (!this_client)
8017                 return E1000_ERR_I2C;
8018
8019         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
8020                 return E1000_ERR_SWFW_SYNC;
8021         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
8022         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
8023
8024         if (status)
8025                 return E1000_ERR_I2C;
8026         else
8027                 return E1000_SUCCESS;
8028
8029 }
8030
8031 int igb_reinit_queues(struct igb_adapter *adapter)
8032 {
8033         struct net_device *netdev = adapter->netdev;
8034         struct pci_dev *pdev = adapter->pdev;
8035         int err = 0;
8036
8037         if (netif_running(netdev))
8038                 igb_close(netdev);
8039
8040         igb_clear_interrupt_scheme(adapter);
8041
8042         if (igb_init_interrupt_scheme(adapter, true)) {
8043                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
8044                 return -ENOMEM;
8045         }
8046
8047         if (netif_running(netdev))
8048                 err = igb_open(netdev);
8049
8050         return err;
8051 }
8052 /* igb_main.c */