drivers/net/ethernet/apm/xgene/xgene_enet_main.c

   1 /* Applied Micro X-Gene SoC Ethernet Driver
   2  *
   3  * Copyright (c) 2014, Applied Micro Circuits Corporation
   4  * Authors: Iyappan Subramanian <isubramanian@apm.com>
   5  *          Ravi Patel <rapatel@apm.com>
   6  *          Keyur Chudgar <kchudgar@apm.com>
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include "xgene_enet_main.h"
  23 #include "xgene_enet_hw.h"
  24 #include "xgene_enet_sgmac.h"
  25 #include "xgene_enet_xgmac.h"
  26
  27 static void xgene_enet_init_bufpool(struct xgene_enet_desc_ring *buf_pool)
  28 {
  29         struct xgene_enet_raw_desc16 *raw_desc;
  30         int i;
  31
  32         for (i = 0; i < buf_pool->slots; i++) {
  33                 raw_desc = &buf_pool->raw_desc16[i];
  34
  35                 /* Hardware expects descriptor in little endian format */
  36                 raw_desc->m0 = cpu_to_le64(i |
  37                                 SET_VAL(FPQNUM, buf_pool->dst_ring_num) |
  38                                 SET_VAL(STASH, 3));
  39         }
  40 }
  41
  42 static int xgene_enet_refill_bufpool(struct xgene_enet_desc_ring *buf_pool,
  43                                      u32 nbuf)
  44 {
  45         struct sk_buff *skb;
  46         struct xgene_enet_raw_desc16 *raw_desc;
  47         struct net_device *ndev;
  48         struct device *dev;
  49         dma_addr_t dma_addr;
  50         u32 tail = buf_pool->tail;
  51         u32 slots = buf_pool->slots - 1;
  52         u16 bufdatalen, len;
  53         int i;
  54
  55         ndev = buf_pool->ndev;
  56         dev = ndev_to_dev(buf_pool->ndev);
  57         bufdatalen = BUF_LEN_CODE_2K | (SKB_BUFFER_SIZE & GENMASK(11, 0));
  58         len = XGENE_ENET_MAX_MTU;
  59
  60         for (i = 0; i < nbuf; i++) {
  61                 raw_desc = &buf_pool->raw_desc16[tail];
  62
  63                 skb = netdev_alloc_skb_ip_align(ndev, len);
  64                 if (unlikely(!skb))
  65                         return -ENOMEM;
  66                 buf_pool->rx_skb[tail] = skb;
  67
  68                 dma_addr = dma_map_single(dev, skb->data, len, DMA_FROM_DEVICE);
  69                 if (dma_mapping_error(dev, dma_addr)) {
  70                         netdev_err(ndev, "DMA mapping error\n");
  71                         dev_kfree_skb_any(skb);
  72                         return -EINVAL;
  73                 }
  74
  75                 raw_desc->m1 = cpu_to_le64(SET_VAL(DATAADDR, dma_addr) |
  76                                            SET_VAL(BUFDATALEN, bufdatalen) |
  77                                            SET_BIT(COHERENT));
  78                 tail = (tail + 1) & slots;
  79         }
  80
  81         iowrite32(nbuf, buf_pool->cmd);
  82         buf_pool->tail = tail;
  83
  84         return 0;
  85 }
  86
  87 static u16 xgene_enet_dst_ring_num(struct xgene_enet_desc_ring *ring)
  88 {
  89         struct xgene_enet_pdata *pdata = netdev_priv(ring->ndev);
  90
  91         return ((u16)pdata->rm << 10) | ring->num;
  92 }
  93
  94 static u8 xgene_enet_hdr_len(const void *data)
  95 {
  96         const struct ethhdr *eth = data;
  97
  98         return (eth->h_proto == htons(ETH_P_8021Q)) ? VLAN_ETH_HLEN : ETH_HLEN;
  99 }
 100
 101 static u32 xgene_enet_ring_len(struct xgene_enet_desc_ring *ring)
 102 {
 103         u32 __iomem *cmd_base = ring->cmd_base;
 104         u32 ring_state, num_msgs;
 105
 106         ring_state = ioread32(&cmd_base[1]);
 107         num_msgs = ring_state & CREATE_MASK(NUMMSGSINQ_POS, NUMMSGSINQ_LEN);
 108
 109         return num_msgs >> NUMMSGSINQ_POS;
 110 }
 111
 112 static void xgene_enet_delete_bufpool(struct xgene_enet_desc_ring *buf_pool)
 113 {
 114         struct xgene_enet_raw_desc16 *raw_desc;
 115         u32 slots = buf_pool->slots - 1;
 116         u32 tail = buf_pool->tail;
 117         u32 userinfo;
 118         int i, len;
 119
 120         len = xgene_enet_ring_len(buf_pool);
 121         for (i = 0; i < len; i++) {
 122                 tail = (tail - 1) & slots;
 123                 raw_desc = &buf_pool->raw_desc16[tail];
 124
 125                 /* Hardware stores descriptor in little endian format */
 126                 userinfo = GET_VAL(USERINFO, le64_to_cpu(raw_desc->m0));
 127                 dev_kfree_skb_any(buf_pool->rx_skb[userinfo]);
 128         }
 129
 130         iowrite32(-len, buf_pool->cmd);
 131         buf_pool->tail = tail;
 132 }
 133
 134 static irqreturn_t xgene_enet_rx_irq(const int irq, void *data)
 135 {
 136         struct xgene_enet_desc_ring *rx_ring = data;
 137
 138         if (napi_schedule_prep(&rx_ring->napi)) {
 139                 disable_irq_nosync(irq);
 140                 __napi_schedule(&rx_ring->napi);
 141         }
 142
 143         return IRQ_HANDLED;
 144 }
 145
 146 static int xgene_enet_tx_completion(struct xgene_enet_desc_ring *cp_ring,
 147                                     struct xgene_enet_raw_desc *raw_desc)
 148 {
 149         struct sk_buff *skb;
 150         struct device *dev;
 151         u16 skb_index;
 152         u8 status;
 153         int ret = 0;
 154
 155         skb_index = GET_VAL(USERINFO, le64_to_cpu(raw_desc->m0));
 156         skb = cp_ring->cp_skb[skb_index];
 157
 158         dev = ndev_to_dev(cp_ring->ndev);
 159         dma_unmap_single(dev, GET_VAL(DATAADDR, le64_to_cpu(raw_desc->m1)),
 160                          GET_VAL(BUFDATALEN, le64_to_cpu(raw_desc->m1)),
 161                          DMA_TO_DEVICE);
 162
 163         /* Checking for error */
 164         status = GET_VAL(LERR, le64_to_cpu(raw_desc->m0));
 165         if (unlikely(status > 2)) {
 166                 xgene_enet_parse_error(cp_ring, netdev_priv(cp_ring->ndev),
 167                                        status);
 168                 ret = -EIO;
 169         }
 170
 171         if (likely(skb)) {
 172                 dev_kfree_skb_any(skb);
 173         } else {
 174                 netdev_err(cp_ring->ndev, "completion skb is NULL\n");
 175                 ret = -EIO;
 176         }
 177
 178         return ret;
 179 }
 180
 181 static u64 xgene_enet_work_msg(struct sk_buff *skb)
 182 {
 183         struct iphdr *iph;
 184         u8 l3hlen, l4hlen = 0;
 185         u8 csum_enable = 0;
 186         u8 proto = 0;
 187         u8 ethhdr;
 188         u64 hopinfo;
 189
 190         if (unlikely(skb->protocol != htons(ETH_P_IP)) &&
 191             unlikely(skb->protocol != htons(ETH_P_8021Q)))
 192                 goto out;
 193
 194         if (unlikely(!(skb->dev->features & NETIF_F_IP_CSUM)))
 195                 goto out;
 196
 197         iph = ip_hdr(skb);
 198         if (unlikely(ip_is_fragment(iph)))
 199                 goto out;
 200
 201         if (likely(iph->protocol == IPPROTO_TCP)) {
 202                 l4hlen = tcp_hdrlen(skb) >> 2;
 203                 csum_enable = 1;
 204                 proto = TSO_IPPROTO_TCP;
 205         } else if (iph->protocol == IPPROTO_UDP) {
 206                 l4hlen = UDP_HDR_SIZE;
 207                 csum_enable = 1;
 208         }
 209 out:
 210         l3hlen = ip_hdrlen(skb) >> 2;
 211         ethhdr = xgene_enet_hdr_len(skb->data);
 212         hopinfo = SET_VAL(TCPHDR, l4hlen) |
 213                   SET_VAL(IPHDR, l3hlen) |
 214                   SET_VAL(ETHHDR, ethhdr) |
 215                   SET_VAL(EC, csum_enable) |
 216                   SET_VAL(IS, proto) |
 217                   SET_BIT(IC) |
 218                   SET_BIT(TYPE_ETH_WORK_MESSAGE);
 219
 220         return hopinfo;
 221 }
 222
 223 static int xgene_enet_setup_tx_desc(struct xgene_enet_desc_ring *tx_ring,
 224                                     struct sk_buff *skb)
 225 {
 226         struct device *dev = ndev_to_dev(tx_ring->ndev);
 227         struct xgene_enet_raw_desc *raw_desc;
 228         dma_addr_t dma_addr;
 229         u16 tail = tx_ring->tail;
 230         u64 hopinfo;
 231
 232         raw_desc = &tx_ring->raw_desc[tail];
 233         memset(raw_desc, 0, sizeof(struct xgene_enet_raw_desc));
 234
 235         dma_addr = dma_map_single(dev, skb->data, skb->len, DMA_TO_DEVICE);
 236         if (dma_mapping_error(dev, dma_addr)) {
 237                 netdev_err(tx_ring->ndev, "DMA mapping error\n");
 238                 return -EINVAL;
 239         }
 240
 241         /* Hardware expects descriptor in little endian format */
 242         raw_desc->m0 = cpu_to_le64(tail);
 243         raw_desc->m1 = cpu_to_le64(SET_VAL(DATAADDR, dma_addr) |
 244                                    SET_VAL(BUFDATALEN, skb->len) |
 245                                    SET_BIT(COHERENT));
 246         hopinfo = xgene_enet_work_msg(skb);
 247         raw_desc->m3 = cpu_to_le64(SET_VAL(HENQNUM, tx_ring->dst_ring_num) |
 248                                    hopinfo);
 249         tx_ring->cp_ring->cp_skb[tail] = skb;
 250
 251         return 0;
 252 }
 253
 254 static netdev_tx_t xgene_enet_start_xmit(struct sk_buff *skb,
 255                                          struct net_device *ndev)
 256 {
 257         struct xgene_enet_pdata *pdata = netdev_priv(ndev);
 258         struct xgene_enet_desc_ring *tx_ring = pdata->tx_ring;
 259         struct xgene_enet_desc_ring *cp_ring = tx_ring->cp_ring;
 260         u32 tx_level, cq_level;
 261
 262         tx_level = xgene_enet_ring_len(tx_ring);
 263         cq_level = xgene_enet_ring_len(cp_ring);
 264         if (unlikely(tx_level > pdata->tx_qcnt_hi ||
 265                      cq_level > pdata->cp_qcnt_hi)) {
 266                 netif_stop_queue(ndev);
 267                 return NETDEV_TX_BUSY;
 268         }
 269
 270         if (xgene_enet_setup_tx_desc(tx_ring, skb)) {
 271                 dev_kfree_skb_any(skb);
 272                 return NETDEV_TX_OK;
 273         }
 274
 275         iowrite32(1, tx_ring->cmd);
 276         skb_tx_timestamp(skb);
 277         tx_ring->tail = (tx_ring->tail + 1) & (tx_ring->slots - 1);
 278
 279         pdata->stats.tx_packets++;
 280         pdata->stats.tx_bytes += skb->len;
 281
 282         return NETDEV_TX_OK;
 283 }
 284
 285 static void xgene_enet_skip_csum(struct sk_buff *skb)
 286 {
 287         struct iphdr *iph = ip_hdr(skb);
 288
 289         if (!ip_is_fragment(iph) ||
 290             (iph->protocol != IPPROTO_TCP && iph->protocol != IPPROTO_UDP)) {
 291                 skb->ip_summed = CHECKSUM_UNNECESSARY;
 292         }
 293 }
 294
 295 static int xgene_enet_rx_frame(struct xgene_enet_desc_ring *rx_ring,
 296                                struct xgene_enet_raw_desc *raw_desc)
 297 {
 298         struct net_device *ndev;
 299         struct xgene_enet_pdata *pdata;
 300         struct device *dev;
 301         struct xgene_enet_desc_ring *buf_pool;
 302         u32 datalen, skb_index;
 303         struct sk_buff *skb;
 304         u8 status;
 305         int ret = 0;
 306
 307         ndev = rx_ring->ndev;
 308         pdata = netdev_priv(ndev);
 309         dev = ndev_to_dev(rx_ring->ndev);
 310         buf_pool = rx_ring->buf_pool;
 311
 312         dma_unmap_single(dev, GET_VAL(DATAADDR, le64_to_cpu(raw_desc->m1)),
 313                          XGENE_ENET_MAX_MTU, DMA_FROM_DEVICE);
 314         skb_index = GET_VAL(USERINFO, le64_to_cpu(raw_desc->m0));
 315         skb = buf_pool->rx_skb[skb_index];
 316
 317         /* checking for error */
 318         status = GET_VAL(LERR, le64_to_cpu(raw_desc->m0));
 319         if (unlikely(status > 2)) {
 320                 dev_kfree_skb_any(skb);
 321                 xgene_enet_parse_error(rx_ring, netdev_priv(rx_ring->ndev),
 322                                        status);
 323                 pdata->stats.rx_dropped++;
 324                 ret = -EIO;
 325                 goto out;
 326         }
 327
 328         /* strip off CRC as HW isn't doing this */
 329         datalen = GET_VAL(BUFDATALEN, le64_to_cpu(raw_desc->m1));
 330         datalen -= 4;
 331         prefetch(skb->data - NET_IP_ALIGN);
 332         skb_put(skb, datalen);
 333
 334         skb_checksum_none_assert(skb);
 335         skb->protocol = eth_type_trans(skb, ndev);
 336         if (likely((ndev->features & NETIF_F_IP_CSUM) &&
 337                    skb->protocol == htons(ETH_P_IP))) {
 338                 xgene_enet_skip_csum(skb);
 339         }
 340
 341         pdata->stats.rx_packets++;
 342         pdata->stats.rx_bytes += datalen;
 343         napi_gro_receive(&rx_ring->napi, skb);
 344 out:
 345         if (--rx_ring->nbufpool == 0) {
 346                 ret = xgene_enet_refill_bufpool(buf_pool, NUM_BUFPOOL);
 347                 rx_ring->nbufpool = NUM_BUFPOOL;
 348         }
 349
 350         return ret;
 351 }
 352
 353 static bool is_rx_desc(struct xgene_enet_raw_desc *raw_desc)
 354 {
 355         return GET_VAL(FPQNUM, le64_to_cpu(raw_desc->m0)) ? true : false;
 356 }
 357
 358 static int xgene_enet_process_ring(struct xgene_enet_desc_ring *ring,
 359                                    int budget)
 360 {
 361         struct xgene_enet_pdata *pdata = netdev_priv(ring->ndev);
 362         struct xgene_enet_raw_desc *raw_desc;
 363         u16 head = ring->head;
 364         u16 slots = ring->slots - 1;
 365         int ret, count = 0;
 366
 367         do {
 368                 raw_desc = &ring->raw_desc[head];
 369                 if (unlikely(xgene_enet_is_desc_slot_empty(raw_desc)))
 370                         break;
 371
 372                 /* read fpqnum field after dataaddr field */
 373                 dma_rmb();
 374                 if (is_rx_desc(raw_desc))
 375                         ret = xgene_enet_rx_frame(ring, raw_desc);
 376                 else
 377                         ret = xgene_enet_tx_completion(ring, raw_desc);
 378                 xgene_enet_mark_desc_slot_empty(raw_desc);
 379
 380                 head = (head + 1) & slots;
 381                 count++;
 382
 383                 if (ret)
 384                         break;
 385         } while (--budget);
 386
 387         if (likely(count)) {
 388                 iowrite32(-count, ring->cmd);
 389                 ring->head = head;
 390
 391                 if (netif_queue_stopped(ring->ndev)) {
 392                         if (xgene_enet_ring_len(ring) < pdata->cp_qcnt_low)
 393                                 netif_wake_queue(ring->ndev);
 394                 }
 395         }
 396
 397         return count;
 398 }
 399
 400 static int xgene_enet_napi(struct napi_struct *napi, const int budget)
 401 {
 402         struct xgene_enet_desc_ring *ring;
 403         int processed;
 404
 405         ring = container_of(napi, struct xgene_enet_desc_ring, napi);
 406         processed = xgene_enet_process_ring(ring, budget);
 407
 408         if (processed != budget) {
 409                 napi_complete(napi);
 410                 enable_irq(ring->irq);
 411         }
 412
 413         return processed;
 414 }
 415
 416 static void xgene_enet_timeout(struct net_device *ndev)
 417 {
 418         struct xgene_enet_pdata *pdata = netdev_priv(ndev);
 419
 420         pdata->mac_ops->reset(pdata);
 421 }
 422
 423 static int xgene_enet_register_irq(struct net_device *ndev)
 424 {
 425         struct xgene_enet_pdata *pdata = netdev_priv(ndev);
 426         struct device *dev = ndev_to_dev(ndev);
 427         int ret;
 428
 429         ret = devm_request_irq(dev, pdata->rx_ring->irq, xgene_enet_rx_irq,
 430                                IRQF_SHARED, ndev->name, pdata->rx_ring);
 431         if (ret) {
 432                 netdev_err(ndev, "rx%d interrupt request failed\n",
 433                            pdata->rx_ring->irq);
 434         }
 435
 436         return ret;
 437 }
 438
 439 static void xgene_enet_free_irq(struct net_device *ndev)
 440 {
 441         struct xgene_enet_pdata *pdata;
 442         struct device *dev;
 443
 444         pdata = netdev_priv(ndev);
 445         dev = ndev_to_dev(ndev);
 446         devm_free_irq(dev, pdata->rx_ring->irq, pdata->rx_ring);
 447 }
 448
 449 static int xgene_enet_open(struct net_device *ndev)
 450 {
 451         struct xgene_enet_pdata *pdata = netdev_priv(ndev);
 452         struct xgene_mac_ops *mac_ops = pdata->mac_ops;
 453         int ret;
 454
 455         mac_ops->tx_enable(pdata);
 456         mac_ops->rx_enable(pdata);
 457
 458         ret = xgene_enet_register_irq(ndev);
 459         if (ret)
 460                 return ret;
 461         napi_enable(&pdata->rx_ring->napi);
 462
 463         if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII)
 464                 phy_start(pdata->phy_dev);
 465         else
 466                 schedule_delayed_work(&pdata->link_work, PHY_POLL_LINK_OFF);
 467
 468         netif_start_queue(ndev);
 469
 470         return ret;
 471 }
 472
 473 static int xgene_enet_close(struct net_device *ndev)
 474 {
 475         struct xgene_enet_pdata *pdata = netdev_priv(ndev);
 476         struct xgene_mac_ops *mac_ops = pdata->mac_ops;
 477
 478         netif_stop_queue(ndev);
 479
 480         if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII)
 481                 phy_stop(pdata->phy_dev);
 482         else
 483                 cancel_delayed_work_sync(&pdata->link_work);
 484
 485         napi_disable(&pdata->rx_ring->napi);
 486         xgene_enet_free_irq(ndev);
 487         xgene_enet_process_ring(pdata->rx_ring, -1);
 488
 489         mac_ops->tx_disable(pdata);
 490         mac_ops->rx_disable(pdata);
 491
 492         return 0;
 493 }
 494
 495 static void xgene_enet_delete_ring(struct xgene_enet_desc_ring *ring)
 496 {
 497         struct xgene_enet_pdata *pdata;
 498         struct device *dev;
 499
 500         pdata = netdev_priv(ring->ndev);
 501         dev = ndev_to_dev(ring->ndev);
 502
 503         xgene_enet_clear_ring(ring);
 504         dma_free_coherent(dev, ring->size, ring->desc_addr, ring->dma);
 505 }
 506
 507 static void xgene_enet_delete_desc_rings(struct xgene_enet_pdata *pdata)
 508 {
 509         struct xgene_enet_desc_ring *buf_pool;
 510
 511         if (pdata->tx_ring) {
 512                 xgene_enet_delete_ring(pdata->tx_ring);
 513                 pdata->tx_ring = NULL;
 514         }
 515
 516         if (pdata->rx_ring) {
 517                 buf_pool = pdata->rx_ring->buf_pool;
 518                 xgene_enet_delete_bufpool(buf_pool);
 519                 xgene_enet_delete_ring(buf_pool);
 520                 xgene_enet_delete_ring(pdata->rx_ring);
 521                 pdata->rx_ring = NULL;
 522         }
 523 }
 524
 525 static int xgene_enet_get_ring_size(struct device *dev,
 526                                     enum xgene_enet_ring_cfgsize cfgsize)
 527 {
 528         int size = -EINVAL;
 529
 530         switch (cfgsize) {
 531         case RING_CFGSIZE_512B:
 532                 size = 0x200;
 533                 break;
 534         case RING_CFGSIZE_2KB:
 535                 size = 0x800;
 536                 break;
 537         case RING_CFGSIZE_16KB:
 538                 size = 0x4000;
 539                 break;
 540         case RING_CFGSIZE_64KB:
 541                 size = 0x10000;
 542                 break;
 543         case RING_CFGSIZE_512KB:
 544                 size = 0x80000;
 545                 break;
 546         default:
 547                 dev_err(dev, "Unsupported cfg ring size %d\n", cfgsize);
 548                 break;
 549         }
 550
 551         return size;
 552 }
 553
 554 static void xgene_enet_free_desc_ring(struct xgene_enet_desc_ring *ring)
 555 {
 556         struct device *dev;
 557
 558         if (!ring)
 559                 return;
 560
 561         dev = ndev_to_dev(ring->ndev);
 562
 563         if (ring->desc_addr) {
 564                 xgene_enet_clear_ring(ring);
 565                 dma_free_coherent(dev, ring->size, ring->desc_addr, ring->dma);
 566         }
 567         devm_kfree(dev, ring);
 568 }
 569
 570 static void xgene_enet_free_desc_rings(struct xgene_enet_pdata *pdata)
 571 {
 572         struct device *dev = &pdata->pdev->dev;
 573         struct xgene_enet_desc_ring *ring;
 574
 575         ring = pdata->tx_ring;
 576         if (ring) {
 577                 if (ring->cp_ring && ring->cp_ring->cp_skb)
 578                         devm_kfree(dev, ring->cp_ring->cp_skb);
 579                 xgene_enet_free_desc_ring(ring);
 580         }
 581
 582         ring = pdata->rx_ring;
 583         if (ring) {
 584                 if (ring->buf_pool) {
 585                         if (ring->buf_pool->rx_skb)
 586                                 devm_kfree(dev, ring->buf_pool->rx_skb);
 587                         xgene_enet_free_desc_ring(ring->buf_pool);
 588                 }
 589                 xgene_enet_free_desc_ring(ring);
 590         }
 591 }
 592
 593 static struct xgene_enet_desc_ring *xgene_enet_create_desc_ring(
 594                         struct net_device *ndev, u32 ring_num,
 595                         enum xgene_enet_ring_cfgsize cfgsize, u32 ring_id)
 596 {
 597         struct xgene_enet_desc_ring *ring;
 598         struct xgene_enet_pdata *pdata = netdev_priv(ndev);
 599         struct device *dev = ndev_to_dev(ndev);
 600         int size;
 601
 602         size = xgene_enet_get_ring_size(dev, cfgsize);
 603         if (size < 0)
 604                 return NULL;
 605
 606         ring = devm_kzalloc(dev, sizeof(struct xgene_enet_desc_ring),
 607                             GFP_KERNEL);
 608         if (!ring)
 609                 return NULL;
 610
 611         ring->ndev = ndev;
 612         ring->num = ring_num;
 613         ring->cfgsize = cfgsize;
 614         ring->id = ring_id;
 615
 616         ring->desc_addr = dma_zalloc_coherent(dev, size, &ring->dma,
 617                                               GFP_KERNEL);
 618         if (!ring->desc_addr) {
 619                 devm_kfree(dev, ring);
 620                 return NULL;
 621         }
 622         ring->size = size;
 623
 624         ring->cmd_base = pdata->ring_cmd_addr + (ring->num << 6);
 625         ring->cmd = ring->cmd_base + INC_DEC_CMD_ADDR;
 626         ring = xgene_enet_setup_ring(ring);
 627         netdev_dbg(ndev, "ring info: num=%d  size=%d  id=%d  slots=%d\n",
 628                    ring->num, ring->size, ring->id, ring->slots);
 629
 630         return ring;
 631 }
 632
 633 static u16 xgene_enet_get_ring_id(enum xgene_ring_owner owner, u8 bufnum)
 634 {
 635         return (owner << 6) | (bufnum & GENMASK(5, 0));
 636 }
 637
 638 static int xgene_enet_create_desc_rings(struct net_device *ndev)
 639 {
 640         struct xgene_enet_pdata *pdata = netdev_priv(ndev);
 641         struct device *dev = ndev_to_dev(ndev);
 642         struct xgene_enet_desc_ring *rx_ring, *tx_ring, *cp_ring;
 643         struct xgene_enet_desc_ring *buf_pool = NULL;
 644         u8 cpu_bufnum = 0, eth_bufnum = START_ETH_BUFNUM;
 645         u8 bp_bufnum = START_BP_BUFNUM;
 646         u16 ring_id, ring_num = START_RING_NUM;
 647         int ret;
 648
 649         /* allocate rx descriptor ring */
 650         ring_id = xgene_enet_get_ring_id(RING_OWNER_CPU, cpu_bufnum++);
 651         rx_ring = xgene_enet_create_desc_ring(ndev, ring_num++,
 652                                               RING_CFGSIZE_16KB, ring_id);
 653         if (!rx_ring) {
 654                 ret = -ENOMEM;
 655                 goto err;
 656         }
 657
 658         /* allocate buffer pool for receiving packets */
 659         ring_id = xgene_enet_get_ring_id(RING_OWNER_ETH0, bp_bufnum++);
 660         buf_pool = xgene_enet_create_desc_ring(ndev, ring_num++,
 661                                                RING_CFGSIZE_2KB, ring_id);
 662         if (!buf_pool) {
 663                 ret = -ENOMEM;
 664                 goto err;
 665         }
 666
 667         rx_ring->nbufpool = NUM_BUFPOOL;
 668         rx_ring->buf_pool = buf_pool;
 669         rx_ring->irq = pdata->rx_irq;
 670         buf_pool->rx_skb = devm_kcalloc(dev, buf_pool->slots,
 671                                         sizeof(struct sk_buff *), GFP_KERNEL);
 672         if (!buf_pool->rx_skb) {
 673                 ret = -ENOMEM;
 674                 goto err;
 675         }
 676
 677         buf_pool->dst_ring_num = xgene_enet_dst_ring_num(buf_pool);
 678         rx_ring->buf_pool = buf_pool;
 679         pdata->rx_ring = rx_ring;
 680
 681         /* allocate tx descriptor ring */
 682         ring_id = xgene_enet_get_ring_id(RING_OWNER_ETH0, eth_bufnum++);
 683         tx_ring = xgene_enet_create_desc_ring(ndev, ring_num++,
 684                                               RING_CFGSIZE_16KB, ring_id);
 685         if (!tx_ring) {
 686                 ret = -ENOMEM;
 687                 goto err;
 688         }
 689         pdata->tx_ring = tx_ring;
 690
 691         cp_ring = pdata->rx_ring;
 692         cp_ring->cp_skb = devm_kcalloc(dev, tx_ring->slots,
 693                                        sizeof(struct sk_buff *), GFP_KERNEL);
 694         if (!cp_ring->cp_skb) {
 695                 ret = -ENOMEM;
 696                 goto err;
 697         }
 698         pdata->tx_ring->cp_ring = cp_ring;
 699         pdata->tx_ring->dst_ring_num = xgene_enet_dst_ring_num(cp_ring);
 700
 701         pdata->tx_qcnt_hi = pdata->tx_ring->slots / 2;
 702         pdata->cp_qcnt_hi = pdata->rx_ring->slots / 2;
 703         pdata->cp_qcnt_low = pdata->cp_qcnt_hi / 2;
 704
 705         return 0;
 706
 707 err:
 708         xgene_enet_free_desc_rings(pdata);
 709         return ret;
 710 }
 711
 712 static struct rtnl_link_stats64 *xgene_enet_get_stats64(
 713                         struct net_device *ndev,
 714                         struct rtnl_link_stats64 *storage)
 715 {
 716         struct xgene_enet_pdata *pdata = netdev_priv(ndev);
 717         struct rtnl_link_stats64 *stats = &pdata->stats;
 718
 719         stats->rx_errors += stats->rx_length_errors +
 720                             stats->rx_crc_errors +
 721                             stats->rx_frame_errors +
 722                             stats->rx_fifo_errors;
 723         memcpy(storage, &pdata->stats, sizeof(struct rtnl_link_stats64));
 724
 725         return storage;
 726 }
 727
 728 static int xgene_enet_set_mac_address(struct net_device *ndev, void *addr)
 729 {
 730         struct xgene_enet_pdata *pdata = netdev_priv(ndev);
 731         int ret;
 732
 733         ret = eth_mac_addr(ndev, addr);
 734         if (ret)
 735                 return ret;
 736         pdata->mac_ops->set_mac_addr(pdata);
 737
 738         return ret;
 739 }
 740
 741 static const struct net_device_ops xgene_ndev_ops = {
 742         .ndo_open = xgene_enet_open,
 743         .ndo_stop = xgene_enet_close,
 744         .ndo_start_xmit = xgene_enet_start_xmit,
 745         .ndo_tx_timeout = xgene_enet_timeout,
 746         .ndo_get_stats64 = xgene_enet_get_stats64,
 747         .ndo_change_mtu = eth_change_mtu,
 748         .ndo_set_mac_address = xgene_enet_set_mac_address,
 749 };
 750
 751 static int xgene_enet_get_resources(struct xgene_enet_pdata *pdata)
 752 {
 753         struct platform_device *pdev;
 754         struct net_device *ndev;
 755         struct device *dev;
 756         struct resource *res;
 757         void __iomem *base_addr;
 758         const char *mac;
 759         int ret;
 760
 761         pdev = pdata->pdev;
 762         dev = &pdev->dev;
 763         ndev = pdata->ndev;
 764
 765         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "enet_csr");
 766         pdata->base_addr = devm_ioremap_resource(dev, res);
 767         if (IS_ERR(pdata->base_addr)) {
 768                 dev_err(dev, "Unable to retrieve ENET Port CSR region\n");
 769                 return PTR_ERR(pdata->base_addr);
 770         }
 771
 772         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ring_csr");
 773         pdata->ring_csr_addr = devm_ioremap_resource(dev, res);
 774         if (IS_ERR(pdata->ring_csr_addr)) {
 775                 dev_err(dev, "Unable to retrieve ENET Ring CSR region\n");
 776                 return PTR_ERR(pdata->ring_csr_addr);
 777         }
 778
 779         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ring_cmd");
 780         pdata->ring_cmd_addr = devm_ioremap_resource(dev, res);
 781         if (IS_ERR(pdata->ring_cmd_addr)) {
 782                 dev_err(dev, "Unable to retrieve ENET Ring command region\n");
 783                 return PTR_ERR(pdata->ring_cmd_addr);
 784         }
 785
 786         ret = platform_get_irq(pdev, 0);
 787         if (ret <= 0) {
 788                 dev_err(dev, "Unable to get ENET Rx IRQ\n");
 789                 ret = ret ? : -ENXIO;
 790                 return ret;
 791         }
 792         pdata->rx_irq = ret;
 793
 794         mac = of_get_mac_address(dev->of_node);
 795         if (mac)
 796                 memcpy(ndev->dev_addr, mac, ndev->addr_len);
 797         else
 798                 eth_hw_addr_random(ndev);
 799         memcpy(ndev->perm_addr, ndev->dev_addr, ndev->addr_len);
 800
 801         pdata->phy_mode = of_get_phy_mode(pdev->dev.of_node);
 802         if (pdata->phy_mode < 0) {
 803                 dev_err(dev, "Unable to get phy-connection-type\n");
 804                 return pdata->phy_mode;
 805         }
 806         if (pdata->phy_mode != PHY_INTERFACE_MODE_RGMII &&
 807             pdata->phy_mode != PHY_INTERFACE_MODE_SGMII &&
 808             pdata->phy_mode != PHY_INTERFACE_MODE_XGMII) {
 809                 dev_err(dev, "Incorrect phy-connection-type specified\n");
 810                 return -ENODEV;
 811         }
 812
 813         pdata->clk = devm_clk_get(&pdev->dev, NULL);
 814         ret = IS_ERR(pdata->clk);
 815         if (IS_ERR(pdata->clk)) {
 816                 dev_err(&pdev->dev, "can't get clock\n");
 817                 ret = PTR_ERR(pdata->clk);
 818                 return ret;
 819         }
 820
 821         base_addr = pdata->base_addr;
 822         pdata->eth_csr_addr = base_addr + BLOCK_ETH_CSR_OFFSET;
 823         pdata->eth_ring_if_addr = base_addr + BLOCK_ETH_RING_IF_OFFSET;
 824         pdata->eth_diag_csr_addr = base_addr + BLOCK_ETH_DIAG_CSR_OFFSET;
 825         if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII ||
 826             pdata->phy_mode == PHY_INTERFACE_MODE_SGMII) {
 827                 pdata->mcx_mac_addr = base_addr + BLOCK_ETH_MAC_OFFSET;
 828                 pdata->mcx_mac_csr_addr = base_addr + BLOCK_ETH_MAC_CSR_OFFSET;
 829         } else {
 830                 pdata->mcx_mac_addr = base_addr + BLOCK_AXG_MAC_OFFSET;
 831                 pdata->mcx_mac_csr_addr = base_addr + BLOCK_AXG_MAC_CSR_OFFSET;
 832         }
 833         pdata->rx_buff_cnt = NUM_PKT_BUF;
 834
 835         return 0;
 836 }
 837
 838 static int xgene_enet_init_hw(struct xgene_enet_pdata *pdata)
 839 {
 840         struct net_device *ndev = pdata->ndev;
 841         struct xgene_enet_desc_ring *buf_pool;
 842         u16 dst_ring_num;
 843         int ret;
 844
 845         ret = pdata->port_ops->reset(pdata);
 846         if (ret)
 847                 return ret;
 848
 849         ret = xgene_enet_create_desc_rings(ndev);
 850         if (ret) {
 851                 netdev_err(ndev, "Error in ring configuration\n");
 852                 return ret;
 853         }
 854
 855         /* setup buffer pool */
 856         buf_pool = pdata->rx_ring->buf_pool;
 857         xgene_enet_init_bufpool(buf_pool);
 858         ret = xgene_enet_refill_bufpool(buf_pool, pdata->rx_buff_cnt);
 859         if (ret) {
 860                 xgene_enet_delete_desc_rings(pdata);
 861                 return ret;
 862         }
 863
 864         dst_ring_num = xgene_enet_dst_ring_num(pdata->rx_ring);
 865         pdata->port_ops->cle_bypass(pdata, dst_ring_num, buf_pool->id);
 866         pdata->mac_ops->init(pdata);
 867
 868         return ret;
 869 }
 870
 871 static void xgene_enet_setup_ops(struct xgene_enet_pdata *pdata)
 872 {
 873         switch (pdata->phy_mode) {
 874         case PHY_INTERFACE_MODE_RGMII:
 875                 pdata->mac_ops = &xgene_gmac_ops;
 876                 pdata->port_ops = &xgene_gport_ops;
 877                 pdata->rm = RM3;
 878                 break;
 879         case PHY_INTERFACE_MODE_SGMII:
 880                 pdata->mac_ops = &xgene_sgmac_ops;
 881                 pdata->port_ops = &xgene_sgport_ops;
 882                 pdata->rm = RM1;
 883                 break;
 884         default:
 885                 pdata->mac_ops = &xgene_xgmac_ops;
 886                 pdata->port_ops = &xgene_xgport_ops;
 887                 pdata->rm = RM0;
 888                 break;
 889         }
 890 }
 891
 892 static int xgene_enet_probe(struct platform_device *pdev)
 893 {
 894         struct net_device *ndev;
 895         struct xgene_enet_pdata *pdata;
 896         struct device *dev = &pdev->dev;
 897         struct napi_struct *napi;
 898         struct xgene_mac_ops *mac_ops;
 899         int ret;
 900
 901         ndev = alloc_etherdev(sizeof(struct xgene_enet_pdata));
 902         if (!ndev)
 903                 return -ENOMEM;
 904
 905         pdata = netdev_priv(ndev);
 906
 907         pdata->pdev = pdev;
 908         pdata->ndev = ndev;
 909         SET_NETDEV_DEV(ndev, dev);
 910         platform_set_drvdata(pdev, pdata);
 911         ndev->netdev_ops = &xgene_ndev_ops;
 912         xgene_enet_set_ethtool_ops(ndev);
 913         ndev->features |= NETIF_F_IP_CSUM |
 914                           NETIF_F_GSO |
 915                           NETIF_F_GRO;
 916
 917         ret = xgene_enet_get_resources(pdata);
 918         if (ret)
 919                 goto err;
 920
 921         xgene_enet_setup_ops(pdata);
 922
 923         ret = register_netdev(ndev);
 924         if (ret) {
 925                 netdev_err(ndev, "Failed to register netdev\n");
 926                 goto err;
 927         }
 928
 929         ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
 930         if (ret) {
 931                 netdev_err(ndev, "No usable DMA configuration\n");
 932                 goto err;
 933         }
 934
 935         ret = xgene_enet_init_hw(pdata);
 936         if (ret)
 937                 goto err;
 938
 939         napi = &pdata->rx_ring->napi;
 940         netif_napi_add(ndev, napi, xgene_enet_napi, NAPI_POLL_WEIGHT);
 941         mac_ops = pdata->mac_ops;
 942         if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII)
 943                 ret = xgene_enet_mdio_config(pdata);
 944         else
 945                 INIT_DELAYED_WORK(&pdata->link_work, mac_ops->link_state);
 946
 947         return ret;
 948 err:
 949         unregister_netdev(ndev);
 950         free_netdev(ndev);
 951         return ret;
 952 }
 953
 954 static int xgene_enet_remove(struct platform_device *pdev)
 955 {
 956         struct xgene_enet_pdata *pdata;
 957         struct xgene_mac_ops *mac_ops;
 958         struct net_device *ndev;
 959
 960         pdata = platform_get_drvdata(pdev);
 961         mac_ops = pdata->mac_ops;
 962         ndev = pdata->ndev;
 963
 964         mac_ops->rx_disable(pdata);
 965         mac_ops->tx_disable(pdata);
 966
 967         netif_napi_del(&pdata->rx_ring->napi);
 968         xgene_enet_mdio_remove(pdata);
 969         xgene_enet_delete_desc_rings(pdata);
 970         unregister_netdev(ndev);
 971         pdata->port_ops->shutdown(pdata);
 972         free_netdev(ndev);
 973
 974         return 0;
 975 }
 976
 977 static struct of_device_id xgene_enet_match[] = {
 978         {.compatible = "apm,xgene-enet",},
 979         {},
 980 };
 981
 982 MODULE_DEVICE_TABLE(of, xgene_enet_match);
 983
 984 static struct platform_driver xgene_enet_driver = {
 985         .driver = {
 986                    .name = "xgene-enet",
 987                    .of_match_table = xgene_enet_match,
 988         },
 989         .probe = xgene_enet_probe,
 990         .remove = xgene_enet_remove,
 991 };
 992
 993 module_platform_driver(xgene_enet_driver);
 994
 995 MODULE_DESCRIPTION("APM X-Gene SoC Ethernet driver");
 996 MODULE_VERSION(XGENE_DRV_VERSION);
 997 MODULE_AUTHOR("Iyappan Subramanian <isubramanian@apm.com>");
 998 MODULE_AUTHOR("Keyur Chudgar <kchudgar@apm.com>");
 999 MODULE_LICENSE("GPL");