3 * Alchemy Au1x00 ethernet driver
5 * Copyright 2001-2003, 2006 MontaVista Software Inc.
6 * Copyright 2002 TimeSys Corp.
7 * Added ethtool/mii-tool support,
8 * Copyright 2004 Matt Porter <mporter@kernel.crashing.org>
9 * Update: 2004 Bjoern Riemer, riemer@fokus.fraunhofer.de
10 * or riemer@riemer-nt.de: fixed the link beat detection with
11 * ioctls (SIOCGMIIPHY)
12 * Copyright 2006 Herbert Valerio Riedel <hvr@gnu.org>
13 * converted to use linux-2.6.x's PHY framework
15 * Author: MontaVista Software, Inc.
16 * ppopov@mvista.com or source@mvista.com
18 * ########################################################################
20 * This program is free software; you can distribute it and/or modify it
21 * under the terms of the GNU General Public License (Version 2) as
22 * published by the Free Software Foundation.
24 * This program is distributed in the hope it will be useful, but WITHOUT
25 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
26 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
29 * You should have received a copy of the GNU General Public License along
30 * with this program; if not, see <http://www.gnu.org/licenses/>.
32 * ########################################################################
36 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
38 #include <linux/capability.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/module.h>
41 #include <linux/kernel.h>
42 #include <linux/string.h>
43 #include <linux/timer.h>
44 #include <linux/errno.h>
46 #include <linux/ioport.h>
47 #include <linux/bitops.h>
48 #include <linux/slab.h>
49 #include <linux/interrupt.h>
50 #include <linux/init.h>
51 #include <linux/netdevice.h>
52 #include <linux/etherdevice.h>
53 #include <linux/ethtool.h>
54 #include <linux/mii.h>
55 #include <linux/skbuff.h>
56 #include <linux/delay.h>
57 #include <linux/crc32.h>
58 #include <linux/phy.h>
59 #include <linux/platform_device.h>
60 #include <linux/cpu.h>
63 #include <asm/mipsregs.h>
65 #include <asm/processor.h>
68 #include <au1xxx_eth.h>
71 #include "au1000_eth.h"
73 #ifdef AU1000_ETH_DEBUG
74 static int au1000_debug = 5;
76 static int au1000_debug = 3;
79 #define AU1000_DEF_MSG_ENABLE (NETIF_MSG_DRV | \
83 #define DRV_NAME "au1000_eth"
84 #define DRV_VERSION "1.7"
85 #define DRV_AUTHOR "Pete Popov <ppopov@embeddedalley.com>"
86 #define DRV_DESC "Au1xxx on-chip Ethernet driver"
88 MODULE_AUTHOR(DRV_AUTHOR);
89 MODULE_DESCRIPTION(DRV_DESC);
90 MODULE_LICENSE("GPL");
91 MODULE_VERSION(DRV_VERSION);
96 * The Au1000 MACs use a simple rx and tx descriptor ring scheme.
97 * There are four receive and four transmit descriptors. These
98 * descriptors are not in memory; rather, they are just a set of
101 * Since the Au1000 has a coherent data cache, the receive and
102 * transmit buffers are allocated from the KSEG0 segment. The
103 * hardware registers, however, are still mapped at KSEG1 to
104 * make sure there's no out-of-order writes, and that all writes
105 * complete immediately.
109 * board-specific configurations
111 * PHY detection algorithm
113 * If phy_static_config is undefined, the PHY setup is
116 * mii_probe() first searches the current MAC's MII bus for a PHY,
117 * selecting the first (or last, if phy_search_highest_addr is
118 * defined) PHY address not already claimed by another netdev.
120 * If nothing was found that way when searching for the 2nd ethernet
121 * controller's PHY and phy1_search_mac0 is defined, then
122 * the first MII bus is searched as well for an unclaimed PHY; this is
123 * needed in case of a dual-PHY accessible only through the MAC0's MII
126 * Finally, if no PHY is found, then the corresponding ethernet
127 * controller is not registered to the network subsystem.
130 /* autodetection defaults: phy1_search_mac0 */
134 * most boards PHY setup should be detectable properly with the
135 * autodetection algorithm in mii_probe(), but in some cases (e.g. if
136 * you have a switch attached, or want to use the PHY's interrupt
137 * notification capabilities) you can provide a static PHY
140 * IRQs may only be set, if a PHY address was configured
141 * If a PHY address is given, also a bus id is required to be set
143 * ps: make sure the used irqs are configured properly in the board
147 static void au1000_enable_mac(struct net_device *dev, int force_reset)
150 struct au1000_private *aup = netdev_priv(dev);
152 spin_lock_irqsave(&aup->lock, flags);
154 if (force_reset || (!aup->mac_enabled)) {
155 writel(MAC_EN_CLOCK_ENABLE, aup->enable);
157 writel((MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2
158 | MAC_EN_CLOCK_ENABLE), aup->enable);
161 aup->mac_enabled = 1;
164 spin_unlock_irqrestore(&aup->lock, flags);
170 static int au1000_mdio_read(struct net_device *dev, int phy_addr, int reg)
172 struct au1000_private *aup = netdev_priv(dev);
173 u32 *const mii_control_reg = &aup->mac->mii_control;
174 u32 *const mii_data_reg = &aup->mac->mii_data;
178 while (readl(mii_control_reg) & MAC_MII_BUSY) {
180 if (--timedout == 0) {
181 netdev_err(dev, "read_MII busy timeout!!\n");
186 mii_control = MAC_SET_MII_SELECT_REG(reg) |
187 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_READ;
189 writel(mii_control, mii_control_reg);
192 while (readl(mii_control_reg) & MAC_MII_BUSY) {
194 if (--timedout == 0) {
195 netdev_err(dev, "mdio_read busy timeout!!\n");
199 return readl(mii_data_reg);
202 static void au1000_mdio_write(struct net_device *dev, int phy_addr,
205 struct au1000_private *aup = netdev_priv(dev);
206 u32 *const mii_control_reg = &aup->mac->mii_control;
207 u32 *const mii_data_reg = &aup->mac->mii_data;
211 while (readl(mii_control_reg) & MAC_MII_BUSY) {
213 if (--timedout == 0) {
214 netdev_err(dev, "mdio_write busy timeout!!\n");
219 mii_control = MAC_SET_MII_SELECT_REG(reg) |
220 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_WRITE;
222 writel(value, mii_data_reg);
223 writel(mii_control, mii_control_reg);
226 static int au1000_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
228 /* WARNING: bus->phy_map[phy_addr].attached_dev == dev does
229 * _NOT_ hold (e.g. when PHY is accessed through other MAC's MII bus)
231 struct net_device *const dev = bus->priv;
233 /* make sure the MAC associated with this
236 au1000_enable_mac(dev, 0);
238 return au1000_mdio_read(dev, phy_addr, regnum);
241 static int au1000_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
244 struct net_device *const dev = bus->priv;
246 /* make sure the MAC associated with this
249 au1000_enable_mac(dev, 0);
251 au1000_mdio_write(dev, phy_addr, regnum, value);
255 static int au1000_mdiobus_reset(struct mii_bus *bus)
257 struct net_device *const dev = bus->priv;
259 /* make sure the MAC associated with this
262 au1000_enable_mac(dev, 0);
267 static void au1000_hard_stop(struct net_device *dev)
269 struct au1000_private *aup = netdev_priv(dev);
272 netif_dbg(aup, drv, dev, "hard stop\n");
274 reg = readl(&aup->mac->control);
275 reg &= ~(MAC_RX_ENABLE | MAC_TX_ENABLE);
276 writel(reg, &aup->mac->control);
280 static void au1000_enable_rx_tx(struct net_device *dev)
282 struct au1000_private *aup = netdev_priv(dev);
285 netif_dbg(aup, hw, dev, "enable_rx_tx\n");
287 reg = readl(&aup->mac->control);
288 reg |= (MAC_RX_ENABLE | MAC_TX_ENABLE);
289 writel(reg, &aup->mac->control);
294 au1000_adjust_link(struct net_device *dev)
296 struct au1000_private *aup = netdev_priv(dev);
297 struct phy_device *phydev = aup->phy_dev;
301 int status_change = 0;
303 BUG_ON(!aup->phy_dev);
305 spin_lock_irqsave(&aup->lock, flags);
307 if (phydev->link && (aup->old_speed != phydev->speed)) {
310 switch (phydev->speed) {
315 netdev_warn(dev, "Speed (%d) is not 10/100 ???\n",
320 aup->old_speed = phydev->speed;
325 if (phydev->link && (aup->old_duplex != phydev->duplex)) {
326 /* duplex mode changed */
328 /* switching duplex mode requires to disable rx and tx! */
329 au1000_hard_stop(dev);
331 reg = readl(&aup->mac->control);
332 if (DUPLEX_FULL == phydev->duplex) {
333 reg |= MAC_FULL_DUPLEX;
334 reg &= ~MAC_DISABLE_RX_OWN;
336 reg &= ~MAC_FULL_DUPLEX;
337 reg |= MAC_DISABLE_RX_OWN;
339 writel(reg, &aup->mac->control);
342 au1000_enable_rx_tx(dev);
343 aup->old_duplex = phydev->duplex;
348 if (phydev->link != aup->old_link) {
349 /* link state changed */
354 aup->old_duplex = -1;
357 aup->old_link = phydev->link;
361 spin_unlock_irqrestore(&aup->lock, flags);
365 netdev_info(dev, "link up (%d/%s)\n",
367 DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
369 netdev_info(dev, "link down\n");
373 static int au1000_mii_probe(struct net_device *dev)
375 struct au1000_private *const aup = netdev_priv(dev);
376 struct phy_device *phydev = NULL;
379 if (aup->phy_static_config) {
380 BUG_ON(aup->mac_id < 0 || aup->mac_id > 1);
383 phydev = aup->mii_bus->phy_map[aup->phy_addr];
385 netdev_info(dev, "using PHY-less setup\n");
389 /* find the first (lowest address) PHY
390 * on the current MAC's MII bus
392 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++)
393 if (aup->mii_bus->phy_map[phy_addr]) {
394 phydev = aup->mii_bus->phy_map[phy_addr];
395 if (!aup->phy_search_highest_addr)
396 /* break out with first one found */
400 if (aup->phy1_search_mac0) {
401 /* try harder to find a PHY */
402 if (!phydev && (aup->mac_id == 1)) {
403 /* no PHY found, maybe we have a dual PHY? */
404 dev_info(&dev->dev, ": no PHY found on MAC1, "
405 "let's see if it's attached to MAC0...\n");
407 /* find the first (lowest address) non-attached
408 * PHY on the MAC0 MII bus
410 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
411 struct phy_device *const tmp_phydev =
412 aup->mii_bus->phy_map[phy_addr];
414 if (aup->mac_id == 1)
421 /* already claimed by MAC0 */
422 if (tmp_phydev->attached_dev)
426 break; /* found it */
432 netdev_err(dev, "no PHY found\n");
436 /* now we are supposed to have a proper phydev, to attach to... */
437 BUG_ON(phydev->attached_dev);
439 phydev = phy_connect(dev, dev_name(&phydev->dev),
440 &au1000_adjust_link, PHY_INTERFACE_MODE_MII);
442 if (IS_ERR(phydev)) {
443 netdev_err(dev, "Could not attach to PHY\n");
444 return PTR_ERR(phydev);
447 /* mask with MAC supported features */
448 phydev->supported &= (SUPPORTED_10baseT_Half
449 | SUPPORTED_10baseT_Full
450 | SUPPORTED_100baseT_Half
451 | SUPPORTED_100baseT_Full
453 /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */
457 phydev->advertising = phydev->supported;
461 aup->old_duplex = -1;
462 aup->phy_dev = phydev;
464 netdev_info(dev, "attached PHY driver [%s] "
465 "(mii_bus:phy_addr=%s, irq=%d)\n",
466 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
473 * Buffer allocation/deallocation routines. The buffer descriptor returned
474 * has the virtual and dma address of a buffer suitable for
475 * both, receive and transmit operations.
477 static struct db_dest *au1000_GetFreeDB(struct au1000_private *aup)
483 aup->pDBfree = pDB->pnext;
488 void au1000_ReleaseDB(struct au1000_private *aup, struct db_dest *pDB)
490 struct db_dest *pDBfree = aup->pDBfree;
492 pDBfree->pnext = pDB;
496 static void au1000_reset_mac_unlocked(struct net_device *dev)
498 struct au1000_private *const aup = netdev_priv(dev);
501 au1000_hard_stop(dev);
503 writel(MAC_EN_CLOCK_ENABLE, aup->enable);
505 writel(0, aup->enable);
509 for (i = 0; i < NUM_RX_DMA; i++) {
510 /* reset control bits */
511 aup->rx_dma_ring[i]->buff_stat &= ~0xf;
513 for (i = 0; i < NUM_TX_DMA; i++) {
514 /* reset control bits */
515 aup->tx_dma_ring[i]->buff_stat &= ~0xf;
518 aup->mac_enabled = 0;
522 static void au1000_reset_mac(struct net_device *dev)
524 struct au1000_private *const aup = netdev_priv(dev);
527 netif_dbg(aup, hw, dev, "reset mac, aup %x\n",
530 spin_lock_irqsave(&aup->lock, flags);
532 au1000_reset_mac_unlocked(dev);
534 spin_unlock_irqrestore(&aup->lock, flags);
538 * Setup the receive and transmit "rings". These pointers are the addresses
539 * of the rx and tx MAC DMA registers so they are fixed by the hardware --
540 * these are not descriptors sitting in memory.
543 au1000_setup_hw_rings(struct au1000_private *aup, void __iomem *tx_base)
547 for (i = 0; i < NUM_RX_DMA; i++) {
548 aup->rx_dma_ring[i] = (struct rx_dma *)
549 (tx_base + 0x100 + sizeof(struct rx_dma) * i);
551 for (i = 0; i < NUM_TX_DMA; i++) {
552 aup->tx_dma_ring[i] = (struct tx_dma *)
553 (tx_base + sizeof(struct tx_dma) * i);
561 static int au1000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
563 struct au1000_private *aup = netdev_priv(dev);
566 return phy_ethtool_gset(aup->phy_dev, cmd);
571 static int au1000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
573 struct au1000_private *aup = netdev_priv(dev);
575 if (!capable(CAP_NET_ADMIN))
579 return phy_ethtool_sset(aup->phy_dev, cmd);
585 au1000_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
587 struct au1000_private *aup = netdev_priv(dev);
589 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
590 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
591 snprintf(info->bus_info, sizeof(info->bus_info), "%s %d", DRV_NAME,
593 info->regdump_len = 0;
596 static void au1000_set_msglevel(struct net_device *dev, u32 value)
598 struct au1000_private *aup = netdev_priv(dev);
599 aup->msg_enable = value;
602 static u32 au1000_get_msglevel(struct net_device *dev)
604 struct au1000_private *aup = netdev_priv(dev);
605 return aup->msg_enable;
608 static const struct ethtool_ops au1000_ethtool_ops = {
609 .get_settings = au1000_get_settings,
610 .set_settings = au1000_set_settings,
611 .get_drvinfo = au1000_get_drvinfo,
612 .get_link = ethtool_op_get_link,
613 .get_msglevel = au1000_get_msglevel,
614 .set_msglevel = au1000_set_msglevel,
619 * Initialize the interface.
621 * When the device powers up, the clocks are disabled and the
622 * mac is in reset state. When the interface is closed, we
623 * do the same -- reset the device and disable the clocks to
624 * conserve power. Thus, whenever au1000_init() is called,
625 * the device should already be in reset state.
627 static int au1000_init(struct net_device *dev)
629 struct au1000_private *aup = netdev_priv(dev);
634 netif_dbg(aup, hw, dev, "au1000_init\n");
636 /* bring the device out of reset */
637 au1000_enable_mac(dev, 1);
639 spin_lock_irqsave(&aup->lock, flags);
641 writel(0, &aup->mac->control);
642 aup->tx_head = (aup->tx_dma_ring[0]->buff_stat & 0xC) >> 2;
643 aup->tx_tail = aup->tx_head;
644 aup->rx_head = (aup->rx_dma_ring[0]->buff_stat & 0xC) >> 2;
646 writel(dev->dev_addr[5]<<8 | dev->dev_addr[4],
647 &aup->mac->mac_addr_high);
648 writel(dev->dev_addr[3]<<24 | dev->dev_addr[2]<<16 |
649 dev->dev_addr[1]<<8 | dev->dev_addr[0],
650 &aup->mac->mac_addr_low);
653 for (i = 0; i < NUM_RX_DMA; i++)
654 aup->rx_dma_ring[i]->buff_stat |= RX_DMA_ENABLE;
658 control = MAC_RX_ENABLE | MAC_TX_ENABLE;
659 #ifndef CONFIG_CPU_LITTLE_ENDIAN
660 control |= MAC_BIG_ENDIAN;
663 if (aup->phy_dev->link && (DUPLEX_FULL == aup->phy_dev->duplex))
664 control |= MAC_FULL_DUPLEX;
666 control |= MAC_DISABLE_RX_OWN;
667 } else { /* PHY-less op, assume full-duplex */
668 control |= MAC_FULL_DUPLEX;
671 writel(control, &aup->mac->control);
672 writel(0x8100, &aup->mac->vlan1_tag); /* activate vlan support */
675 spin_unlock_irqrestore(&aup->lock, flags);
679 static inline void au1000_update_rx_stats(struct net_device *dev, u32 status)
681 struct net_device_stats *ps = &dev->stats;
684 if (status & RX_MCAST_FRAME)
687 if (status & RX_ERROR) {
689 if (status & RX_MISSED_FRAME)
690 ps->rx_missed_errors++;
691 if (status & (RX_OVERLEN | RX_RUNT | RX_LEN_ERROR))
692 ps->rx_length_errors++;
693 if (status & RX_CRC_ERROR)
695 if (status & RX_COLL)
698 ps->rx_bytes += status & RX_FRAME_LEN_MASK;
703 * Au1000 receive routine.
705 static int au1000_rx(struct net_device *dev)
707 struct au1000_private *aup = netdev_priv(dev);
710 u32 buff_stat, status;
714 netif_dbg(aup, rx_status, dev, "au1000_rx head %d\n", aup->rx_head);
716 prxd = aup->rx_dma_ring[aup->rx_head];
717 buff_stat = prxd->buff_stat;
718 while (buff_stat & RX_T_DONE) {
719 status = prxd->status;
720 pDB = aup->rx_db_inuse[aup->rx_head];
721 au1000_update_rx_stats(dev, status);
722 if (!(status & RX_ERROR)) {
725 frmlen = (status & RX_FRAME_LEN_MASK);
726 frmlen -= 4; /* Remove FCS */
727 skb = netdev_alloc_skb(dev, frmlen + 2);
729 dev->stats.rx_dropped++;
732 skb_reserve(skb, 2); /* 16 byte IP header align */
733 skb_copy_to_linear_data(skb,
734 (unsigned char *)pDB->vaddr, frmlen);
735 skb_put(skb, frmlen);
736 skb->protocol = eth_type_trans(skb, dev);
737 netif_rx(skb); /* pass the packet to upper layers */
739 if (au1000_debug > 4) {
740 pr_err("rx_error(s):");
741 if (status & RX_MISSED_FRAME)
743 if (status & RX_WDOG_TIMER)
745 if (status & RX_RUNT)
747 if (status & RX_OVERLEN)
749 if (status & RX_COLL)
751 if (status & RX_MII_ERROR)
752 pr_cont(" mii error");
753 if (status & RX_CRC_ERROR)
754 pr_cont(" crc error");
755 if (status & RX_LEN_ERROR)
756 pr_cont(" len error");
757 if (status & RX_U_CNTRL_FRAME)
758 pr_cont(" u control frame");
762 prxd->buff_stat = (u32)(pDB->dma_addr | RX_DMA_ENABLE);
763 aup->rx_head = (aup->rx_head + 1) & (NUM_RX_DMA - 1);
766 /* next descriptor */
767 prxd = aup->rx_dma_ring[aup->rx_head];
768 buff_stat = prxd->buff_stat;
773 static void au1000_update_tx_stats(struct net_device *dev, u32 status)
775 struct au1000_private *aup = netdev_priv(dev);
776 struct net_device_stats *ps = &dev->stats;
778 if (status & TX_FRAME_ABORTED) {
779 if (!aup->phy_dev || (DUPLEX_FULL == aup->phy_dev->duplex)) {
780 if (status & (TX_JAB_TIMEOUT | TX_UNDERRUN)) {
781 /* any other tx errors are only valid
782 * in half duplex mode
785 ps->tx_aborted_errors++;
789 ps->tx_aborted_errors++;
790 if (status & (TX_NO_CARRIER | TX_LOSS_CARRIER))
791 ps->tx_carrier_errors++;
797 * Called from the interrupt service routine to acknowledge
798 * the TX DONE bits. This is a must if the irq is setup as
801 static void au1000_tx_ack(struct net_device *dev)
803 struct au1000_private *aup = netdev_priv(dev);
806 ptxd = aup->tx_dma_ring[aup->tx_tail];
808 while (ptxd->buff_stat & TX_T_DONE) {
809 au1000_update_tx_stats(dev, ptxd->status);
810 ptxd->buff_stat &= ~TX_T_DONE;
814 aup->tx_tail = (aup->tx_tail + 1) & (NUM_TX_DMA - 1);
815 ptxd = aup->tx_dma_ring[aup->tx_tail];
819 netif_wake_queue(dev);
825 * Au1000 interrupt service routine.
827 static irqreturn_t au1000_interrupt(int irq, void *dev_id)
829 struct net_device *dev = dev_id;
831 /* Handle RX interrupts first to minimize chance of overrun */
835 return IRQ_RETVAL(1);
838 static int au1000_open(struct net_device *dev)
841 struct au1000_private *aup = netdev_priv(dev);
843 netif_dbg(aup, drv, dev, "open: dev=%p\n", dev);
845 retval = request_irq(dev->irq, au1000_interrupt, 0,
848 netdev_err(dev, "unable to get IRQ %d\n", dev->irq);
852 retval = au1000_init(dev);
854 netdev_err(dev, "error in au1000_init\n");
855 free_irq(dev->irq, dev);
860 /* cause the PHY state machine to schedule a link state check */
861 aup->phy_dev->state = PHY_CHANGELINK;
862 phy_start(aup->phy_dev);
865 netif_start_queue(dev);
867 netif_dbg(aup, drv, dev, "open: Initialization done.\n");
872 static int au1000_close(struct net_device *dev)
875 struct au1000_private *const aup = netdev_priv(dev);
877 netif_dbg(aup, drv, dev, "close: dev=%p\n", dev);
880 phy_stop(aup->phy_dev);
882 spin_lock_irqsave(&aup->lock, flags);
884 au1000_reset_mac_unlocked(dev);
886 /* stop the device */
887 netif_stop_queue(dev);
889 /* disable the interrupt */
890 free_irq(dev->irq, dev);
891 spin_unlock_irqrestore(&aup->lock, flags);
897 * Au1000 transmit routine.
899 static netdev_tx_t au1000_tx(struct sk_buff *skb, struct net_device *dev)
901 struct au1000_private *aup = netdev_priv(dev);
902 struct net_device_stats *ps = &dev->stats;
908 netif_dbg(aup, tx_queued, dev, "tx: aup %x len=%d, data=%p, head %d\n",
909 (unsigned)aup, skb->len,
910 skb->data, aup->tx_head);
912 ptxd = aup->tx_dma_ring[aup->tx_head];
913 buff_stat = ptxd->buff_stat;
914 if (buff_stat & TX_DMA_ENABLE) {
915 /* We've wrapped around and the transmitter is still busy */
916 netif_stop_queue(dev);
918 return NETDEV_TX_BUSY;
919 } else if (buff_stat & TX_T_DONE) {
920 au1000_update_tx_stats(dev, ptxd->status);
926 netif_wake_queue(dev);
929 pDB = aup->tx_db_inuse[aup->tx_head];
930 skb_copy_from_linear_data(skb, (void *)pDB->vaddr, skb->len);
931 if (skb->len < ETH_ZLEN) {
932 for (i = skb->len; i < ETH_ZLEN; i++)
933 ((char *)pDB->vaddr)[i] = 0;
935 ptxd->len = ETH_ZLEN;
937 ptxd->len = skb->len;
940 ps->tx_bytes += ptxd->len;
942 ptxd->buff_stat = pDB->dma_addr | TX_DMA_ENABLE;
945 aup->tx_head = (aup->tx_head + 1) & (NUM_TX_DMA - 1);
950 * The Tx ring has been full longer than the watchdog timeout
951 * value. The transmitter must be hung?
953 static void au1000_tx_timeout(struct net_device *dev)
955 netdev_err(dev, "au1000_tx_timeout: dev=%p\n", dev);
956 au1000_reset_mac(dev);
958 dev->trans_start = jiffies; /* prevent tx timeout */
959 netif_wake_queue(dev);
962 static void au1000_multicast_list(struct net_device *dev)
964 struct au1000_private *aup = netdev_priv(dev);
967 netif_dbg(aup, drv, dev, "%s: flags=%x\n", __func__, dev->flags);
968 reg = readl(&aup->mac->control);
969 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
970 reg |= MAC_PROMISCUOUS;
971 } else if ((dev->flags & IFF_ALLMULTI) ||
972 netdev_mc_count(dev) > MULTICAST_FILTER_LIMIT) {
973 reg |= MAC_PASS_ALL_MULTI;
974 reg &= ~MAC_PROMISCUOUS;
975 netdev_info(dev, "Pass all multicast\n");
977 struct netdev_hw_addr *ha;
978 u32 mc_filter[2]; /* Multicast hash filter */
980 mc_filter[1] = mc_filter[0] = 0;
981 netdev_for_each_mc_addr(ha, dev)
982 set_bit(ether_crc(ETH_ALEN, ha->addr)>>26,
984 writel(mc_filter[1], &aup->mac->multi_hash_high);
985 writel(mc_filter[0], &aup->mac->multi_hash_low);
986 reg &= ~MAC_PROMISCUOUS;
987 reg |= MAC_HASH_MODE;
989 writel(reg, &aup->mac->control);
992 static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
994 struct au1000_private *aup = netdev_priv(dev);
996 if (!netif_running(dev))
1000 return -EINVAL; /* PHY not controllable */
1002 return phy_mii_ioctl(aup->phy_dev, rq, cmd);
1005 static const struct net_device_ops au1000_netdev_ops = {
1006 .ndo_open = au1000_open,
1007 .ndo_stop = au1000_close,
1008 .ndo_start_xmit = au1000_tx,
1009 .ndo_set_rx_mode = au1000_multicast_list,
1010 .ndo_do_ioctl = au1000_ioctl,
1011 .ndo_tx_timeout = au1000_tx_timeout,
1012 .ndo_set_mac_address = eth_mac_addr,
1013 .ndo_validate_addr = eth_validate_addr,
1014 .ndo_change_mtu = eth_change_mtu,
1017 static int au1000_probe(struct platform_device *pdev)
1019 static unsigned version_printed;
1020 struct au1000_private *aup = NULL;
1021 struct au1000_eth_platform_data *pd;
1022 struct net_device *dev = NULL;
1023 struct db_dest *pDB, *pDBfree;
1024 int irq, i, err = 0;
1025 struct resource *base, *macen, *macdma;
1027 base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1029 dev_err(&pdev->dev, "failed to retrieve base register\n");
1034 macen = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1036 dev_err(&pdev->dev, "failed to retrieve MAC Enable register\n");
1041 irq = platform_get_irq(pdev, 0);
1043 dev_err(&pdev->dev, "failed to retrieve IRQ\n");
1048 macdma = platform_get_resource(pdev, IORESOURCE_MEM, 2);
1050 dev_err(&pdev->dev, "failed to retrieve MACDMA registers\n");
1055 if (!request_mem_region(base->start, resource_size(base),
1057 dev_err(&pdev->dev, "failed to request memory region for base registers\n");
1062 if (!request_mem_region(macen->start, resource_size(macen),
1064 dev_err(&pdev->dev, "failed to request memory region for MAC enable register\n");
1069 if (!request_mem_region(macdma->start, resource_size(macdma),
1071 dev_err(&pdev->dev, "failed to request MACDMA memory region\n");
1076 dev = alloc_etherdev(sizeof(struct au1000_private));
1082 SET_NETDEV_DEV(dev, &pdev->dev);
1083 platform_set_drvdata(pdev, dev);
1084 aup = netdev_priv(dev);
1086 spin_lock_init(&aup->lock);
1087 aup->msg_enable = (au1000_debug < 4 ?
1088 AU1000_DEF_MSG_ENABLE : au1000_debug);
1090 /* Allocate the data buffers
1091 * Snooping works fine with eth on all au1xxx
1093 aup->vaddr = (u32)dma_alloc_noncoherent(NULL, MAX_BUF_SIZE *
1094 (NUM_TX_BUFFS + NUM_RX_BUFFS),
1097 dev_err(&pdev->dev, "failed to allocate data buffers\n");
1102 /* aup->mac is the base address of the MAC's registers */
1103 aup->mac = (struct mac_reg *)
1104 ioremap_nocache(base->start, resource_size(base));
1106 dev_err(&pdev->dev, "failed to ioremap MAC registers\n");
1111 /* Setup some variables for quick register address access */
1112 aup->enable = (u32 *)ioremap_nocache(macen->start,
1113 resource_size(macen));
1115 dev_err(&pdev->dev, "failed to ioremap MAC enable register\n");
1119 aup->mac_id = pdev->id;
1121 aup->macdma = ioremap_nocache(macdma->start, resource_size(macdma));
1123 dev_err(&pdev->dev, "failed to ioremap MACDMA registers\n");
1128 au1000_setup_hw_rings(aup, aup->macdma);
1130 writel(0, aup->enable);
1131 aup->mac_enabled = 0;
1133 pd = dev_get_platdata(&pdev->dev);
1135 dev_info(&pdev->dev, "no platform_data passed,"
1136 " PHY search on MAC0\n");
1137 aup->phy1_search_mac0 = 1;
1139 if (is_valid_ether_addr(pd->mac)) {
1140 memcpy(dev->dev_addr, pd->mac, ETH_ALEN);
1142 /* Set a random MAC since no valid provided by platform_data. */
1143 eth_hw_addr_random(dev);
1146 aup->phy_static_config = pd->phy_static_config;
1147 aup->phy_search_highest_addr = pd->phy_search_highest_addr;
1148 aup->phy1_search_mac0 = pd->phy1_search_mac0;
1149 aup->phy_addr = pd->phy_addr;
1150 aup->phy_busid = pd->phy_busid;
1151 aup->phy_irq = pd->phy_irq;
1154 if (aup->phy_busid && aup->phy_busid > 0) {
1155 dev_err(&pdev->dev, "MAC0-associated PHY attached 2nd MACs MII bus not supported yet\n");
1157 goto err_mdiobus_alloc;
1160 aup->mii_bus = mdiobus_alloc();
1161 if (aup->mii_bus == NULL) {
1162 dev_err(&pdev->dev, "failed to allocate mdiobus structure\n");
1164 goto err_mdiobus_alloc;
1167 aup->mii_bus->priv = dev;
1168 aup->mii_bus->read = au1000_mdiobus_read;
1169 aup->mii_bus->write = au1000_mdiobus_write;
1170 aup->mii_bus->reset = au1000_mdiobus_reset;
1171 aup->mii_bus->name = "au1000_eth_mii";
1172 snprintf(aup->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1173 pdev->name, aup->mac_id);
1174 aup->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
1175 if (aup->mii_bus->irq == NULL) {
1180 for (i = 0; i < PHY_MAX_ADDR; ++i)
1181 aup->mii_bus->irq[i] = PHY_POLL;
1182 /* if known, set corresponding PHY IRQs */
1183 if (aup->phy_static_config)
1184 if (aup->phy_irq && aup->phy_busid == aup->mac_id)
1185 aup->mii_bus->irq[aup->phy_addr] = aup->phy_irq;
1187 err = mdiobus_register(aup->mii_bus);
1189 dev_err(&pdev->dev, "failed to register MDIO bus\n");
1190 goto err_mdiobus_reg;
1193 err = au1000_mii_probe(dev);
1198 /* setup the data buffer descriptors and attach a buffer to each one */
1200 for (i = 0; i < (NUM_TX_BUFFS+NUM_RX_BUFFS); i++) {
1201 pDB->pnext = pDBfree;
1203 pDB->vaddr = (u32 *)((unsigned)aup->vaddr + MAX_BUF_SIZE*i);
1204 pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
1207 aup->pDBfree = pDBfree;
1210 for (i = 0; i < NUM_RX_DMA; i++) {
1211 pDB = au1000_GetFreeDB(aup);
1215 aup->rx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
1216 aup->rx_db_inuse[i] = pDB;
1220 for (i = 0; i < NUM_TX_DMA; i++) {
1221 pDB = au1000_GetFreeDB(aup);
1225 aup->tx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
1226 aup->tx_dma_ring[i]->len = 0;
1227 aup->tx_db_inuse[i] = pDB;
1230 dev->base_addr = base->start;
1232 dev->netdev_ops = &au1000_netdev_ops;
1233 SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops);
1234 dev->watchdog_timeo = ETH_TX_TIMEOUT;
1237 * The boot code uses the ethernet controller, so reset it to start
1238 * fresh. au1000_init() expects that the device is in reset state.
1240 au1000_reset_mac(dev);
1242 err = register_netdev(dev);
1244 netdev_err(dev, "Cannot register net device, aborting.\n");
1248 netdev_info(dev, "Au1xx0 Ethernet found at 0x%lx, irq %d\n",
1249 (unsigned long)base->start, irq);
1250 if (version_printed++ == 0)
1251 pr_info("%s version %s %s\n",
1252 DRV_NAME, DRV_VERSION, DRV_AUTHOR);
1257 if (aup->mii_bus != NULL)
1258 mdiobus_unregister(aup->mii_bus);
1260 /* here we should have a valid dev plus aup-> register addresses
1261 * so we can reset the mac properly.
1263 au1000_reset_mac(dev);
1265 for (i = 0; i < NUM_RX_DMA; i++) {
1266 if (aup->rx_db_inuse[i])
1267 au1000_ReleaseDB(aup, aup->rx_db_inuse[i]);
1269 for (i = 0; i < NUM_TX_DMA; i++) {
1270 if (aup->tx_db_inuse[i])
1271 au1000_ReleaseDB(aup, aup->tx_db_inuse[i]);
1274 mdiobus_free(aup->mii_bus);
1276 iounmap(aup->macdma);
1278 iounmap(aup->enable);
1282 dma_free_noncoherent(NULL, MAX_BUF_SIZE * (NUM_TX_BUFFS + NUM_RX_BUFFS),
1283 (void *)aup->vaddr, aup->dma_addr);
1287 release_mem_region(macdma->start, resource_size(macdma));
1289 release_mem_region(macen->start, resource_size(macen));
1291 release_mem_region(base->start, resource_size(base));
1296 static int au1000_remove(struct platform_device *pdev)
1298 struct net_device *dev = platform_get_drvdata(pdev);
1299 struct au1000_private *aup = netdev_priv(dev);
1301 struct resource *base, *macen;
1303 unregister_netdev(dev);
1304 mdiobus_unregister(aup->mii_bus);
1305 mdiobus_free(aup->mii_bus);
1307 for (i = 0; i < NUM_RX_DMA; i++)
1308 if (aup->rx_db_inuse[i])
1309 au1000_ReleaseDB(aup, aup->rx_db_inuse[i]);
1311 for (i = 0; i < NUM_TX_DMA; i++)
1312 if (aup->tx_db_inuse[i])
1313 au1000_ReleaseDB(aup, aup->tx_db_inuse[i]);
1315 dma_free_noncoherent(NULL, MAX_BUF_SIZE *
1316 (NUM_TX_BUFFS + NUM_RX_BUFFS),
1317 (void *)aup->vaddr, aup->dma_addr);
1319 iounmap(aup->macdma);
1321 iounmap(aup->enable);
1323 base = platform_get_resource(pdev, IORESOURCE_MEM, 2);
1324 release_mem_region(base->start, resource_size(base));
1326 base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1327 release_mem_region(base->start, resource_size(base));
1329 macen = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1330 release_mem_region(macen->start, resource_size(macen));
1337 static struct platform_driver au1000_eth_driver = {
1338 .probe = au1000_probe,
1339 .remove = au1000_remove,
1341 .name = "au1000-eth",
1342 .owner = THIS_MODULE,
1346 module_platform_driver(au1000_eth_driver);
1348 MODULE_ALIAS("platform:au1000-eth");