drivers/iio/adc/at91_adc.c

   1 /*
   2  * Driver for the ADC present in the Atmel AT91 evaluation boards.
   3  *
   4  * Copyright 2011 Free Electrons
   5  *
   6  * Licensed under the GPLv2 or later.
   7  */
   8
   9 #include <linux/bitmap.h>
  10 #include <linux/bitops.h>
  11 #include <linux/clk.h>
  12 #include <linux/err.h>
  13 #include <linux/io.h>
  14 #include <linux/input.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/jiffies.h>
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19 #include <linux/of.h>
  20 #include <linux/of_device.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/sched.h>
  23 #include <linux/slab.h>
  24 #include <linux/wait.h>
  25
  26 #include <linux/platform_data/at91_adc.h>
  27
  28 #include <linux/iio/iio.h>
  29 #include <linux/iio/buffer.h>
  30 #include <linux/iio/trigger.h>
  31 #include <linux/iio/trigger_consumer.h>
  32 #include <linux/iio/triggered_buffer.h>
  33
  34 #include <mach/at91_adc.h>
  35
  36 #define AT91_ADC_CHAN(st, ch) \
  37         (st->registers->channel_base + (ch * 4))
  38 #define at91_adc_readl(st, reg) \
  39         (readl_relaxed(st->reg_base + reg))
  40 #define at91_adc_writel(st, reg, val) \
  41         (writel_relaxed(val, st->reg_base + reg))
  42
  43 #define DRIVER_NAME             "at91_adc"
  44 #define MAX_POS_BITS            12
  45
  46 #define TOUCH_SAMPLE_PERIOD_US          2000    /* 2ms */
  47 #define TOUCH_PEN_DETECT_DEBOUNCE_US    200
  48
  49 struct at91_adc_caps {
  50         bool    has_ts;         /* Support touch screen */
  51         bool    has_tsmr;       /* only at91sam9x5, sama5d3 have TSMR reg */
  52         /*
  53          * Numbers of sampling data will be averaged. Can be 0~3.
  54          * Hardware can average (2 ^ ts_filter_average) sample data.
  55          */
  56         u8      ts_filter_average;
  57         /* Pen Detection input pull-up resistor, can be 0~3 */
  58         u8      ts_pen_detect_sensitivity;
  59
  60         /* startup time calculate function */
  61         u32 (*calc_startup_ticks)(u8 startup_time, u32 adc_clk_khz);
  62
  63         u8      num_channels;
  64         struct at91_adc_reg_desc registers;
  65 };
  66
  67 enum atmel_adc_ts_type {
  68         ATMEL_ADC_TOUCHSCREEN_NONE = 0,
  69         ATMEL_ADC_TOUCHSCREEN_4WIRE = 4,
  70         ATMEL_ADC_TOUCHSCREEN_5WIRE = 5,
  71 };
  72
  73 struct at91_adc_state {
  74         struct clk              *adc_clk;
  75         u16                     *buffer;
  76         unsigned long           channels_mask;
  77         struct clk              *clk;
  78         bool                    done;
  79         int                     irq;
  80         u16                     last_value;
  81         struct mutex            lock;
  82         u8                      num_channels;
  83         void __iomem            *reg_base;
  84         struct at91_adc_reg_desc *registers;
  85         u8                      startup_time;
  86         u8                      sample_hold_time;
  87         bool                    sleep_mode;
  88         struct iio_trigger      **trig;
  89         struct at91_adc_trigger *trigger_list;
  90         u32                     trigger_number;
  91         bool                    use_external;
  92         u32                     vref_mv;
  93         u32                     res;            /* resolution used for convertions */
  94         bool                    low_res;        /* the resolution corresponds to the lowest one */
  95         wait_queue_head_t       wq_data_avail;
  96         struct at91_adc_caps    *caps;
  97
  98         /*
  99          * Following ADC channels are shared by touchscreen:
 100          *
 101          * CH0 -- Touch screen XP/UL
 102          * CH1 -- Touch screen XM/UR
 103          * CH2 -- Touch screen YP/LL
 104          * CH3 -- Touch screen YM/Sense
 105          * CH4 -- Touch screen LR(5-wire only)
 106          *
 107          * The bitfields below represents the reserved channel in the
 108          * touchscreen mode.
 109          */
 110 #define CHAN_MASK_TOUCHSCREEN_4WIRE     (0xf << 0)
 111 #define CHAN_MASK_TOUCHSCREEN_5WIRE     (0x1f << 0)
 112         enum atmel_adc_ts_type  touchscreen_type;
 113         struct input_dev        *ts_input;
 114
 115         u16                     ts_sample_period_val;
 116         u32                     ts_pressure_threshold;
 117 };
 118
 119 static irqreturn_t at91_adc_trigger_handler(int irq, void *p)
 120 {
 121         struct iio_poll_func *pf = p;
 122         struct iio_dev *idev = pf->indio_dev;
 123         struct at91_adc_state *st = iio_priv(idev);
 124         int i, j = 0;
 125
 126         for (i = 0; i < idev->masklength; i++) {
 127                 if (!test_bit(i, idev->active_scan_mask))
 128                         continue;
 129                 st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, i));
 130                 j++;
 131         }
 132
 133         iio_push_to_buffers_with_timestamp(idev, st->buffer, pf->timestamp);
 134
 135         iio_trigger_notify_done(idev->trig);
 136
 137         /* Needed to ACK the DRDY interruption */
 138         at91_adc_readl(st, AT91_ADC_LCDR);
 139
 140         enable_irq(st->irq);
 141
 142         return IRQ_HANDLED;
 143 }
 144
 145 /* Handler for classic adc channel eoc trigger */
 146 void handle_adc_eoc_trigger(int irq, struct iio_dev *idev)
 147 {
 148         struct at91_adc_state *st = iio_priv(idev);
 149
 150         if (iio_buffer_enabled(idev)) {
 151                 disable_irq_nosync(irq);
 152                 iio_trigger_poll(idev->trig, iio_get_time_ns());
 153         } else {
 154                 st->last_value = at91_adc_readl(st, AT91_ADC_LCDR);
 155                 st->done = true;
 156                 wake_up_interruptible(&st->wq_data_avail);
 157         }
 158 }
 159
 160 static int at91_ts_sample(struct at91_adc_state *st)
 161 {
 162         unsigned int xscale, yscale, reg, z1, z2;
 163         unsigned int x, y, pres, xpos, ypos;
 164         unsigned int rxp = 1;
 165         unsigned int factor = 1000;
 166         struct iio_dev *idev = iio_priv_to_dev(st);
 167
 168         unsigned int xyz_mask_bits = st->res;
 169         unsigned int xyz_mask = (1 << xyz_mask_bits) - 1;
 170
 171         /* calculate position */
 172         /* x position = (x / xscale) * max, max = 2^MAX_POS_BITS - 1 */
 173         reg = at91_adc_readl(st, AT91_ADC_TSXPOSR);
 174         xpos = reg & xyz_mask;
 175         x = (xpos << MAX_POS_BITS) - xpos;
 176         xscale = (reg >> 16) & xyz_mask;
 177         if (xscale == 0) {
 178                 dev_err(&idev->dev, "Error: xscale == 0!\n");
 179                 return -1;
 180         }
 181         x /= xscale;
 182
 183         /* y position = (y / yscale) * max, max = 2^MAX_POS_BITS - 1 */
 184         reg = at91_adc_readl(st, AT91_ADC_TSYPOSR);
 185         ypos = reg & xyz_mask;
 186         y = (ypos << MAX_POS_BITS) - ypos;
 187         yscale = (reg >> 16) & xyz_mask;
 188         if (yscale == 0) {
 189                 dev_err(&idev->dev, "Error: yscale == 0!\n");
 190                 return -1;
 191         }
 192         y /= yscale;
 193
 194         /* calculate the pressure */
 195         reg = at91_adc_readl(st, AT91_ADC_TSPRESSR);
 196         z1 = reg & xyz_mask;
 197         z2 = (reg >> 16) & xyz_mask;
 198
 199         if (z1 != 0)
 200                 pres = rxp * (x * factor / 1024) * (z2 * factor / z1 - factor)
 201                         / factor;
 202         else
 203                 pres = st->ts_pressure_threshold;       /* no pen contacted */
 204
 205         dev_dbg(&idev->dev, "xpos = %d, xscale = %d, ypos = %d, yscale = %d, z1 = %d, z2 = %d, press = %d\n",
 206                                 xpos, xscale, ypos, yscale, z1, z2, pres);
 207
 208         if (pres < st->ts_pressure_threshold) {
 209                 dev_dbg(&idev->dev, "x = %d, y = %d, pressure = %d\n",
 210                                         x, y, pres / factor);
 211                 input_report_abs(st->ts_input, ABS_X, x);
 212                 input_report_abs(st->ts_input, ABS_Y, y);
 213                 input_report_abs(st->ts_input, ABS_PRESSURE, pres);
 214                 input_report_key(st->ts_input, BTN_TOUCH, 1);
 215                 input_sync(st->ts_input);
 216         } else {
 217                 dev_dbg(&idev->dev, "pressure too low: not reporting\n");
 218         }
 219
 220         return 0;
 221 }
 222
 223 static irqreturn_t at91_adc_interrupt(int irq, void *private)
 224 {
 225         struct iio_dev *idev = private;
 226         struct at91_adc_state *st = iio_priv(idev);
 227         u32 status = at91_adc_readl(st, st->registers->status_register);
 228         const uint32_t ts_data_irq_mask =
 229                 AT91_ADC_IER_XRDY |
 230                 AT91_ADC_IER_YRDY |
 231                 AT91_ADC_IER_PRDY;
 232
 233         if (status & st->registers->drdy_mask)
 234                 handle_adc_eoc_trigger(irq, idev);
 235
 236         if (status & AT91_ADC_IER_PEN) {
 237                 at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);
 238                 at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_NOPEN |
 239                         ts_data_irq_mask);
 240                 /* Set up period trigger for sampling */
 241                 at91_adc_writel(st, st->registers->trigger_register,
 242                         AT91_ADC_TRGR_MOD_PERIOD_TRIG |
 243                         AT91_ADC_TRGR_TRGPER_(st->ts_sample_period_val));
 244         } else if (status & AT91_ADC_IER_NOPEN) {
 245                 at91_adc_writel(st, st->registers->trigger_register, 0);
 246                 at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_NOPEN |
 247                         ts_data_irq_mask);
 248                 at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);
 249
 250                 input_report_key(st->ts_input, BTN_TOUCH, 0);
 251                 input_sync(st->ts_input);
 252         } else if ((status & ts_data_irq_mask) == ts_data_irq_mask) {
 253                 /* Now all touchscreen data is ready */
 254
 255                 if (status & AT91_ADC_ISR_PENS) {
 256                         /* validate data by pen contact */
 257                         at91_ts_sample(st);
 258                 } else {
 259                         /* triggered by event that is no pen contact, just read
 260                          * them to clean the interrupt and discard all.
 261                          */
 262                         at91_adc_readl(st, AT91_ADC_TSXPOSR);
 263                         at91_adc_readl(st, AT91_ADC_TSYPOSR);
 264                         at91_adc_readl(st, AT91_ADC_TSPRESSR);
 265                 }
 266         }
 267
 268         return IRQ_HANDLED;
 269 }
 270
 271 static int at91_adc_channel_init(struct iio_dev *idev)
 272 {
 273         struct at91_adc_state *st = iio_priv(idev);
 274         struct iio_chan_spec *chan_array, *timestamp;
 275         int bit, idx = 0;
 276         unsigned long rsvd_mask = 0;
 277
 278         /* If touchscreen is enable, then reserve the adc channels */
 279         if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
 280                 rsvd_mask = CHAN_MASK_TOUCHSCREEN_4WIRE;
 281         else if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_5WIRE)
 282                 rsvd_mask = CHAN_MASK_TOUCHSCREEN_5WIRE;
 283
 284         /* set up the channel mask to reserve touchscreen channels */
 285         st->channels_mask &= ~rsvd_mask;
 286
 287         idev->num_channels = bitmap_weight(&st->channels_mask,
 288                                            st->num_channels) + 1;
 289
 290         chan_array = devm_kzalloc(&idev->dev,
 291                                   ((idev->num_channels + 1) *
 292                                         sizeof(struct iio_chan_spec)),
 293                                   GFP_KERNEL);
 294
 295         if (!chan_array)
 296                 return -ENOMEM;
 297
 298         for_each_set_bit(bit, &st->channels_mask, st->num_channels) {
 299                 struct iio_chan_spec *chan = chan_array + idx;
 300
 301                 chan->type = IIO_VOLTAGE;
 302                 chan->indexed = 1;
 303                 chan->channel = bit;
 304                 chan->scan_index = idx;
 305                 chan->scan_type.sign = 'u';
 306                 chan->scan_type.realbits = st->res;
 307                 chan->scan_type.storagebits = 16;
 308                 chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
 309                 chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
 310                 idx++;
 311         }
 312         timestamp = chan_array + idx;
 313
 314         timestamp->type = IIO_TIMESTAMP;
 315         timestamp->channel = -1;
 316         timestamp->scan_index = idx;
 317         timestamp->scan_type.sign = 's';
 318         timestamp->scan_type.realbits = 64;
 319         timestamp->scan_type.storagebits = 64;
 320
 321         idev->channels = chan_array;
 322         return idev->num_channels;
 323 }
 324
 325 static u8 at91_adc_get_trigger_value_by_name(struct iio_dev *idev,
 326                                              struct at91_adc_trigger *triggers,
 327                                              const char *trigger_name)
 328 {
 329         struct at91_adc_state *st = iio_priv(idev);
 330         u8 value = 0;
 331         int i;
 332
 333         for (i = 0; i < st->trigger_number; i++) {
 334                 char *name = kasprintf(GFP_KERNEL,
 335                                 "%s-dev%d-%s",
 336                                 idev->name,
 337                                 idev->id,
 338                                 triggers[i].name);
 339                 if (!name)
 340                         return -ENOMEM;
 341
 342                 if (strcmp(trigger_name, name) == 0) {
 343                         value = triggers[i].value;
 344                         kfree(name);
 345                         break;
 346                 }
 347
 348                 kfree(name);
 349         }
 350
 351         return value;
 352 }
 353
 354 static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)
 355 {
 356         struct iio_dev *idev = iio_trigger_get_drvdata(trig);
 357         struct at91_adc_state *st = iio_priv(idev);
 358         struct iio_buffer *buffer = idev->buffer;
 359         struct at91_adc_reg_desc *reg = st->registers;
 360         u32 status = at91_adc_readl(st, reg->trigger_register);
 361         u8 value;
 362         u8 bit;
 363
 364         value = at91_adc_get_trigger_value_by_name(idev,
 365                                                    st->trigger_list,
 366                                                    idev->trig->name);
 367         if (value == 0)
 368                 return -EINVAL;
 369
 370         if (state) {
 371                 st->buffer = kmalloc(idev->scan_bytes, GFP_KERNEL);
 372                 if (st->buffer == NULL)
 373                         return -ENOMEM;
 374
 375                 at91_adc_writel(st, reg->trigger_register,
 376                                 status | value);
 377
 378                 for_each_set_bit(bit, buffer->scan_mask,
 379                                  st->num_channels) {
 380                         struct iio_chan_spec const *chan = idev->channels + bit;
 381                         at91_adc_writel(st, AT91_ADC_CHER,
 382                                         AT91_ADC_CH(chan->channel));
 383                 }
 384
 385                 at91_adc_writel(st, AT91_ADC_IER, reg->drdy_mask);
 386
 387         } else {
 388                 at91_adc_writel(st, AT91_ADC_IDR, reg->drdy_mask);
 389
 390                 at91_adc_writel(st, reg->trigger_register,
 391                                 status & ~value);
 392
 393                 for_each_set_bit(bit, buffer->scan_mask,
 394                                  st->num_channels) {
 395                         struct iio_chan_spec const *chan = idev->channels + bit;
 396                         at91_adc_writel(st, AT91_ADC_CHDR,
 397                                         AT91_ADC_CH(chan->channel));
 398                 }
 399                 kfree(st->buffer);
 400         }
 401
 402         return 0;
 403 }
 404
 405 static const struct iio_trigger_ops at91_adc_trigger_ops = {
 406         .owner = THIS_MODULE,
 407         .set_trigger_state = &at91_adc_configure_trigger,
 408 };
 409
 410 static struct iio_trigger *at91_adc_allocate_trigger(struct iio_dev *idev,
 411                                                      struct at91_adc_trigger *trigger)
 412 {
 413         struct iio_trigger *trig;
 414         int ret;
 415
 416         trig = iio_trigger_alloc("%s-dev%d-%s", idev->name,
 417                                  idev->id, trigger->name);
 418         if (trig == NULL)
 419                 return NULL;
 420
 421         trig->dev.parent = idev->dev.parent;
 422         iio_trigger_set_drvdata(trig, idev);
 423         trig->ops = &at91_adc_trigger_ops;
 424
 425         ret = iio_trigger_register(trig);
 426         if (ret)
 427                 return NULL;
 428
 429         return trig;
 430 }
 431
 432 static int at91_adc_trigger_init(struct iio_dev *idev)
 433 {
 434         struct at91_adc_state *st = iio_priv(idev);
 435         int i, ret;
 436
 437         st->trig = devm_kzalloc(&idev->dev,
 438                                 st->trigger_number * sizeof(*st->trig),
 439                                 GFP_KERNEL);
 440
 441         if (st->trig == NULL) {
 442                 ret = -ENOMEM;
 443                 goto error_ret;
 444         }
 445
 446         for (i = 0; i < st->trigger_number; i++) {
 447                 if (st->trigger_list[i].is_external && !(st->use_external))
 448                         continue;
 449
 450                 st->trig[i] = at91_adc_allocate_trigger(idev,
 451                                                         st->trigger_list + i);
 452                 if (st->trig[i] == NULL) {
 453                         dev_err(&idev->dev,
 454                                 "Could not allocate trigger %d\n", i);
 455                         ret = -ENOMEM;
 456                         goto error_trigger;
 457                 }
 458         }
 459
 460         return 0;
 461
 462 error_trigger:
 463         for (i--; i >= 0; i--) {
 464                 iio_trigger_unregister(st->trig[i]);
 465                 iio_trigger_free(st->trig[i]);
 466         }
 467 error_ret:
 468         return ret;
 469 }
 470
 471 static void at91_adc_trigger_remove(struct iio_dev *idev)
 472 {
 473         struct at91_adc_state *st = iio_priv(idev);
 474         int i;
 475
 476         for (i = 0; i < st->trigger_number; i++) {
 477                 iio_trigger_unregister(st->trig[i]);
 478                 iio_trigger_free(st->trig[i]);
 479         }
 480 }
 481
 482 static int at91_adc_buffer_init(struct iio_dev *idev)
 483 {
 484         return iio_triggered_buffer_setup(idev, &iio_pollfunc_store_time,
 485                 &at91_adc_trigger_handler, NULL);
 486 }
 487
 488 static void at91_adc_buffer_remove(struct iio_dev *idev)
 489 {
 490         iio_triggered_buffer_cleanup(idev);
 491 }
 492
 493 static int at91_adc_read_raw(struct iio_dev *idev,
 494                              struct iio_chan_spec const *chan,
 495                              int *val, int *val2, long mask)
 496 {
 497         struct at91_adc_state *st = iio_priv(idev);
 498         int ret;
 499
 500         switch (mask) {
 501         case IIO_CHAN_INFO_RAW:
 502                 mutex_lock(&st->lock);
 503
 504                 at91_adc_writel(st, AT91_ADC_CHER,
 505                                 AT91_ADC_CH(chan->channel));
 506                 at91_adc_writel(st, AT91_ADC_IER, st->registers->drdy_mask);
 507                 at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_START);
 508
 509                 ret = wait_event_interruptible_timeout(st->wq_data_avail,
 510                                                        st->done,
 511                                                        msecs_to_jiffies(1000));
 512                 if (ret == 0)
 513                         ret = -ETIMEDOUT;
 514                 if (ret < 0) {
 515                         mutex_unlock(&st->lock);
 516                         return ret;
 517                 }
 518
 519                 *val = st->last_value;
 520
 521                 at91_adc_writel(st, AT91_ADC_CHDR,
 522                                 AT91_ADC_CH(chan->channel));
 523                 at91_adc_writel(st, AT91_ADC_IDR, st->registers->drdy_mask);
 524
 525                 st->last_value = 0;
 526                 st->done = false;
 527                 mutex_unlock(&st->lock);
 528                 return IIO_VAL_INT;
 529
 530         case IIO_CHAN_INFO_SCALE:
 531                 *val = st->vref_mv;
 532                 *val2 = chan->scan_type.realbits;
 533                 return IIO_VAL_FRACTIONAL_LOG2;
 534         default:
 535                 break;
 536         }
 537         return -EINVAL;
 538 }
 539
 540 static int at91_adc_of_get_resolution(struct at91_adc_state *st,
 541                                       struct platform_device *pdev)
 542 {
 543         struct iio_dev *idev = iio_priv_to_dev(st);
 544         struct device_node *np = pdev->dev.of_node;
 545         int count, i, ret = 0;
 546         char *res_name, *s;
 547         u32 *resolutions;
 548
 549         count = of_property_count_strings(np, "atmel,adc-res-names");
 550         if (count < 2) {
 551                 dev_err(&idev->dev, "You must specified at least two resolution names for "
 552                                     "adc-res-names property in the DT\n");
 553                 return count;
 554         }
 555
 556         resolutions = kmalloc(count * sizeof(*resolutions), GFP_KERNEL);
 557         if (!resolutions)
 558                 return -ENOMEM;
 559
 560         if (of_property_read_u32_array(np, "atmel,adc-res", resolutions, count)) {
 561                 dev_err(&idev->dev, "Missing adc-res property in the DT.\n");
 562                 ret = -ENODEV;
 563                 goto ret;
 564         }
 565
 566         if (of_property_read_string(np, "atmel,adc-use-res", (const char **)&res_name))
 567                 res_name = "highres";
 568
 569         for (i = 0; i < count; i++) {
 570                 if (of_property_read_string_index(np, "atmel,adc-res-names", i, (const char **)&s))
 571                         continue;
 572
 573                 if (strcmp(res_name, s))
 574                         continue;
 575
 576                 st->res = resolutions[i];
 577                 if (!strcmp(res_name, "lowres"))
 578                         st->low_res = true;
 579                 else
 580                         st->low_res = false;
 581
 582                 dev_info(&idev->dev, "Resolution used: %u bits\n", st->res);
 583                 goto ret;
 584         }
 585
 586         dev_err(&idev->dev, "There is no resolution for %s\n", res_name);
 587
 588 ret:
 589         kfree(resolutions);
 590         return ret;
 591 }
 592
 593 static u32 calc_startup_ticks_9260(u8 startup_time, u32 adc_clk_khz)
 594 {
 595         /*
 596          * Number of ticks needed to cover the startup time of the ADC
 597          * as defined in the electrical characteristics of the board,
 598          * divided by 8. The formula thus is :
 599          *   Startup Time = (ticks + 1) * 8 / ADC Clock
 600          */
 601         return round_up((startup_time * adc_clk_khz / 1000) - 1, 8) / 8;
 602 }
 603
 604 static u32 calc_startup_ticks_9x5(u8 startup_time, u32 adc_clk_khz)
 605 {
 606         /*
 607          * For sama5d3x and at91sam9x5, the formula changes to:
 608          * Startup Time = <lookup_table_value> / ADC Clock
 609          */
 610         const int startup_lookup[] = {
 611                 0  , 8  , 16 , 24 ,
 612                 64 , 80 , 96 , 112,
 613                 512, 576, 640, 704,
 614                 768, 832, 896, 960
 615                 };
 616         int i, size = ARRAY_SIZE(startup_lookup);
 617         unsigned int ticks;
 618
 619         ticks = startup_time * adc_clk_khz / 1000;
 620         for (i = 0; i < size; i++)
 621                 if (ticks < startup_lookup[i])
 622                         break;
 623
 624         ticks = i;
 625         if (ticks == size)
 626                 /* Reach the end of lookup table */
 627                 ticks = size - 1;
 628
 629         return ticks;
 630 }
 631
 632 static const struct of_device_id at91_adc_dt_ids[];
 633
 634 static int at91_adc_probe_dt_ts(struct device_node *node,
 635         struct at91_adc_state *st, struct device *dev)
 636 {
 637         int ret;
 638         u32 prop;
 639
 640         ret = of_property_read_u32(node, "atmel,adc-ts-wires", &prop);
 641         if (ret) {
 642                 dev_info(dev, "ADC Touch screen is disabled.\n");
 643                 return 0;
 644         }
 645
 646         switch (prop) {
 647         case 4:
 648         case 5:
 649                 st->touchscreen_type = prop;
 650                 break;
 651         default:
 652                 dev_err(dev, "Unsupported number of touchscreen wires (%d). Should be 4 or 5.\n", prop);
 653                 return -EINVAL;
 654         }
 655
 656         prop = 0;
 657         of_property_read_u32(node, "atmel,adc-ts-pressure-threshold", &prop);
 658         st->ts_pressure_threshold = prop;
 659         if (st->ts_pressure_threshold) {
 660                 return 0;
 661         } else {
 662                 dev_err(dev, "Invalid pressure threshold for the touchscreen\n");
 663                 return -EINVAL;
 664         }
 665 }
 666
 667 static int at91_adc_probe_dt(struct at91_adc_state *st,
 668                              struct platform_device *pdev)
 669 {
 670         struct iio_dev *idev = iio_priv_to_dev(st);
 671         struct device_node *node = pdev->dev.of_node;
 672         struct device_node *trig_node;
 673         int i = 0, ret;
 674         u32 prop;
 675
 676         if (!node)
 677                 return -EINVAL;
 678
 679         st->caps = (struct at91_adc_caps *)
 680                 of_match_device(at91_adc_dt_ids, &pdev->dev)->data;
 681
 682         st->use_external = of_property_read_bool(node, "atmel,adc-use-external-triggers");
 683
 684         if (of_property_read_u32(node, "atmel,adc-channels-used", &prop)) {
 685                 dev_err(&idev->dev, "Missing adc-channels-used property in the DT.\n");
 686                 ret = -EINVAL;
 687                 goto error_ret;
 688         }
 689         st->channels_mask = prop;
 690
 691         st->sleep_mode = of_property_read_bool(node, "atmel,adc-sleep-mode");
 692
 693         if (of_property_read_u32(node, "atmel,adc-startup-time", &prop)) {
 694                 dev_err(&idev->dev, "Missing adc-startup-time property in the DT.\n");
 695                 ret = -EINVAL;
 696                 goto error_ret;
 697         }
 698         st->startup_time = prop;
 699
 700         prop = 0;
 701         of_property_read_u32(node, "atmel,adc-sample-hold-time", &prop);
 702         st->sample_hold_time = prop;
 703
 704         if (of_property_read_u32(node, "atmel,adc-vref", &prop)) {
 705                 dev_err(&idev->dev, "Missing adc-vref property in the DT.\n");
 706                 ret = -EINVAL;
 707                 goto error_ret;
 708         }
 709         st->vref_mv = prop;
 710
 711         ret = at91_adc_of_get_resolution(st, pdev);
 712         if (ret)
 713                 goto error_ret;
 714
 715         st->registers = &st->caps->registers;
 716         st->num_channels = st->caps->num_channels;
 717         st->trigger_number = of_get_child_count(node);
 718         st->trigger_list = devm_kzalloc(&idev->dev, st->trigger_number *
 719                                         sizeof(struct at91_adc_trigger),
 720                                         GFP_KERNEL);
 721         if (!st->trigger_list) {
 722                 dev_err(&idev->dev, "Could not allocate trigger list memory.\n");
 723                 ret = -ENOMEM;
 724                 goto error_ret;
 725         }
 726
 727         for_each_child_of_node(node, trig_node) {
 728                 struct at91_adc_trigger *trig = st->trigger_list + i;
 729                 const char *name;
 730
 731                 if (of_property_read_string(trig_node, "trigger-name", &name)) {
 732                         dev_err(&idev->dev, "Missing trigger-name property in the DT.\n");
 733                         ret = -EINVAL;
 734                         goto error_ret;
 735                 }
 736                 trig->name = name;
 737
 738                 if (of_property_read_u32(trig_node, "trigger-value", &prop)) {
 739                         dev_err(&idev->dev, "Missing trigger-value property in the DT.\n");
 740                         ret = -EINVAL;
 741                         goto error_ret;
 742                 }
 743                 trig->value = prop;
 744                 trig->is_external = of_property_read_bool(trig_node, "trigger-external");
 745                 i++;
 746         }
 747
 748         /* Check if touchscreen is supported. */
 749         if (st->caps->has_ts)
 750                 return at91_adc_probe_dt_ts(node, st, &idev->dev);
 751         else
 752                 dev_info(&idev->dev, "not support touchscreen in the adc compatible string.\n");
 753
 754         return 0;
 755
 756 error_ret:
 757         return ret;
 758 }
 759
 760 static int at91_adc_probe_pdata(struct at91_adc_state *st,
 761                                 struct platform_device *pdev)
 762 {
 763         struct at91_adc_data *pdata = pdev->dev.platform_data;
 764
 765         if (!pdata)
 766                 return -EINVAL;
 767
 768         st->use_external = pdata->use_external_triggers;
 769         st->vref_mv = pdata->vref;
 770         st->channels_mask = pdata->channels_used;
 771         st->num_channels = pdata->num_channels;
 772         st->startup_time = pdata->startup_time;
 773         st->trigger_number = pdata->trigger_number;
 774         st->trigger_list = pdata->trigger_list;
 775         st->registers = pdata->registers;
 776
 777         return 0;
 778 }
 779
 780 static const struct iio_info at91_adc_info = {
 781         .driver_module = THIS_MODULE,
 782         .read_raw = &at91_adc_read_raw,
 783 };
 784
 785 /* Touchscreen related functions */
 786 static int atmel_ts_open(struct input_dev *dev)
 787 {
 788         struct at91_adc_state *st = input_get_drvdata(dev);
 789
 790         at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);
 791         return 0;
 792 }
 793
 794 static void atmel_ts_close(struct input_dev *dev)
 795 {
 796         struct at91_adc_state *st = input_get_drvdata(dev);
 797
 798         at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);
 799 }
 800
 801 static int at91_ts_hw_init(struct at91_adc_state *st, u32 adc_clk_khz)
 802 {
 803         u32 reg = 0, pendbc;
 804         int i = 0;
 805
 806         if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
 807                 reg = AT91_ADC_TSMR_TSMODE_4WIRE_PRESS;
 808         else
 809                 reg = AT91_ADC_TSMR_TSMODE_5WIRE;
 810
 811         /* a Pen Detect Debounce Time is necessary for the ADC Touch to avoid
 812          * pen detect noise.
 813          * The formula is : Pen Detect Debounce Time = (2 ^ pendbc) / ADCClock
 814          */
 815         pendbc = round_up(TOUCH_PEN_DETECT_DEBOUNCE_US * adc_clk_khz / 1000, 1);
 816
 817         while (pendbc >> ++i)
 818                 ;       /* Empty! Find the shift offset */
 819         if (abs(pendbc - (1 << i)) < abs(pendbc - (1 << (i - 1))))
 820                 pendbc = i;
 821         else
 822                 pendbc = i - 1;
 823
 824         if (st->caps->has_tsmr) {
 825                 reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average)
 826                                 & AT91_ADC_TSMR_TSAV;
 827                 reg |= AT91_ADC_TSMR_PENDBC_(pendbc) & AT91_ADC_TSMR_PENDBC;
 828                 reg |= AT91_ADC_TSMR_NOTSDMA;
 829                 reg |= AT91_ADC_TSMR_PENDET_ENA;
 830                 reg |= 0x03 << 8;       /* TSFREQ, need bigger than TSAV */
 831
 832                 at91_adc_writel(st, AT91_ADC_TSMR, reg);
 833         } else {
 834                 /* TODO: for 9g45 which has no TSMR */
 835         }
 836
 837         /* Change adc internal resistor value for better pen detection,
 838          * default value is 100 kOhm.
 839          * 0 = 200 kOhm, 1 = 150 kOhm, 2 = 100 kOhm, 3 = 50 kOhm
 840          * option only available on ES2 and higher
 841          */
 842         at91_adc_writel(st, AT91_ADC_ACR, st->caps->ts_pen_detect_sensitivity
 843                         & AT91_ADC_ACR_PENDETSENS);
 844
 845         /* Sample Peroid Time = (TRGPER + 1) / ADCClock */
 846         st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US *
 847                         adc_clk_khz / 1000) - 1, 1);
 848
 849         return 0;
 850 }
 851
 852 static int at91_ts_register(struct at91_adc_state *st,
 853                 struct platform_device *pdev)
 854 {
 855         struct input_dev *input;
 856         struct iio_dev *idev = iio_priv_to_dev(st);
 857         int ret;
 858
 859         input = input_allocate_device();
 860         if (!input) {
 861                 dev_err(&idev->dev, "Failed to allocate TS device!\n");
 862                 return -ENOMEM;
 863         }
 864
 865         input->name = DRIVER_NAME;
 866         input->id.bustype = BUS_HOST;
 867         input->dev.parent = &pdev->dev;
 868         input->open = atmel_ts_open;
 869         input->close = atmel_ts_close;
 870
 871         __set_bit(EV_ABS, input->evbit);
 872         __set_bit(EV_KEY, input->evbit);
 873         __set_bit(BTN_TOUCH, input->keybit);
 874         input_set_abs_params(input, ABS_X, 0, (1 << MAX_POS_BITS) - 1, 0, 0);
 875         input_set_abs_params(input, ABS_Y, 0, (1 << MAX_POS_BITS) - 1, 0, 0);
 876         input_set_abs_params(input, ABS_PRESSURE, 0, 0xffffff, 0, 0);
 877
 878         st->ts_input = input;
 879         input_set_drvdata(input, st);
 880
 881         ret = input_register_device(input);
 882         if (ret)
 883                 input_free_device(st->ts_input);
 884
 885         return ret;
 886 }
 887
 888 static void at91_ts_unregister(struct at91_adc_state *st)
 889 {
 890         input_unregister_device(st->ts_input);
 891 }
 892
 893 static int at91_adc_probe(struct platform_device *pdev)
 894 {
 895         unsigned int prsc, mstrclk, ticks, adc_clk, adc_clk_khz, shtim;
 896         int ret;
 897         struct iio_dev *idev;
 898         struct at91_adc_state *st;
 899         struct resource *res;
 900         u32 reg;
 901
 902         idev = devm_iio_device_alloc(&pdev->dev, sizeof(struct at91_adc_state));
 903         if (!idev)
 904                 return -ENOMEM;
 905
 906         st = iio_priv(idev);
 907
 908         if (pdev->dev.of_node)
 909                 ret = at91_adc_probe_dt(st, pdev);
 910         else
 911                 ret = at91_adc_probe_pdata(st, pdev);
 912
 913         if (ret) {
 914                 dev_err(&pdev->dev, "No platform data available.\n");
 915                 return -EINVAL;
 916         }
 917
 918         platform_set_drvdata(pdev, idev);
 919
 920         idev->dev.parent = &pdev->dev;
 921         idev->name = dev_name(&pdev->dev);
 922         idev->modes = INDIO_DIRECT_MODE;
 923         idev->info = &at91_adc_info;
 924
 925         st->irq = platform_get_irq(pdev, 0);
 926         if (st->irq < 0) {
 927                 dev_err(&pdev->dev, "No IRQ ID is designated\n");
 928                 return -ENODEV;
 929         }
 930
 931         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 932
 933         st->reg_base = devm_ioremap_resource(&pdev->dev, res);
 934         if (IS_ERR(st->reg_base)) {
 935                 return PTR_ERR(st->reg_base);
 936         }
 937
 938         /*
 939          * Disable all IRQs before setting up the handler
 940          */
 941         at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_SWRST);
 942         at91_adc_writel(st, AT91_ADC_IDR, 0xFFFFFFFF);
 943         ret = request_irq(st->irq,
 944                           at91_adc_interrupt,
 945                           0,
 946                           pdev->dev.driver->name,
 947                           idev);
 948         if (ret) {
 949                 dev_err(&pdev->dev, "Failed to allocate IRQ.\n");
 950                 return ret;
 951         }
 952
 953         st->clk = devm_clk_get(&pdev->dev, "adc_clk");
 954         if (IS_ERR(st->clk)) {
 955                 dev_err(&pdev->dev, "Failed to get the clock.\n");
 956                 ret = PTR_ERR(st->clk);
 957                 goto error_free_irq;
 958         }
 959
 960         ret = clk_prepare_enable(st->clk);
 961         if (ret) {
 962                 dev_err(&pdev->dev,
 963                         "Could not prepare or enable the clock.\n");
 964                 goto error_free_irq;
 965         }
 966
 967         st->adc_clk = devm_clk_get(&pdev->dev, "adc_op_clk");
 968         if (IS_ERR(st->adc_clk)) {
 969                 dev_err(&pdev->dev, "Failed to get the ADC clock.\n");
 970                 ret = PTR_ERR(st->adc_clk);
 971                 goto error_disable_clk;
 972         }
 973
 974         ret = clk_prepare_enable(st->adc_clk);
 975         if (ret) {
 976                 dev_err(&pdev->dev,
 977                         "Could not prepare or enable the ADC clock.\n");
 978                 goto error_disable_clk;
 979         }
 980
 981         /*
 982          * Prescaler rate computation using the formula from the Atmel's
 983          * datasheet : ADC Clock = MCK / ((Prescaler + 1) * 2), ADC Clock being
 984          * specified by the electrical characteristics of the board.
 985          */
 986         mstrclk = clk_get_rate(st->clk);
 987         adc_clk = clk_get_rate(st->adc_clk);
 988         adc_clk_khz = adc_clk / 1000;
 989
 990         dev_dbg(&pdev->dev, "Master clock is set as: %d Hz, adc_clk should set as: %d Hz\n",
 991                 mstrclk, adc_clk);
 992
 993         prsc = (mstrclk / (2 * adc_clk)) - 1;
 994
 995         if (!st->startup_time) {
 996                 dev_err(&pdev->dev, "No startup time available.\n");
 997                 ret = -EINVAL;
 998                 goto error_disable_adc_clk;
 999         }
1000         ticks = (*st->caps->calc_startup_ticks)(st->startup_time, adc_clk_khz);
1001
1002         /*
1003          * a minimal Sample and Hold Time is necessary for the ADC to guarantee
1004          * the best converted final value between two channels selection
1005          * The formula thus is : Sample and Hold Time = (shtim + 1) / ADCClock
1006          */
1007         shtim = round_up((st->sample_hold_time * adc_clk_khz /
1008                           1000) - 1, 1);
1009
1010         reg = AT91_ADC_PRESCAL_(prsc) & st->registers->mr_prescal_mask;
1011         reg |= AT91_ADC_STARTUP_(ticks) & st->registers->mr_startup_mask;
1012         if (st->low_res)
1013                 reg |= AT91_ADC_LOWRES;
1014         if (st->sleep_mode)
1015                 reg |= AT91_ADC_SLEEP;
1016         reg |= AT91_ADC_SHTIM_(shtim) & AT91_ADC_SHTIM;
1017         at91_adc_writel(st, AT91_ADC_MR, reg);
1018
1019         /* Setup the ADC channels available on the board */
1020         ret = at91_adc_channel_init(idev);
1021         if (ret < 0) {
1022                 dev_err(&pdev->dev, "Couldn't initialize the channels.\n");
1023                 goto error_disable_adc_clk;
1024         }
1025
1026         init_waitqueue_head(&st->wq_data_avail);
1027         mutex_init(&st->lock);
1028
1029         /*
1030          * Since touch screen will set trigger register as period trigger. So
1031          * when touch screen is enabled, then we have to disable hardware
1032          * trigger for classic adc.
1033          */
1034         if (!st->touchscreen_type) {
1035                 ret = at91_adc_buffer_init(idev);
1036                 if (ret < 0) {
1037                         dev_err(&pdev->dev, "Couldn't initialize the buffer.\n");
1038                         goto error_disable_adc_clk;
1039                 }
1040
1041                 ret = at91_adc_trigger_init(idev);
1042                 if (ret < 0) {
1043                         dev_err(&pdev->dev, "Couldn't setup the triggers.\n");
1044                         at91_adc_buffer_remove(idev);
1045                         goto error_disable_adc_clk;
1046                 }
1047         } else {
1048                 if (!st->caps->has_tsmr) {
1049                         dev_err(&pdev->dev, "We don't support non-TSMR adc\n");
1050                         ret = -ENODEV;
1051                         goto error_disable_adc_clk;
1052                 }
1053
1054                 ret = at91_ts_register(st, pdev);
1055                 if (ret)
1056                         goto error_disable_adc_clk;
1057
1058                 at91_ts_hw_init(st, adc_clk_khz);
1059         }
1060
1061         ret = iio_device_register(idev);
1062         if (ret < 0) {
1063                 dev_err(&pdev->dev, "Couldn't register the device.\n");
1064                 goto error_iio_device_register;
1065         }
1066
1067         return 0;
1068
1069 error_iio_device_register:
1070         if (!st->touchscreen_type) {
1071                 at91_adc_trigger_remove(idev);
1072                 at91_adc_buffer_remove(idev);
1073         } else {
1074                 at91_ts_unregister(st);
1075         }
1076 error_disable_adc_clk:
1077         clk_disable_unprepare(st->adc_clk);
1078 error_disable_clk:
1079         clk_disable_unprepare(st->clk);
1080 error_free_irq:
1081         free_irq(st->irq, idev);
1082         return ret;
1083 }
1084
1085 static int at91_adc_remove(struct platform_device *pdev)
1086 {
1087         struct iio_dev *idev = platform_get_drvdata(pdev);
1088         struct at91_adc_state *st = iio_priv(idev);
1089
1090         iio_device_unregister(idev);
1091         if (!st->touchscreen_type) {
1092                 at91_adc_trigger_remove(idev);
1093                 at91_adc_buffer_remove(idev);
1094         } else {
1095                 at91_ts_unregister(st);
1096         }
1097         clk_disable_unprepare(st->adc_clk);
1098         clk_disable_unprepare(st->clk);
1099         free_irq(st->irq, idev);
1100
1101         return 0;
1102 }
1103
1104 #ifdef CONFIG_OF
1105 static struct at91_adc_caps at91sam9260_caps = {
1106         .calc_startup_ticks = calc_startup_ticks_9260,
1107         .num_channels = 4,
1108         .registers = {
1109                 .channel_base = AT91_ADC_CHR(0),
1110                 .drdy_mask = AT91_ADC_DRDY,
1111                 .status_register = AT91_ADC_SR,
1112                 .trigger_register = AT91_ADC_TRGR_9260,
1113                 .mr_prescal_mask = AT91_ADC_PRESCAL_9260,
1114                 .mr_startup_mask = AT91_ADC_STARTUP_9260,
1115         },
1116 };
1117
1118 static struct at91_adc_caps at91sam9g45_caps = {
1119         .has_ts = true,
1120         .calc_startup_ticks = calc_startup_ticks_9260,  /* same as 9260 */
1121         .num_channels = 8,
1122         .registers = {
1123                 .channel_base = AT91_ADC_CHR(0),
1124                 .drdy_mask = AT91_ADC_DRDY,
1125                 .status_register = AT91_ADC_SR,
1126                 .trigger_register = AT91_ADC_TRGR_9G45,
1127                 .mr_prescal_mask = AT91_ADC_PRESCAL_9G45,
1128                 .mr_startup_mask = AT91_ADC_STARTUP_9G45,
1129         },
1130 };
1131
1132 static struct at91_adc_caps at91sam9x5_caps = {
1133         .has_ts = true,
1134         .has_tsmr = true,
1135         .ts_filter_average = 3,
1136         .ts_pen_detect_sensitivity = 2,
1137         .calc_startup_ticks = calc_startup_ticks_9x5,
1138         .num_channels = 12,
1139         .registers = {
1140                 .channel_base = AT91_ADC_CDR0_9X5,
1141                 .drdy_mask = AT91_ADC_SR_DRDY_9X5,
1142                 .status_register = AT91_ADC_SR_9X5,
1143                 .trigger_register = AT91_ADC_TRGR_9X5,
1144                 /* prescal mask is same as 9G45 */
1145                 .mr_prescal_mask = AT91_ADC_PRESCAL_9G45,
1146                 .mr_startup_mask = AT91_ADC_STARTUP_9X5,
1147         },
1148 };
1149
1150 static const struct of_device_id at91_adc_dt_ids[] = {
1151         { .compatible = "atmel,at91sam9260-adc", .data = &at91sam9260_caps },
1152         { .compatible = "atmel,at91sam9g45-adc", .data = &at91sam9g45_caps },
1153         { .compatible = "atmel,at91sam9x5-adc", .data = &at91sam9x5_caps },
1154         {},
1155 };
1156 MODULE_DEVICE_TABLE(of, at91_adc_dt_ids);
1157 #endif
1158
1159 static struct platform_driver at91_adc_driver = {
1160         .probe = at91_adc_probe,
1161         .remove = at91_adc_remove,
1162         .driver = {
1163                    .name = DRIVER_NAME,
1164                    .of_match_table = of_match_ptr(at91_adc_dt_ids),
1165         },
1166 };
1167
1168 module_platform_driver(at91_adc_driver);
1169
1170 MODULE_LICENSE("GPL");
1171 MODULE_DESCRIPTION("Atmel AT91 ADC Driver");
1172 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");