drivers/clocksource/mips-gic-timer.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 2012 MIPS Technologies, Inc.  All rights reserved.
   7  */
   8 #include <linux/clk.h>
   9 #include <linux/clockchips.h>
  10 #include <linux/cpu.h>
  11 #include <linux/init.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/irqchip/mips-gic.h>
  14 #include <linux/notifier.h>
  15 #include <linux/of_irq.h>
  16 #include <linux/percpu.h>
  17 #include <linux/smp.h>
  18 #include <linux/time.h>
  19
  20 static DEFINE_PER_CPU(struct clock_event_device, gic_clockevent_device);
  21 static int gic_timer_irq;
  22 static unsigned int gic_frequency;
  23
  24 static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
  25 {
  26         u64 cnt;
  27         int res;
  28
  29         cnt = gic_read_count();
  30         cnt += (u64)delta;
  31         gic_write_cpu_compare(cnt, cpumask_first(evt->cpumask));
  32         res = ((int)(gic_read_count() - cnt) >= 0) ? -ETIME : 0;
  33         return res;
  34 }
  35
  36 static void gic_set_clock_mode(enum clock_event_mode mode,
  37                                 struct clock_event_device *evt)
  38 {
  39         /* Nothing to do ...  */
  40 }
  41
  42 static irqreturn_t gic_compare_interrupt(int irq, void *dev_id)
  43 {
  44         struct clock_event_device *cd = dev_id;
  45
  46         gic_write_compare(gic_read_compare());
  47         cd->event_handler(cd);
  48         return IRQ_HANDLED;
  49 }
  50
  51 struct irqaction gic_compare_irqaction = {
  52         .handler = gic_compare_interrupt,
  53         .percpu_dev_id = &gic_clockevent_device,
  54         .flags = IRQF_PERCPU | IRQF_TIMER,
  55         .name = "timer",
  56 };
  57
  58 static void gic_clockevent_cpu_init(struct clock_event_device *cd)
  59 {
  60         unsigned int cpu = smp_processor_id();
  61
  62         cd->name                = "MIPS GIC";
  63         cd->features            = CLOCK_EVT_FEAT_ONESHOT |
  64                                   CLOCK_EVT_FEAT_C3STOP;
  65
  66         cd->rating              = 350;
  67         cd->irq                 = gic_timer_irq;
  68         cd->cpumask             = cpumask_of(cpu);
  69         cd->set_next_event      = gic_next_event;
  70         cd->set_mode            = gic_set_clock_mode;
  71
  72         clockevents_config_and_register(cd, gic_frequency, 0x300, 0x7fffffff);
  73
  74         enable_percpu_irq(gic_timer_irq, IRQ_TYPE_NONE);
  75 }
  76
  77 static void gic_clockevent_cpu_exit(struct clock_event_device *cd)
  78 {
  79         disable_percpu_irq(gic_timer_irq);
  80 }
  81
  82 static int gic_cpu_notifier(struct notifier_block *nb, unsigned long action,
  83                                 void *data)
  84 {
  85         switch (action & ~CPU_TASKS_FROZEN) {
  86         case CPU_STARTING:
  87                 gic_clockevent_cpu_init(this_cpu_ptr(&gic_clockevent_device));
  88                 break;
  89         case CPU_DYING:
  90                 gic_clockevent_cpu_exit(this_cpu_ptr(&gic_clockevent_device));
  91                 break;
  92         }
  93
  94         return NOTIFY_OK;
  95 }
  96
  97 static struct notifier_block gic_cpu_nb = {
  98         .notifier_call = gic_cpu_notifier,
  99 };
 100
 101 static int gic_clockevent_init(void)
 102 {
 103         int ret;
 104
 105         if (!cpu_has_counter || !gic_frequency)
 106                 return -ENXIO;
 107
 108         ret = setup_percpu_irq(gic_timer_irq, &gic_compare_irqaction);
 109         if (ret < 0)
 110                 return ret;
 111
 112         ret = register_cpu_notifier(&gic_cpu_nb);
 113         if (ret < 0)
 114                 pr_warn("GIC: Unable to register CPU notifier\n");
 115
 116         gic_clockevent_cpu_init(this_cpu_ptr(&gic_clockevent_device));
 117
 118         return 0;
 119 }
 120
 121 static cycle_t gic_hpt_read(struct clocksource *cs)
 122 {
 123         return gic_read_count();
 124 }
 125
 126 static struct clocksource gic_clocksource = {
 127         .name   = "GIC",
 128         .read   = gic_hpt_read,
 129         .flags  = CLOCK_SOURCE_IS_CONTINUOUS,
 130 };
 131
 132 static void __init __gic_clocksource_init(void)
 133 {
 134         int ret;
 135
 136         /* Set clocksource mask. */
 137         gic_clocksource.mask = CLOCKSOURCE_MASK(gic_get_count_width());
 138
 139         /* Calculate a somewhat reasonable rating value. */
 140         gic_clocksource.rating = 200 + gic_frequency / 10000000;
 141
 142         ret = clocksource_register_hz(&gic_clocksource, gic_frequency);
 143         if (ret < 0)
 144                 pr_warn("GIC: Unable to register clocksource\n");
 145
 146         gic_clockevent_init();
 147
 148         /* And finally start the counter */
 149         gic_start_count();
 150 }
 151
 152 void __init gic_clocksource_init(unsigned int frequency)
 153 {
 154         gic_frequency = frequency;
 155         gic_timer_irq = MIPS_GIC_IRQ_BASE +
 156                 GIC_LOCAL_TO_HWIRQ(GIC_LOCAL_INT_COMPARE);
 157
 158         __gic_clocksource_init();
 159 }
 160
 161 static void __init gic_clocksource_of_init(struct device_node *node)
 162 {
 163         struct clk *clk;
 164
 165         if (WARN_ON(!gic_present || !node->parent ||
 166                     !of_device_is_compatible(node->parent, "mti,gic")))
 167                 return;
 168
 169         clk = of_clk_get(node, 0);
 170         if (!IS_ERR(clk)) {
 171                 if (clk_prepare_enable(clk) < 0) {
 172                         pr_err("GIC failed to enable clock\n");
 173                         clk_put(clk);
 174                         return;
 175                 }
 176
 177                 gic_frequency = clk_get_rate(clk);
 178         } else if (of_property_read_u32(node, "clock-frequency",
 179                                         &gic_frequency)) {
 180                 pr_err("GIC frequency not specified.\n");
 181                 return;
 182         }
 183         gic_timer_irq = irq_of_parse_and_map(node, 0);
 184         if (!gic_timer_irq) {
 185                 pr_err("GIC timer IRQ not specified.\n");
 186                 return;
 187         }
 188
 189         __gic_clocksource_init();
 190 }
 191 CLOCKSOURCE_OF_DECLARE(mips_gic_timer, "mti,gic-timer",
 192                        gic_clocksource_of_init);