2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
9 #include <linux/clockchips.h>
10 #include <linux/cpu.h>
11 #include <linux/init.h>
12 #include <linux/interrupt.h>
13 #include <linux/irqchip/mips-gic.h>
14 #include <linux/notifier.h>
15 #include <linux/of_irq.h>
16 #include <linux/percpu.h>
17 #include <linux/smp.h>
18 #include <linux/time.h>
20 static DEFINE_PER_CPU(struct clock_event_device, gic_clockevent_device);
21 static int gic_timer_irq;
22 static unsigned int gic_frequency;
24 static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
29 cnt = gic_read_count();
31 gic_write_cpu_compare(cnt, cpumask_first(evt->cpumask));
32 res = ((int)(gic_read_count() - cnt) >= 0) ? -ETIME : 0;
36 static void gic_set_clock_mode(enum clock_event_mode mode,
37 struct clock_event_device *evt)
39 /* Nothing to do ... */
42 static irqreturn_t gic_compare_interrupt(int irq, void *dev_id)
44 struct clock_event_device *cd = dev_id;
46 gic_write_compare(gic_read_compare());
47 cd->event_handler(cd);
51 struct irqaction gic_compare_irqaction = {
52 .handler = gic_compare_interrupt,
53 .percpu_dev_id = &gic_clockevent_device,
54 .flags = IRQF_PERCPU | IRQF_TIMER,
58 static void gic_clockevent_cpu_init(struct clock_event_device *cd)
60 unsigned int cpu = smp_processor_id();
62 cd->name = "MIPS GIC";
63 cd->features = CLOCK_EVT_FEAT_ONESHOT |
64 CLOCK_EVT_FEAT_C3STOP;
67 cd->irq = gic_timer_irq;
68 cd->cpumask = cpumask_of(cpu);
69 cd->set_next_event = gic_next_event;
70 cd->set_mode = gic_set_clock_mode;
72 clockevents_config_and_register(cd, gic_frequency, 0x300, 0x7fffffff);
74 enable_percpu_irq(gic_timer_irq, IRQ_TYPE_NONE);
77 static void gic_clockevent_cpu_exit(struct clock_event_device *cd)
79 disable_percpu_irq(gic_timer_irq);
82 static void gic_update_frequency(void *data)
84 unsigned long rate = (unsigned long)data;
86 clockevents_update_freq(this_cpu_ptr(&gic_clockevent_device), rate);
89 static int gic_cpu_notifier(struct notifier_block *nb, unsigned long action,
92 switch (action & ~CPU_TASKS_FROZEN) {
94 gic_clockevent_cpu_init(this_cpu_ptr(&gic_clockevent_device));
97 gic_clockevent_cpu_exit(this_cpu_ptr(&gic_clockevent_device));
104 static int gic_clk_notifier(struct notifier_block *nb, unsigned long action,
107 struct clk_notifier_data *cnd = data;
109 if (action == POST_RATE_CHANGE)
110 on_each_cpu(gic_update_frequency, (void *)cnd->new_rate, 1);
116 static struct notifier_block gic_cpu_nb = {
117 .notifier_call = gic_cpu_notifier,
120 static struct notifier_block gic_clk_nb = {
121 .notifier_call = gic_clk_notifier,
124 static int gic_clockevent_init(void)
128 if (!cpu_has_counter || !gic_frequency)
131 ret = setup_percpu_irq(gic_timer_irq, &gic_compare_irqaction);
135 ret = register_cpu_notifier(&gic_cpu_nb);
137 pr_warn("GIC: Unable to register CPU notifier\n");
139 gic_clockevent_cpu_init(this_cpu_ptr(&gic_clockevent_device));
144 static cycle_t gic_hpt_read(struct clocksource *cs)
146 return gic_read_count();
149 static struct clocksource gic_clocksource = {
151 .read = gic_hpt_read,
152 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
155 static void __init __gic_clocksource_init(void)
159 /* Set clocksource mask. */
160 gic_clocksource.mask = CLOCKSOURCE_MASK(gic_get_count_width());
162 /* Calculate a somewhat reasonable rating value. */
163 gic_clocksource.rating = 200 + gic_frequency / 10000000;
165 ret = clocksource_register_hz(&gic_clocksource, gic_frequency);
167 pr_warn("GIC: Unable to register clocksource\n");
170 void __init gic_clocksource_init(unsigned int frequency)
172 gic_frequency = frequency;
173 gic_timer_irq = MIPS_GIC_IRQ_BASE +
174 GIC_LOCAL_TO_HWIRQ(GIC_LOCAL_INT_COMPARE);
176 __gic_clocksource_init();
177 gic_clockevent_init();
179 /* And finally start the counter */
183 static void __init gic_clocksource_of_init(struct device_node *node)
188 if (WARN_ON(!gic_present || !node->parent ||
189 !of_device_is_compatible(node->parent, "mti,gic")))
192 clk = of_clk_get(node, 0);
194 if (clk_prepare_enable(clk) < 0) {
195 pr_err("GIC failed to enable clock\n");
200 gic_frequency = clk_get_rate(clk);
201 } else if (of_property_read_u32(node, "clock-frequency",
203 pr_err("GIC frequency not specified.\n");
206 gic_timer_irq = irq_of_parse_and_map(node, 0);
207 if (!gic_timer_irq) {
208 pr_err("GIC timer IRQ not specified.\n");
212 __gic_clocksource_init();
214 ret = gic_clockevent_init();
215 if (!ret && !IS_ERR(clk)) {
216 if (clk_notifier_register(clk, &gic_clk_nb) < 0)
217 pr_warn("GIC: Unable to register clock notifier\n");
220 /* And finally start the counter */
223 CLOCKSOURCE_OF_DECLARE(mips_gic_timer, "mti,gic-timer",
224 gic_clocksource_of_init);