drivers/block/nvme-core.c

   1 /*
   2  * NVM Express device driver
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #include <linux/nvme.h>
  16 #include <linux/bitops.h>
  17 #include <linux/blkdev.h>
  18 #include <linux/blk-mq.h>
  19 #include <linux/cpu.h>
  20 #include <linux/delay.h>
  21 #include <linux/errno.h>
  22 #include <linux/fs.h>
  23 #include <linux/genhd.h>
  24 #include <linux/hdreg.h>
  25 #include <linux/idr.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/io.h>
  29 #include <linux/kdev_t.h>
  30 #include <linux/kthread.h>
  31 #include <linux/kernel.h>
  32 #include <linux/mm.h>
  33 #include <linux/module.h>
  34 #include <linux/moduleparam.h>
  35 #include <linux/pci.h>
  36 #include <linux/poison.h>
  37 #include <linux/ptrace.h>
  38 #include <linux/sched.h>
  39 #include <linux/slab.h>
  40 #include <linux/types.h>
  41 #include <scsi/sg.h>
  42 #include <asm-generic/io-64-nonatomic-lo-hi.h>
  43
  44 #define NVME_Q_DEPTH            1024
  45 #define NVME_AQ_DEPTH           64
  46 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
  47 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
  48 #define ADMIN_TIMEOUT           (admin_timeout * HZ)
  49 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
  50 #define IOD_TIMEOUT             (retry_time * HZ)
  51
  52 static unsigned char admin_timeout = 60;
  53 module_param(admin_timeout, byte, 0644);
  54 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  55
  56 unsigned char nvme_io_timeout = 30;
  57 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
  58 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  59
  60 static unsigned char retry_time = 30;
  61 module_param(retry_time, byte, 0644);
  62 MODULE_PARM_DESC(retry_time, "time in seconds to retry failed I/O");
  63
  64 static unsigned char shutdown_timeout = 5;
  65 module_param(shutdown_timeout, byte, 0644);
  66 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
  67
  68 static int nvme_major;
  69 module_param(nvme_major, int, 0);
  70
  71 static int use_threaded_interrupts;
  72 module_param(use_threaded_interrupts, int, 0);
  73
  74 static DEFINE_SPINLOCK(dev_list_lock);
  75 static LIST_HEAD(dev_list);
  76 static struct task_struct *nvme_thread;
  77 static struct workqueue_struct *nvme_workq;
  78 static wait_queue_head_t nvme_kthread_wait;
  79 static struct notifier_block nvme_nb;
  80
  81 static void nvme_reset_failed_dev(struct work_struct *ws);
  82 static int nvme_process_cq(struct nvme_queue *nvmeq);
  83
  84 struct async_cmd_info {
  85         struct kthread_work work;
  86         struct kthread_worker *worker;
  87         struct request *req;
  88         u32 result;
  89         int status;
  90         void *ctx;
  91 };
  92
  93 /*
  94  * An NVM Express queue.  Each device has at least two (one for admin
  95  * commands and one for I/O commands).
  96  */
  97 struct nvme_queue {
  98         struct llist_node node;
  99         struct device *q_dmadev;
 100         struct nvme_dev *dev;
 101         char irqname[24];       /* nvme4294967295-65535\0 */
 102         spinlock_t q_lock;
 103         struct nvme_command *sq_cmds;
 104         volatile struct nvme_completion *cqes;
 105         dma_addr_t sq_dma_addr;
 106         dma_addr_t cq_dma_addr;
 107         u32 __iomem *q_db;
 108         u16 q_depth;
 109         s16 cq_vector;
 110         u16 sq_head;
 111         u16 sq_tail;
 112         u16 cq_head;
 113         u16 qid;
 114         u8 cq_phase;
 115         u8 cqe_seen;
 116         struct async_cmd_info cmdinfo;
 117         struct blk_mq_hw_ctx *hctx;
 118 };
 119
 120 /*
 121  * Check we didin't inadvertently grow the command struct
 122  */
 123 static inline void _nvme_check_size(void)
 124 {
 125         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
 126         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
 127         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
 128         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
 129         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
 130         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
 131         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
 132         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
 133         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
 134         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
 135         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
 136         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
 137 }
 138
 139 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
 140                                                 struct nvme_completion *);
 141
 142 struct nvme_cmd_info {
 143         nvme_completion_fn fn;
 144         void *ctx;
 145         int aborted;
 146         struct nvme_queue *nvmeq;
 147 };
 148
 149 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 150                                 unsigned int hctx_idx)
 151 {
 152         struct nvme_dev *dev = data;
 153         struct nvme_queue *nvmeq = dev->queues[0];
 154
 155         WARN_ON(nvmeq->hctx);
 156         nvmeq->hctx = hctx;
 157         hctx->driver_data = nvmeq;
 158         return 0;
 159 }
 160
 161 static int nvme_admin_init_request(void *data, struct request *req,
 162                                 unsigned int hctx_idx, unsigned int rq_idx,
 163                                 unsigned int numa_node)
 164 {
 165         struct nvme_dev *dev = data;
 166         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 167         struct nvme_queue *nvmeq = dev->queues[0];
 168
 169         BUG_ON(!nvmeq);
 170         cmd->nvmeq = nvmeq;
 171         return 0;
 172 }
 173
 174 static void nvme_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
 175 {
 176         struct nvme_queue *nvmeq = hctx->driver_data;
 177
 178         nvmeq->hctx = NULL;
 179 }
 180
 181 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 182                           unsigned int hctx_idx)
 183 {
 184         struct nvme_dev *dev = data;
 185         struct nvme_queue *nvmeq = dev->queues[
 186                                         (hctx_idx % dev->queue_count) + 1];
 187
 188         if (!nvmeq->hctx)
 189                 nvmeq->hctx = hctx;
 190
 191         /* nvmeq queues are shared between namespaces. We assume here that
 192          * blk-mq map the tags so they match up with the nvme queue tags. */
 193         WARN_ON(nvmeq->hctx->tags != hctx->tags);
 194
 195         hctx->driver_data = nvmeq;
 196         return 0;
 197 }
 198
 199 static int nvme_init_request(void *data, struct request *req,
 200                                 unsigned int hctx_idx, unsigned int rq_idx,
 201                                 unsigned int numa_node)
 202 {
 203         struct nvme_dev *dev = data;
 204         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 205         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
 206
 207         BUG_ON(!nvmeq);
 208         cmd->nvmeq = nvmeq;
 209         return 0;
 210 }
 211
 212 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
 213                                 nvme_completion_fn handler)
 214 {
 215         cmd->fn = handler;
 216         cmd->ctx = ctx;
 217         cmd->aborted = 0;
 218         blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
 219 }
 220
 221 /* Special values must be less than 0x1000 */
 222 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
 223 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
 224 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
 225 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
 226
 227 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
 228                                                 struct nvme_completion *cqe)
 229 {
 230         if (ctx == CMD_CTX_CANCELLED)
 231                 return;
 232         if (ctx == CMD_CTX_COMPLETED) {
 233                 dev_warn(nvmeq->q_dmadev,
 234                                 "completed id %d twice on queue %d\n",
 235                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 236                 return;
 237         }
 238         if (ctx == CMD_CTX_INVALID) {
 239                 dev_warn(nvmeq->q_dmadev,
 240                                 "invalid id %d completed on queue %d\n",
 241                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 242                 return;
 243         }
 244         dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
 245 }
 246
 247 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
 248 {
 249         void *ctx;
 250
 251         if (fn)
 252                 *fn = cmd->fn;
 253         ctx = cmd->ctx;
 254         cmd->fn = special_completion;
 255         cmd->ctx = CMD_CTX_CANCELLED;
 256         return ctx;
 257 }
 258
 259 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
 260                                                 struct nvme_completion *cqe)
 261 {
 262         struct request *req = ctx;
 263
 264         u32 result = le32_to_cpup(&cqe->result);
 265         u16 status = le16_to_cpup(&cqe->status) >> 1;
 266
 267         if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
 268                 ++nvmeq->dev->event_limit;
 269         if (status == NVME_SC_SUCCESS)
 270                 dev_warn(nvmeq->q_dmadev,
 271                         "async event result %08x\n", result);
 272
 273         blk_mq_free_hctx_request(nvmeq->hctx, req);
 274 }
 275
 276 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
 277                                                 struct nvme_completion *cqe)
 278 {
 279         struct request *req = ctx;
 280
 281         u16 status = le16_to_cpup(&cqe->status) >> 1;
 282         u32 result = le32_to_cpup(&cqe->result);
 283
 284         blk_mq_free_hctx_request(nvmeq->hctx, req);
 285
 286         dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
 287         ++nvmeq->dev->abort_limit;
 288 }
 289
 290 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
 291                                                 struct nvme_completion *cqe)
 292 {
 293         struct async_cmd_info *cmdinfo = ctx;
 294         cmdinfo->result = le32_to_cpup(&cqe->result);
 295         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
 296         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
 297         blk_mq_free_hctx_request(nvmeq->hctx, cmdinfo->req);
 298 }
 299
 300 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
 301                                   unsigned int tag)
 302 {
 303         struct blk_mq_hw_ctx *hctx = nvmeq->hctx;
 304         struct request *req = blk_mq_tag_to_rq(hctx->tags, tag);
 305
 306         return blk_mq_rq_to_pdu(req);
 307 }
 308
 309 /*
 310  * Called with local interrupts disabled and the q_lock held.  May not sleep.
 311  */
 312 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
 313                                                 nvme_completion_fn *fn)
 314 {
 315         struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
 316         void *ctx;
 317         if (tag >= nvmeq->q_depth) {
 318                 *fn = special_completion;
 319                 return CMD_CTX_INVALID;
 320         }
 321         if (fn)
 322                 *fn = cmd->fn;
 323         ctx = cmd->ctx;
 324         cmd->fn = special_completion;
 325         cmd->ctx = CMD_CTX_COMPLETED;
 326         return ctx;
 327 }
 328
 329 /**
 330  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
 331  * @nvmeq: The queue to use
 332  * @cmd: The command to send
 333  *
 334  * Safe to use from interrupt context
 335  */
 336 static int __nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
 337 {
 338         u16 tail = nvmeq->sq_tail;
 339
 340         memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
 341         if (++tail == nvmeq->q_depth)
 342                 tail = 0;
 343         writel(tail, nvmeq->q_db);
 344         nvmeq->sq_tail = tail;
 345
 346         return 0;
 347 }
 348
 349 static int nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
 350 {
 351         unsigned long flags;
 352         int ret;
 353         spin_lock_irqsave(&nvmeq->q_lock, flags);
 354         ret = __nvme_submit_cmd(nvmeq, cmd);
 355         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
 356         return ret;
 357 }
 358
 359 static __le64 **iod_list(struct nvme_iod *iod)
 360 {
 361         return ((void *)iod) + iod->offset;
 362 }
 363
 364 /*
 365  * Will slightly overestimate the number of pages needed.  This is OK
 366  * as it only leads to a small amount of wasted memory for the lifetime of
 367  * the I/O.
 368  */
 369 static int nvme_npages(unsigned size, struct nvme_dev *dev)
 370 {
 371         unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
 372         return DIV_ROUND_UP(8 * nprps, dev->page_size - 8);
 373 }
 374
 375 static struct nvme_iod *
 376 nvme_alloc_iod(unsigned nseg, unsigned nbytes, struct nvme_dev *dev, gfp_t gfp)
 377 {
 378         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
 379                                 sizeof(__le64 *) * nvme_npages(nbytes, dev) +
 380                                 sizeof(struct scatterlist) * nseg, gfp);
 381
 382         if (iod) {
 383                 iod->offset = offsetof(struct nvme_iod, sg[nseg]);
 384                 iod->npages = -1;
 385                 iod->length = nbytes;
 386                 iod->nents = 0;
 387                 iod->first_dma = 0ULL;
 388         }
 389
 390         return iod;
 391 }
 392
 393 void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
 394 {
 395         const int last_prp = dev->page_size / 8 - 1;
 396         int i;
 397         __le64 **list = iod_list(iod);
 398         dma_addr_t prp_dma = iod->first_dma;
 399
 400         if (iod->npages == 0)
 401                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
 402         for (i = 0; i < iod->npages; i++) {
 403                 __le64 *prp_list = list[i];
 404                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
 405                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
 406                 prp_dma = next_prp_dma;
 407         }
 408         kfree(iod);
 409 }
 410
 411 static int nvme_error_status(u16 status)
 412 {
 413         switch (status & 0x7ff) {
 414         case NVME_SC_SUCCESS:
 415                 return 0;
 416         case NVME_SC_CAP_EXCEEDED:
 417                 return -ENOSPC;
 418         default:
 419                 return -EIO;
 420         }
 421 }
 422
 423 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
 424                                                 struct nvme_completion *cqe)
 425 {
 426         struct nvme_iod *iod = ctx;
 427         struct request *req = iod->private;
 428         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
 429
 430         u16 status = le16_to_cpup(&cqe->status) >> 1;
 431
 432         if (unlikely(status)) {
 433                 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
 434                     && (jiffies - req->start_time) < req->timeout) {
 435                         unsigned long flags;
 436
 437                         blk_mq_requeue_request(req);
 438                         spin_lock_irqsave(req->q->queue_lock, flags);
 439                         if (!blk_queue_stopped(req->q))
 440                                 blk_mq_kick_requeue_list(req->q);
 441                         spin_unlock_irqrestore(req->q->queue_lock, flags);
 442                         return;
 443                 }
 444                 req->errors = nvme_error_status(status);
 445         } else
 446                 req->errors = 0;
 447
 448         if (cmd_rq->aborted)
 449                 dev_warn(&nvmeq->dev->pci_dev->dev,
 450                         "completing aborted command with status:%04x\n",
 451                         status);
 452
 453         if (iod->nents)
 454                 dma_unmap_sg(&nvmeq->dev->pci_dev->dev, iod->sg, iod->nents,
 455                         rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 456         nvme_free_iod(nvmeq->dev, iod);
 457
 458         blk_mq_complete_request(req);
 459 }
 460
 461 /* length is in bytes.  gfp flags indicates whether we may sleep. */
 462 int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod, int total_len,
 463                                                                 gfp_t gfp)
 464 {
 465         struct dma_pool *pool;
 466         int length = total_len;
 467         struct scatterlist *sg = iod->sg;
 468         int dma_len = sg_dma_len(sg);
 469         u64 dma_addr = sg_dma_address(sg);
 470         int offset = offset_in_page(dma_addr);
 471         __le64 *prp_list;
 472         __le64 **list = iod_list(iod);
 473         dma_addr_t prp_dma;
 474         int nprps, i;
 475         u32 page_size = dev->page_size;
 476
 477         length -= (page_size - offset);
 478         if (length <= 0)
 479                 return total_len;
 480
 481         dma_len -= (page_size - offset);
 482         if (dma_len) {
 483                 dma_addr += (page_size - offset);
 484         } else {
 485                 sg = sg_next(sg);
 486                 dma_addr = sg_dma_address(sg);
 487                 dma_len = sg_dma_len(sg);
 488         }
 489
 490         if (length <= page_size) {
 491                 iod->first_dma = dma_addr;
 492                 return total_len;
 493         }
 494
 495         nprps = DIV_ROUND_UP(length, page_size);
 496         if (nprps <= (256 / 8)) {
 497                 pool = dev->prp_small_pool;
 498                 iod->npages = 0;
 499         } else {
 500                 pool = dev->prp_page_pool;
 501                 iod->npages = 1;
 502         }
 503
 504         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 505         if (!prp_list) {
 506                 iod->first_dma = dma_addr;
 507                 iod->npages = -1;
 508                 return (total_len - length) + page_size;
 509         }
 510         list[0] = prp_list;
 511         iod->first_dma = prp_dma;
 512         i = 0;
 513         for (;;) {
 514                 if (i == page_size >> 3) {
 515                         __le64 *old_prp_list = prp_list;
 516                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 517                         if (!prp_list)
 518                                 return total_len - length;
 519                         list[iod->npages++] = prp_list;
 520                         prp_list[0] = old_prp_list[i - 1];
 521                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
 522                         i = 1;
 523                 }
 524                 prp_list[i++] = cpu_to_le64(dma_addr);
 525                 dma_len -= page_size;
 526                 dma_addr += page_size;
 527                 length -= page_size;
 528                 if (length <= 0)
 529                         break;
 530                 if (dma_len > 0)
 531                         continue;
 532                 BUG_ON(dma_len < 0);
 533                 sg = sg_next(sg);
 534                 dma_addr = sg_dma_address(sg);
 535                 dma_len = sg_dma_len(sg);
 536         }
 537
 538         return total_len;
 539 }
 540
 541 /*
 542  * We reuse the small pool to allocate the 16-byte range here as it is not
 543  * worth having a special pool for these or additional cases to handle freeing
 544  * the iod.
 545  */
 546 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 547                 struct request *req, struct nvme_iod *iod)
 548 {
 549         struct nvme_dsm_range *range =
 550                                 (struct nvme_dsm_range *)iod_list(iod)[0];
 551         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 552
 553         range->cattr = cpu_to_le32(0);
 554         range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
 555         range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 556
 557         memset(cmnd, 0, sizeof(*cmnd));
 558         cmnd->dsm.opcode = nvme_cmd_dsm;
 559         cmnd->dsm.command_id = req->tag;
 560         cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
 561         cmnd->dsm.prp1 = cpu_to_le64(iod->first_dma);
 562         cmnd->dsm.nr = 0;
 563         cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
 564
 565         if (++nvmeq->sq_tail == nvmeq->q_depth)
 566                 nvmeq->sq_tail = 0;
 567         writel(nvmeq->sq_tail, nvmeq->q_db);
 568 }
 569
 570 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 571                                                                 int cmdid)
 572 {
 573         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 574
 575         memset(cmnd, 0, sizeof(*cmnd));
 576         cmnd->common.opcode = nvme_cmd_flush;
 577         cmnd->common.command_id = cmdid;
 578         cmnd->common.nsid = cpu_to_le32(ns->ns_id);
 579
 580         if (++nvmeq->sq_tail == nvmeq->q_depth)
 581                 nvmeq->sq_tail = 0;
 582         writel(nvmeq->sq_tail, nvmeq->q_db);
 583 }
 584
 585 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
 586                                                         struct nvme_ns *ns)
 587 {
 588         struct request *req = iod->private;
 589         struct nvme_command *cmnd;
 590         u16 control = 0;
 591         u32 dsmgmt = 0;
 592
 593         if (req->cmd_flags & REQ_FUA)
 594                 control |= NVME_RW_FUA;
 595         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
 596                 control |= NVME_RW_LR;
 597
 598         if (req->cmd_flags & REQ_RAHEAD)
 599                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
 600
 601         cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 602         memset(cmnd, 0, sizeof(*cmnd));
 603
 604         cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
 605         cmnd->rw.command_id = req->tag;
 606         cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
 607         cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
 608         cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
 609         cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 610         cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
 611         cmnd->rw.control = cpu_to_le16(control);
 612         cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
 613
 614         if (++nvmeq->sq_tail == nvmeq->q_depth)
 615                 nvmeq->sq_tail = 0;
 616         writel(nvmeq->sq_tail, nvmeq->q_db);
 617
 618         return 0;
 619 }
 620
 621 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
 622                          const struct blk_mq_queue_data *bd)
 623 {
 624         struct nvme_ns *ns = hctx->queue->queuedata;
 625         struct nvme_queue *nvmeq = hctx->driver_data;
 626         struct request *req = bd->rq;
 627         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 628         struct nvme_iod *iod;
 629         int psegs = req->nr_phys_segments;
 630         enum dma_data_direction dma_dir;
 631         unsigned size = !(req->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(req) :
 632                                                 sizeof(struct nvme_dsm_range);
 633
 634         iod = nvme_alloc_iod(psegs, size, ns->dev, GFP_ATOMIC);
 635         if (!iod)
 636                 return BLK_MQ_RQ_QUEUE_BUSY;
 637
 638         iod->private = req;
 639
 640         if (req->cmd_flags & REQ_DISCARD) {
 641                 void *range;
 642                 /*
 643                  * We reuse the small pool to allocate the 16-byte range here
 644                  * as it is not worth having a special pool for these or
 645                  * additional cases to handle freeing the iod.
 646                  */
 647                 range = dma_pool_alloc(nvmeq->dev->prp_small_pool,
 648                                                 GFP_ATOMIC,
 649                                                 &iod->first_dma);
 650                 if (!range)
 651                         goto retry_cmd;
 652                 iod_list(iod)[0] = (__le64 *)range;
 653                 iod->npages = 0;
 654         } else if (psegs) {
 655                 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
 656
 657                 sg_init_table(iod->sg, psegs);
 658                 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
 659                 if (!iod->nents)
 660                         goto error_cmd;
 661
 662                 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
 663                         goto retry_cmd;
 664
 665                 if (blk_rq_bytes(req) !=
 666                     nvme_setup_prps(nvmeq->dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
 667                         dma_unmap_sg(&nvmeq->dev->pci_dev->dev, iod->sg,
 668                                         iod->nents, dma_dir);
 669                         goto retry_cmd;
 670                 }
 671         }
 672
 673         nvme_set_info(cmd, iod, req_completion);
 674         spin_lock_irq(&nvmeq->q_lock);
 675         if (req->cmd_flags & REQ_DISCARD)
 676                 nvme_submit_discard(nvmeq, ns, req, iod);
 677         else if (req->cmd_flags & REQ_FLUSH)
 678                 nvme_submit_flush(nvmeq, ns, req->tag);
 679         else
 680                 nvme_submit_iod(nvmeq, iod, ns);
 681
 682         nvme_process_cq(nvmeq);
 683         spin_unlock_irq(&nvmeq->q_lock);
 684         return BLK_MQ_RQ_QUEUE_OK;
 685
 686  error_cmd:
 687         nvme_free_iod(nvmeq->dev, iod);
 688         return BLK_MQ_RQ_QUEUE_ERROR;
 689  retry_cmd:
 690         nvme_free_iod(nvmeq->dev, iod);
 691         return BLK_MQ_RQ_QUEUE_BUSY;
 692 }
 693
 694 static int nvme_process_cq(struct nvme_queue *nvmeq)
 695 {
 696         u16 head, phase;
 697
 698         head = nvmeq->cq_head;
 699         phase = nvmeq->cq_phase;
 700
 701         for (;;) {
 702                 void *ctx;
 703                 nvme_completion_fn fn;
 704                 struct nvme_completion cqe = nvmeq->cqes[head];
 705                 if ((le16_to_cpu(cqe.status) & 1) != phase)
 706                         break;
 707                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
 708                 if (++head == nvmeq->q_depth) {
 709                         head = 0;
 710                         phase = !phase;
 711                 }
 712                 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
 713                 fn(nvmeq, ctx, &cqe);
 714         }
 715
 716         /* If the controller ignores the cq head doorbell and continuously
 717          * writes to the queue, it is theoretically possible to wrap around
 718          * the queue twice and mistakenly return IRQ_NONE.  Linux only
 719          * requires that 0.1% of your interrupts are handled, so this isn't
 720          * a big problem.
 721          */
 722         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
 723                 return 0;
 724
 725         writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
 726         nvmeq->cq_head = head;
 727         nvmeq->cq_phase = phase;
 728
 729         nvmeq->cqe_seen = 1;
 730         return 1;
 731 }
 732
 733 /* Admin queue isn't initialized as a request queue. If at some point this
 734  * happens anyway, make sure to notify the user */
 735 static int nvme_admin_queue_rq(struct blk_mq_hw_ctx *hctx,
 736                                const struct blk_mq_queue_data *bd)
 737 {
 738         WARN_ON_ONCE(1);
 739         return BLK_MQ_RQ_QUEUE_ERROR;
 740 }
 741
 742 static irqreturn_t nvme_irq(int irq, void *data)
 743 {
 744         irqreturn_t result;
 745         struct nvme_queue *nvmeq = data;
 746         spin_lock(&nvmeq->q_lock);
 747         nvme_process_cq(nvmeq);
 748         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
 749         nvmeq->cqe_seen = 0;
 750         spin_unlock(&nvmeq->q_lock);
 751         return result;
 752 }
 753
 754 static irqreturn_t nvme_irq_check(int irq, void *data)
 755 {
 756         struct nvme_queue *nvmeq = data;
 757         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
 758         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
 759                 return IRQ_NONE;
 760         return IRQ_WAKE_THREAD;
 761 }
 762
 763 static void nvme_abort_cmd_info(struct nvme_queue *nvmeq, struct nvme_cmd_info *
 764                                                                 cmd_info)
 765 {
 766         spin_lock_irq(&nvmeq->q_lock);
 767         cancel_cmd_info(cmd_info, NULL);
 768         spin_unlock_irq(&nvmeq->q_lock);
 769 }
 770
 771 struct sync_cmd_info {
 772         struct task_struct *task;
 773         u32 result;
 774         int status;
 775 };
 776
 777 static void sync_completion(struct nvme_queue *nvmeq, void *ctx,
 778                                                 struct nvme_completion *cqe)
 779 {
 780         struct sync_cmd_info *cmdinfo = ctx;
 781         cmdinfo->result = le32_to_cpup(&cqe->result);
 782         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
 783         wake_up_process(cmdinfo->task);
 784 }
 785
 786 /*
 787  * Returns 0 on success.  If the result is negative, it's a Linux error code;
 788  * if the result is positive, it's an NVM Express status code
 789  */
 790 static int nvme_submit_sync_cmd(struct request *req, struct nvme_command *cmd,
 791                                                 u32 *result, unsigned timeout)
 792 {
 793         int ret;
 794         struct sync_cmd_info cmdinfo;
 795         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
 796         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
 797
 798         cmdinfo.task = current;
 799         cmdinfo.status = -EINTR;
 800
 801         cmd->common.command_id = req->tag;
 802
 803         nvme_set_info(cmd_rq, &cmdinfo, sync_completion);
 804
 805         set_current_state(TASK_KILLABLE);
 806         ret = nvme_submit_cmd(nvmeq, cmd);
 807         if (ret) {
 808                 nvme_finish_cmd(nvmeq, req->tag, NULL);
 809                 set_current_state(TASK_RUNNING);
 810         }
 811         ret = schedule_timeout(timeout);
 812
 813         /*
 814          * Ensure that sync_completion has either run, or that it will
 815          * never run.
 816          */
 817         nvme_abort_cmd_info(nvmeq, blk_mq_rq_to_pdu(req));
 818
 819         /*
 820          * We never got the completion
 821          */
 822         if (cmdinfo.status == -EINTR)
 823                 return -EINTR;
 824
 825         if (result)
 826                 *result = cmdinfo.result;
 827
 828         return cmdinfo.status;
 829 }
 830
 831 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
 832 {
 833         struct nvme_queue *nvmeq = dev->queues[0];
 834         struct nvme_command c;
 835         struct nvme_cmd_info *cmd_info;
 836         struct request *req;
 837
 838         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, false);
 839         if (IS_ERR(req))
 840                 return PTR_ERR(req);
 841
 842         req->cmd_flags |= REQ_NO_TIMEOUT;
 843         cmd_info = blk_mq_rq_to_pdu(req);
 844         nvme_set_info(cmd_info, req, async_req_completion);
 845
 846         memset(&c, 0, sizeof(c));
 847         c.common.opcode = nvme_admin_async_event;
 848         c.common.command_id = req->tag;
 849
 850         return __nvme_submit_cmd(nvmeq, &c);
 851 }
 852
 853 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
 854                         struct nvme_command *cmd,
 855                         struct async_cmd_info *cmdinfo, unsigned timeout)
 856 {
 857         struct nvme_queue *nvmeq = dev->queues[0];
 858         struct request *req;
 859         struct nvme_cmd_info *cmd_rq;
 860
 861         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
 862         if (IS_ERR(req))
 863                 return PTR_ERR(req);
 864
 865         req->timeout = timeout;
 866         cmd_rq = blk_mq_rq_to_pdu(req);
 867         cmdinfo->req = req;
 868         nvme_set_info(cmd_rq, cmdinfo, async_completion);
 869         cmdinfo->status = -EINTR;
 870
 871         cmd->common.command_id = req->tag;
 872
 873         return nvme_submit_cmd(nvmeq, cmd);
 874 }
 875
 876 static int __nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
 877                                                 u32 *result, unsigned timeout)
 878 {
 879         int res;
 880         struct request *req;
 881
 882         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
 883         if (IS_ERR(req))
 884                 return PTR_ERR(req);
 885         res = nvme_submit_sync_cmd(req, cmd, result, timeout);
 886         blk_mq_free_request(req);
 887         return res;
 888 }
 889
 890 int nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
 891                                                                 u32 *result)
 892 {
 893         return __nvme_submit_admin_cmd(dev, cmd, result, ADMIN_TIMEOUT);
 894 }
 895
 896 int nvme_submit_io_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
 897                                         struct nvme_command *cmd, u32 *result)
 898 {
 899         int res;
 900         struct request *req;
 901
 902         req = blk_mq_alloc_request(ns->queue, WRITE, (GFP_KERNEL|__GFP_WAIT),
 903                                                                         false);
 904         if (IS_ERR(req))
 905                 return PTR_ERR(req);
 906         res = nvme_submit_sync_cmd(req, cmd, result, NVME_IO_TIMEOUT);
 907         blk_mq_free_request(req);
 908         return res;
 909 }
 910
 911 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
 912 {
 913         struct nvme_command c;
 914
 915         memset(&c, 0, sizeof(c));
 916         c.delete_queue.opcode = opcode;
 917         c.delete_queue.qid = cpu_to_le16(id);
 918
 919         return nvme_submit_admin_cmd(dev, &c, NULL);
 920 }
 921
 922 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
 923                                                 struct nvme_queue *nvmeq)
 924 {
 925         struct nvme_command c;
 926         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
 927
 928         memset(&c, 0, sizeof(c));
 929         c.create_cq.opcode = nvme_admin_create_cq;
 930         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
 931         c.create_cq.cqid = cpu_to_le16(qid);
 932         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
 933         c.create_cq.cq_flags = cpu_to_le16(flags);
 934         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
 935
 936         return nvme_submit_admin_cmd(dev, &c, NULL);
 937 }
 938
 939 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
 940                                                 struct nvme_queue *nvmeq)
 941 {
 942         struct nvme_command c;
 943         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
 944
 945         memset(&c, 0, sizeof(c));
 946         c.create_sq.opcode = nvme_admin_create_sq;
 947         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
 948         c.create_sq.sqid = cpu_to_le16(qid);
 949         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
 950         c.create_sq.sq_flags = cpu_to_le16(flags);
 951         c.create_sq.cqid = cpu_to_le16(qid);
 952
 953         return nvme_submit_admin_cmd(dev, &c, NULL);
 954 }
 955
 956 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
 957 {
 958         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
 959 }
 960
 961 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
 962 {
 963         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
 964 }
 965
 966 int nvme_identify(struct nvme_dev *dev, unsigned nsid, unsigned cns,
 967                                                         dma_addr_t dma_addr)
 968 {
 969         struct nvme_command c;
 970
 971         memset(&c, 0, sizeof(c));
 972         c.identify.opcode = nvme_admin_identify;
 973         c.identify.nsid = cpu_to_le32(nsid);
 974         c.identify.prp1 = cpu_to_le64(dma_addr);
 975         c.identify.cns = cpu_to_le32(cns);
 976
 977         return nvme_submit_admin_cmd(dev, &c, NULL);
 978 }
 979
 980 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
 981                                         dma_addr_t dma_addr, u32 *result)
 982 {
 983         struct nvme_command c;
 984
 985         memset(&c, 0, sizeof(c));
 986         c.features.opcode = nvme_admin_get_features;
 987         c.features.nsid = cpu_to_le32(nsid);
 988         c.features.prp1 = cpu_to_le64(dma_addr);
 989         c.features.fid = cpu_to_le32(fid);
 990
 991         return nvme_submit_admin_cmd(dev, &c, result);
 992 }
 993
 994 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
 995                                         dma_addr_t dma_addr, u32 *result)
 996 {
 997         struct nvme_command c;
 998
 999         memset(&c, 0, sizeof(c));
1000         c.features.opcode = nvme_admin_set_features;
1001         c.features.prp1 = cpu_to_le64(dma_addr);
1002         c.features.fid = cpu_to_le32(fid);
1003         c.features.dword11 = cpu_to_le32(dword11);
1004
1005         return nvme_submit_admin_cmd(dev, &c, result);
1006 }
1007
1008 /**
1009  * nvme_abort_req - Attempt aborting a request
1010  *
1011  * Schedule controller reset if the command was already aborted once before and
1012  * still hasn't been returned to the driver, or if this is the admin queue.
1013  */
1014 static void nvme_abort_req(struct request *req)
1015 {
1016         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1017         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1018         struct nvme_dev *dev = nvmeq->dev;
1019         struct request *abort_req;
1020         struct nvme_cmd_info *abort_cmd;
1021         struct nvme_command cmd;
1022
1023         if (!nvmeq->qid || cmd_rq->aborted) {
1024                 unsigned long flags;
1025
1026                 spin_lock_irqsave(&dev_list_lock, flags);
1027                 if (work_busy(&dev->reset_work))
1028                         goto out;
1029                 list_del_init(&dev->node);
1030                 dev_warn(&dev->pci_dev->dev,
1031                         "I/O %d QID %d timeout, reset controller\n",
1032                                                         req->tag, nvmeq->qid);
1033                 dev->reset_workfn = nvme_reset_failed_dev;
1034                 queue_work(nvme_workq, &dev->reset_work);
1035  out:
1036                 spin_unlock_irqrestore(&dev_list_lock, flags);
1037                 return;
1038         }
1039
1040         if (!dev->abort_limit)
1041                 return;
1042
1043         abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1044                                                                         false);
1045         if (IS_ERR(abort_req))
1046                 return;
1047
1048         abort_cmd = blk_mq_rq_to_pdu(abort_req);
1049         nvme_set_info(abort_cmd, abort_req, abort_completion);
1050
1051         memset(&cmd, 0, sizeof(cmd));
1052         cmd.abort.opcode = nvme_admin_abort_cmd;
1053         cmd.abort.cid = req->tag;
1054         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1055         cmd.abort.command_id = abort_req->tag;
1056
1057         --dev->abort_limit;
1058         cmd_rq->aborted = 1;
1059
1060         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1061                                                         nvmeq->qid);
1062         if (nvme_submit_cmd(dev->queues[0], &cmd) < 0) {
1063                 dev_warn(nvmeq->q_dmadev,
1064                                 "Could not abort I/O %d QID %d",
1065                                 req->tag, nvmeq->qid);
1066                 blk_mq_free_request(abort_req);
1067         }
1068 }
1069
1070 static void nvme_cancel_queue_ios(struct blk_mq_hw_ctx *hctx,
1071                                 struct request *req, void *data, bool reserved)
1072 {
1073         struct nvme_queue *nvmeq = data;
1074         void *ctx;
1075         nvme_completion_fn fn;
1076         struct nvme_cmd_info *cmd;
1077         struct nvme_completion cqe;
1078
1079         if (!blk_mq_request_started(req))
1080                 return;
1081
1082         cmd = blk_mq_rq_to_pdu(req);
1083
1084         if (cmd->ctx == CMD_CTX_CANCELLED)
1085                 return;
1086
1087         if (blk_queue_dying(req->q))
1088                 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1089         else
1090                 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1091
1092
1093         dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1094                                                 req->tag, nvmeq->qid);
1095         ctx = cancel_cmd_info(cmd, &fn);
1096         fn(nvmeq, ctx, &cqe);
1097 }
1098
1099 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1100 {
1101         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1102         struct nvme_queue *nvmeq = cmd->nvmeq;
1103
1104         /*
1105          * The aborted req will be completed on receiving the abort req.
1106          * We enable the timer again. If hit twice, it'll cause a device reset,
1107          * as the device then is in a faulty state.
1108          */
1109         int ret = BLK_EH_RESET_TIMER;
1110
1111         dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1112                                                         nvmeq->qid);
1113
1114         spin_lock_irq(&nvmeq->q_lock);
1115         if (!nvmeq->dev->initialized) {
1116                 /*
1117                  * Force cancelled command frees the request, which requires we
1118                  * return BLK_EH_NOT_HANDLED.
1119                  */
1120                 nvme_cancel_queue_ios(nvmeq->hctx, req, nvmeq, reserved);
1121                 ret = BLK_EH_NOT_HANDLED;
1122         } else
1123                 nvme_abort_req(req);
1124         spin_unlock_irq(&nvmeq->q_lock);
1125
1126         return ret;
1127 }
1128
1129 static void nvme_free_queue(struct nvme_queue *nvmeq)
1130 {
1131         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1132                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1133         dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1134                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1135         kfree(nvmeq);
1136 }
1137
1138 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1139 {
1140         LLIST_HEAD(q_list);
1141         struct nvme_queue *nvmeq, *next;
1142         struct llist_node *entry;
1143         int i;
1144
1145         for (i = dev->queue_count - 1; i >= lowest; i--) {
1146                 struct nvme_queue *nvmeq = dev->queues[i];
1147                 llist_add(&nvmeq->node, &q_list);
1148                 dev->queue_count--;
1149                 dev->queues[i] = NULL;
1150         }
1151         synchronize_rcu();
1152         entry = llist_del_all(&q_list);
1153         llist_for_each_entry_safe(nvmeq, next, entry, node)
1154                 nvme_free_queue(nvmeq);
1155 }
1156
1157 /**
1158  * nvme_suspend_queue - put queue into suspended state
1159  * @nvmeq - queue to suspend
1160  */
1161 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1162 {
1163         int vector;
1164
1165         spin_lock_irq(&nvmeq->q_lock);
1166         if (nvmeq->cq_vector == -1) {
1167                 spin_unlock_irq(&nvmeq->q_lock);
1168                 return 1;
1169         }
1170         vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1171         nvmeq->dev->online_queues--;
1172         nvmeq->cq_vector = -1;
1173         spin_unlock_irq(&nvmeq->q_lock);
1174
1175         irq_set_affinity_hint(vector, NULL);
1176         free_irq(vector, nvmeq);
1177
1178         return 0;
1179 }
1180
1181 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1182 {
1183         struct blk_mq_hw_ctx *hctx = nvmeq->hctx;
1184
1185         spin_lock_irq(&nvmeq->q_lock);
1186         nvme_process_cq(nvmeq);
1187         if (hctx && hctx->tags)
1188                 blk_mq_tag_busy_iter(hctx, nvme_cancel_queue_ios, nvmeq);
1189         spin_unlock_irq(&nvmeq->q_lock);
1190 }
1191
1192 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1193 {
1194         struct nvme_queue *nvmeq = dev->queues[qid];
1195
1196         if (!nvmeq)
1197                 return;
1198         if (nvme_suspend_queue(nvmeq))
1199                 return;
1200
1201         /* Don't tell the adapter to delete the admin queue.
1202          * Don't tell a removed adapter to delete IO queues. */
1203         if (qid && readl(&dev->bar->csts) != -1) {
1204                 adapter_delete_sq(dev, qid);
1205                 adapter_delete_cq(dev, qid);
1206         }
1207         if (!qid && dev->admin_q)
1208                 blk_mq_freeze_queue_start(dev->admin_q);
1209         nvme_clear_queue(nvmeq);
1210 }
1211
1212 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1213                                                         int depth)
1214 {
1215         struct device *dmadev = &dev->pci_dev->dev;
1216         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1217         if (!nvmeq)
1218                 return NULL;
1219
1220         nvmeq->cqes = dma_zalloc_coherent(dmadev, CQ_SIZE(depth),
1221                                           &nvmeq->cq_dma_addr, GFP_KERNEL);
1222         if (!nvmeq->cqes)
1223                 goto free_nvmeq;
1224
1225         nvmeq->sq_cmds = dma_alloc_coherent(dmadev, SQ_SIZE(depth),
1226                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1227         if (!nvmeq->sq_cmds)
1228                 goto free_cqdma;
1229
1230         nvmeq->q_dmadev = dmadev;
1231         nvmeq->dev = dev;
1232         snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1233                         dev->instance, qid);
1234         spin_lock_init(&nvmeq->q_lock);
1235         nvmeq->cq_head = 0;
1236         nvmeq->cq_phase = 1;
1237         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1238         nvmeq->q_depth = depth;
1239         nvmeq->qid = qid;
1240         dev->queue_count++;
1241         dev->queues[qid] = nvmeq;
1242
1243         return nvmeq;
1244
1245  free_cqdma:
1246         dma_free_coherent(dmadev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1247                                                         nvmeq->cq_dma_addr);
1248  free_nvmeq:
1249         kfree(nvmeq);
1250         return NULL;
1251 }
1252
1253 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1254                                                         const char *name)
1255 {
1256         if (use_threaded_interrupts)
1257                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1258                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1259                                         name, nvmeq);
1260         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1261                                 IRQF_SHARED, name, nvmeq);
1262 }
1263
1264 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1265 {
1266         struct nvme_dev *dev = nvmeq->dev;
1267
1268         spin_lock_irq(&nvmeq->q_lock);
1269         nvmeq->sq_tail = 0;
1270         nvmeq->cq_head = 0;
1271         nvmeq->cq_phase = 1;
1272         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1273         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1274         dev->online_queues++;
1275         spin_unlock_irq(&nvmeq->q_lock);
1276 }
1277
1278 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1279 {
1280         struct nvme_dev *dev = nvmeq->dev;
1281         int result;
1282
1283         nvmeq->cq_vector = qid - 1;
1284         result = adapter_alloc_cq(dev, qid, nvmeq);
1285         if (result < 0)
1286                 return result;
1287
1288         result = adapter_alloc_sq(dev, qid, nvmeq);
1289         if (result < 0)
1290                 goto release_cq;
1291
1292         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1293         if (result < 0)
1294                 goto release_sq;
1295
1296         nvme_init_queue(nvmeq, qid);
1297         return result;
1298
1299  release_sq:
1300         adapter_delete_sq(dev, qid);
1301  release_cq:
1302         adapter_delete_cq(dev, qid);
1303         return result;
1304 }
1305
1306 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1307 {
1308         unsigned long timeout;
1309         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1310
1311         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1312
1313         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1314                 msleep(100);
1315                 if (fatal_signal_pending(current))
1316                         return -EINTR;
1317                 if (time_after(jiffies, timeout)) {
1318                         dev_err(&dev->pci_dev->dev,
1319                                 "Device not ready; aborting %s\n", enabled ?
1320                                                 "initialisation" : "reset");
1321                         return -ENODEV;
1322                 }
1323         }
1324
1325         return 0;
1326 }
1327
1328 /*
1329  * If the device has been passed off to us in an enabled state, just clear
1330  * the enabled bit.  The spec says we should set the 'shutdown notification
1331  * bits', but doing so may cause the device to complete commands to the
1332  * admin queue ... and we don't know what memory that might be pointing at!
1333  */
1334 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1335 {
1336         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1337         dev->ctrl_config &= ~NVME_CC_ENABLE;
1338         writel(dev->ctrl_config, &dev->bar->cc);
1339
1340         return nvme_wait_ready(dev, cap, false);
1341 }
1342
1343 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1344 {
1345         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1346         dev->ctrl_config |= NVME_CC_ENABLE;
1347         writel(dev->ctrl_config, &dev->bar->cc);
1348
1349         return nvme_wait_ready(dev, cap, true);
1350 }
1351
1352 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1353 {
1354         unsigned long timeout;
1355
1356         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1357         dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1358
1359         writel(dev->ctrl_config, &dev->bar->cc);
1360
1361         timeout = SHUTDOWN_TIMEOUT + jiffies;
1362         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1363                                                         NVME_CSTS_SHST_CMPLT) {
1364                 msleep(100);
1365                 if (fatal_signal_pending(current))
1366                         return -EINTR;
1367                 if (time_after(jiffies, timeout)) {
1368                         dev_err(&dev->pci_dev->dev,
1369                                 "Device shutdown incomplete; abort shutdown\n");
1370                         return -ENODEV;
1371                 }
1372         }
1373
1374         return 0;
1375 }
1376
1377 static struct blk_mq_ops nvme_mq_admin_ops = {
1378         .queue_rq       = nvme_admin_queue_rq,
1379         .map_queue      = blk_mq_map_queue,
1380         .init_hctx      = nvme_admin_init_hctx,
1381         .exit_hctx      = nvme_exit_hctx,
1382         .init_request   = nvme_admin_init_request,
1383         .timeout        = nvme_timeout,
1384 };
1385
1386 static struct blk_mq_ops nvme_mq_ops = {
1387         .queue_rq       = nvme_queue_rq,
1388         .map_queue      = blk_mq_map_queue,
1389         .init_hctx      = nvme_init_hctx,
1390         .exit_hctx      = nvme_exit_hctx,
1391         .init_request   = nvme_init_request,
1392         .timeout        = nvme_timeout,
1393 };
1394
1395 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1396 {
1397         if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1398                 blk_cleanup_queue(dev->admin_q);
1399                 blk_mq_free_tag_set(&dev->admin_tagset);
1400         }
1401 }
1402
1403 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1404 {
1405         if (!dev->admin_q) {
1406                 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1407                 dev->admin_tagset.nr_hw_queues = 1;
1408                 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1409                 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1410                 dev->admin_tagset.numa_node = dev_to_node(&dev->pci_dev->dev);
1411                 dev->admin_tagset.cmd_size = sizeof(struct nvme_cmd_info);
1412                 dev->admin_tagset.driver_data = dev;
1413
1414                 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1415                         return -ENOMEM;
1416
1417                 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1418                 if (IS_ERR(dev->admin_q)) {
1419                         blk_mq_free_tag_set(&dev->admin_tagset);
1420                         return -ENOMEM;
1421                 }
1422                 if (!blk_get_queue(dev->admin_q)) {
1423                         nvme_dev_remove_admin(dev);
1424                         return -ENODEV;
1425                 }
1426         } else
1427                 blk_mq_unfreeze_queue(dev->admin_q);
1428
1429         return 0;
1430 }
1431
1432 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1433 {
1434         int result;
1435         u32 aqa;
1436         u64 cap = readq(&dev->bar->cap);
1437         struct nvme_queue *nvmeq;
1438         unsigned page_shift = PAGE_SHIFT;
1439         unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1440         unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1441
1442         if (page_shift < dev_page_min) {
1443                 dev_err(&dev->pci_dev->dev,
1444                                 "Minimum device page size (%u) too large for "
1445                                 "host (%u)\n", 1 << dev_page_min,
1446                                 1 << page_shift);
1447                 return -ENODEV;
1448         }
1449         if (page_shift > dev_page_max) {
1450                 dev_info(&dev->pci_dev->dev,
1451                                 "Device maximum page size (%u) smaller than "
1452                                 "host (%u); enabling work-around\n",
1453                                 1 << dev_page_max, 1 << page_shift);
1454                 page_shift = dev_page_max;
1455         }
1456
1457         result = nvme_disable_ctrl(dev, cap);
1458         if (result < 0)
1459                 return result;
1460
1461         nvmeq = dev->queues[0];
1462         if (!nvmeq) {
1463                 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1464                 if (!nvmeq)
1465                         return -ENOMEM;
1466         }
1467
1468         aqa = nvmeq->q_depth - 1;
1469         aqa |= aqa << 16;
1470
1471         dev->page_size = 1 << page_shift;
1472
1473         dev->ctrl_config = NVME_CC_CSS_NVM;
1474         dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1475         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1476         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1477
1478         writel(aqa, &dev->bar->aqa);
1479         writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1480         writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1481
1482         result = nvme_enable_ctrl(dev, cap);
1483         if (result)
1484                 goto free_nvmeq;
1485
1486         nvmeq->cq_vector = 0;
1487         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1488         if (result)
1489                 goto free_nvmeq;
1490
1491         return result;
1492
1493  free_nvmeq:
1494         nvme_free_queues(dev, 0);
1495         return result;
1496 }
1497
1498 struct nvme_iod *nvme_map_user_pages(struct nvme_dev *dev, int write,
1499                                 unsigned long addr, unsigned length)
1500 {
1501         int i, err, count, nents, offset;
1502         struct scatterlist *sg;
1503         struct page **pages;
1504         struct nvme_iod *iod;
1505
1506         if (addr & 3)
1507                 return ERR_PTR(-EINVAL);
1508         if (!length || length > INT_MAX - PAGE_SIZE)
1509                 return ERR_PTR(-EINVAL);
1510
1511         offset = offset_in_page(addr);
1512         count = DIV_ROUND_UP(offset + length, PAGE_SIZE);
1513         pages = kcalloc(count, sizeof(*pages), GFP_KERNEL);
1514         if (!pages)
1515                 return ERR_PTR(-ENOMEM);
1516
1517         err = get_user_pages_fast(addr, count, 1, pages);
1518         if (err < count) {
1519                 count = err;
1520                 err = -EFAULT;
1521                 goto put_pages;
1522         }
1523
1524         err = -ENOMEM;
1525         iod = nvme_alloc_iod(count, length, dev, GFP_KERNEL);
1526         if (!iod)
1527                 goto put_pages;
1528
1529         sg = iod->sg;
1530         sg_init_table(sg, count);
1531         for (i = 0; i < count; i++) {
1532                 sg_set_page(&sg[i], pages[i],
1533                             min_t(unsigned, length, PAGE_SIZE - offset),
1534                             offset);
1535                 length -= (PAGE_SIZE - offset);
1536                 offset = 0;
1537         }
1538         sg_mark_end(&sg[i - 1]);
1539         iod->nents = count;
1540
1541         nents = dma_map_sg(&dev->pci_dev->dev, sg, count,
1542                                 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1543         if (!nents)
1544                 goto free_iod;
1545
1546         kfree(pages);
1547         return iod;
1548
1549  free_iod:
1550         kfree(iod);
1551  put_pages:
1552         for (i = 0; i < count; i++)
1553                 put_page(pages[i]);
1554         kfree(pages);
1555         return ERR_PTR(err);
1556 }
1557
1558 void nvme_unmap_user_pages(struct nvme_dev *dev, int write,
1559                         struct nvme_iod *iod)
1560 {
1561         int i;
1562
1563         dma_unmap_sg(&dev->pci_dev->dev, iod->sg, iod->nents,
1564                                 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1565
1566         for (i = 0; i < iod->nents; i++)
1567                 put_page(sg_page(&iod->sg[i]));
1568 }
1569
1570 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1571 {
1572         struct nvme_dev *dev = ns->dev;
1573         struct nvme_user_io io;
1574         struct nvme_command c;
1575         unsigned length, meta_len;
1576         int status, i;
1577         struct nvme_iod *iod, *meta_iod = NULL;
1578         dma_addr_t meta_dma_addr;
1579         void *meta, *uninitialized_var(meta_mem);
1580
1581         if (copy_from_user(&io, uio, sizeof(io)))
1582                 return -EFAULT;
1583         length = (io.nblocks + 1) << ns->lba_shift;
1584         meta_len = (io.nblocks + 1) * ns->ms;
1585
1586         if (meta_len && ((io.metadata & 3) || !io.metadata))
1587                 return -EINVAL;
1588
1589         switch (io.opcode) {
1590         case nvme_cmd_write:
1591         case nvme_cmd_read:
1592         case nvme_cmd_compare:
1593                 iod = nvme_map_user_pages(dev, io.opcode & 1, io.addr, length);
1594                 break;
1595         default:
1596                 return -EINVAL;
1597         }
1598
1599         if (IS_ERR(iod))
1600                 return PTR_ERR(iod);
1601
1602         memset(&c, 0, sizeof(c));
1603         c.rw.opcode = io.opcode;
1604         c.rw.flags = io.flags;
1605         c.rw.nsid = cpu_to_le32(ns->ns_id);
1606         c.rw.slba = cpu_to_le64(io.slba);
1607         c.rw.length = cpu_to_le16(io.nblocks);
1608         c.rw.control = cpu_to_le16(io.control);
1609         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1610         c.rw.reftag = cpu_to_le32(io.reftag);
1611         c.rw.apptag = cpu_to_le16(io.apptag);
1612         c.rw.appmask = cpu_to_le16(io.appmask);
1613
1614         if (meta_len) {
1615                 meta_iod = nvme_map_user_pages(dev, io.opcode & 1, io.metadata,
1616                                                                 meta_len);
1617                 if (IS_ERR(meta_iod)) {
1618                         status = PTR_ERR(meta_iod);
1619                         meta_iod = NULL;
1620                         goto unmap;
1621                 }
1622
1623                 meta_mem = dma_alloc_coherent(&dev->pci_dev->dev, meta_len,
1624                                                 &meta_dma_addr, GFP_KERNEL);
1625                 if (!meta_mem) {
1626                         status = -ENOMEM;
1627                         goto unmap;
1628                 }
1629
1630                 if (io.opcode & 1) {
1631                         int meta_offset = 0;
1632
1633                         for (i = 0; i < meta_iod->nents; i++) {
1634                                 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1635                                                 meta_iod->sg[i].offset;
1636                                 memcpy(meta_mem + meta_offset, meta,
1637                                                 meta_iod->sg[i].length);
1638                                 kunmap_atomic(meta);
1639                                 meta_offset += meta_iod->sg[i].length;
1640                         }
1641                 }
1642
1643                 c.rw.metadata = cpu_to_le64(meta_dma_addr);
1644         }
1645
1646         length = nvme_setup_prps(dev, iod, length, GFP_KERNEL);
1647         c.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1648         c.rw.prp2 = cpu_to_le64(iod->first_dma);
1649
1650         if (length != (io.nblocks + 1) << ns->lba_shift)
1651                 status = -ENOMEM;
1652         else
1653                 status = nvme_submit_io_cmd(dev, ns, &c, NULL);
1654
1655         if (meta_len) {
1656                 if (status == NVME_SC_SUCCESS && !(io.opcode & 1)) {
1657                         int meta_offset = 0;
1658
1659                         for (i = 0; i < meta_iod->nents; i++) {
1660                                 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1661                                                 meta_iod->sg[i].offset;
1662                                 memcpy(meta, meta_mem + meta_offset,
1663                                                 meta_iod->sg[i].length);
1664                                 kunmap_atomic(meta);
1665                                 meta_offset += meta_iod->sg[i].length;
1666                         }
1667                 }
1668
1669                 dma_free_coherent(&dev->pci_dev->dev, meta_len, meta_mem,
1670                                                                 meta_dma_addr);
1671         }
1672
1673  unmap:
1674         nvme_unmap_user_pages(dev, io.opcode & 1, iod);
1675         nvme_free_iod(dev, iod);
1676
1677         if (meta_iod) {
1678                 nvme_unmap_user_pages(dev, io.opcode & 1, meta_iod);
1679                 nvme_free_iod(dev, meta_iod);
1680         }
1681
1682         return status;
1683 }
1684
1685 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1686                         struct nvme_passthru_cmd __user *ucmd)
1687 {
1688         struct nvme_passthru_cmd cmd;
1689         struct nvme_command c;
1690         int status, length;
1691         struct nvme_iod *uninitialized_var(iod);
1692         unsigned timeout;
1693
1694         if (!capable(CAP_SYS_ADMIN))
1695                 return -EACCES;
1696         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1697                 return -EFAULT;
1698
1699         memset(&c, 0, sizeof(c));
1700         c.common.opcode = cmd.opcode;
1701         c.common.flags = cmd.flags;
1702         c.common.nsid = cpu_to_le32(cmd.nsid);
1703         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1704         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1705         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1706         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1707         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1708         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1709         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1710         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1711
1712         length = cmd.data_len;
1713         if (cmd.data_len) {
1714                 iod = nvme_map_user_pages(dev, cmd.opcode & 1, cmd.addr,
1715                                                                 length);
1716                 if (IS_ERR(iod))
1717                         return PTR_ERR(iod);
1718                 length = nvme_setup_prps(dev, iod, length, GFP_KERNEL);
1719                 c.common.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1720                 c.common.prp2 = cpu_to_le64(iod->first_dma);
1721         }
1722
1723         timeout = cmd.timeout_ms ? msecs_to_jiffies(cmd.timeout_ms) :
1724                                                                 ADMIN_TIMEOUT;
1725
1726         if (length != cmd.data_len)
1727                 status = -ENOMEM;
1728         else if (ns) {
1729                 struct request *req;
1730
1731                 req = blk_mq_alloc_request(ns->queue, WRITE,
1732                                                 (GFP_KERNEL|__GFP_WAIT), false);
1733                 if (IS_ERR(req))
1734                         status = PTR_ERR(req);
1735                 else {
1736                         status = nvme_submit_sync_cmd(req, &c, &cmd.result,
1737                                                                 timeout);
1738                         blk_mq_free_request(req);
1739                 }
1740         } else
1741                 status = __nvme_submit_admin_cmd(dev, &c, &cmd.result, timeout);
1742
1743         if (cmd.data_len) {
1744                 nvme_unmap_user_pages(dev, cmd.opcode & 1, iod);
1745                 nvme_free_iod(dev, iod);
1746         }
1747
1748         if ((status >= 0) && copy_to_user(&ucmd->result, &cmd.result,
1749                                                         sizeof(cmd.result)))
1750                 status = -EFAULT;
1751
1752         return status;
1753 }
1754
1755 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1756                                                         unsigned long arg)
1757 {
1758         struct nvme_ns *ns = bdev->bd_disk->private_data;
1759
1760         switch (cmd) {
1761         case NVME_IOCTL_ID:
1762                 force_successful_syscall_return();
1763                 return ns->ns_id;
1764         case NVME_IOCTL_ADMIN_CMD:
1765                 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1766         case NVME_IOCTL_IO_CMD:
1767                 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1768         case NVME_IOCTL_SUBMIT_IO:
1769                 return nvme_submit_io(ns, (void __user *)arg);
1770         case SG_GET_VERSION_NUM:
1771                 return nvme_sg_get_version_num((void __user *)arg);
1772         case SG_IO:
1773                 return nvme_sg_io(ns, (void __user *)arg);
1774         default:
1775                 return -ENOTTY;
1776         }
1777 }
1778
1779 #ifdef CONFIG_COMPAT
1780 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1781                                         unsigned int cmd, unsigned long arg)
1782 {
1783         switch (cmd) {
1784         case SG_IO:
1785                 return -ENOIOCTLCMD;
1786         }
1787         return nvme_ioctl(bdev, mode, cmd, arg);
1788 }
1789 #else
1790 #define nvme_compat_ioctl       NULL
1791 #endif
1792
1793 static int nvme_open(struct block_device *bdev, fmode_t mode)
1794 {
1795         int ret = 0;
1796         struct nvme_ns *ns;
1797
1798         spin_lock(&dev_list_lock);
1799         ns = bdev->bd_disk->private_data;
1800         if (!ns)
1801                 ret = -ENXIO;
1802         else if (!kref_get_unless_zero(&ns->dev->kref))
1803                 ret = -ENXIO;
1804         spin_unlock(&dev_list_lock);
1805
1806         return ret;
1807 }
1808
1809 static void nvme_free_dev(struct kref *kref);
1810
1811 static void nvme_release(struct gendisk *disk, fmode_t mode)
1812 {
1813         struct nvme_ns *ns = disk->private_data;
1814         struct nvme_dev *dev = ns->dev;
1815
1816         kref_put(&dev->kref, nvme_free_dev);
1817 }
1818
1819 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1820 {
1821         /* some standard values */
1822         geo->heads = 1 << 6;
1823         geo->sectors = 1 << 5;
1824         geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1825         return 0;
1826 }
1827
1828 static int nvme_revalidate_disk(struct gendisk *disk)
1829 {
1830         struct nvme_ns *ns = disk->private_data;
1831         struct nvme_dev *dev = ns->dev;
1832         struct nvme_id_ns *id;
1833         dma_addr_t dma_addr;
1834         int lbaf;
1835
1836         id = dma_alloc_coherent(&dev->pci_dev->dev, 4096, &dma_addr,
1837                                                                 GFP_KERNEL);
1838         if (!id) {
1839                 dev_warn(&dev->pci_dev->dev, "%s: Memory alocation failure\n",
1840                                                                 __func__);
1841                 return 0;
1842         }
1843
1844         if (nvme_identify(dev, ns->ns_id, 0, dma_addr))
1845                 goto free;
1846
1847         lbaf = id->flbas & 0xf;
1848         ns->lba_shift = id->lbaf[lbaf].ds;
1849
1850         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
1851         set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
1852  free:
1853         dma_free_coherent(&dev->pci_dev->dev, 4096, id, dma_addr);
1854         return 0;
1855 }
1856
1857 static const struct block_device_operations nvme_fops = {
1858         .owner          = THIS_MODULE,
1859         .ioctl          = nvme_ioctl,
1860         .compat_ioctl   = nvme_compat_ioctl,
1861         .open           = nvme_open,
1862         .release        = nvme_release,
1863         .getgeo         = nvme_getgeo,
1864         .revalidate_disk= nvme_revalidate_disk,
1865 };
1866
1867 static int nvme_kthread(void *data)
1868 {
1869         struct nvme_dev *dev, *next;
1870
1871         while (!kthread_should_stop()) {
1872                 set_current_state(TASK_INTERRUPTIBLE);
1873                 spin_lock(&dev_list_lock);
1874                 list_for_each_entry_safe(dev, next, &dev_list, node) {
1875                         int i;
1876                         if (readl(&dev->bar->csts) & NVME_CSTS_CFS &&
1877                                                         dev->initialized) {
1878                                 if (work_busy(&dev->reset_work))
1879                                         continue;
1880                                 list_del_init(&dev->node);
1881                                 dev_warn(&dev->pci_dev->dev,
1882                                         "Failed status: %x, reset controller\n",
1883                                         readl(&dev->bar->csts));
1884                                 dev->reset_workfn = nvme_reset_failed_dev;
1885                                 queue_work(nvme_workq, &dev->reset_work);
1886                                 continue;
1887                         }
1888                         for (i = 0; i < dev->queue_count; i++) {
1889                                 struct nvme_queue *nvmeq = dev->queues[i];
1890                                 if (!nvmeq)
1891                                         continue;
1892                                 spin_lock_irq(&nvmeq->q_lock);
1893                                 nvme_process_cq(nvmeq);
1894
1895                                 while ((i == 0) && (dev->event_limit > 0)) {
1896                                         if (nvme_submit_async_admin_req(dev))
1897                                                 break;
1898                                         dev->event_limit--;
1899                                 }
1900                                 spin_unlock_irq(&nvmeq->q_lock);
1901                         }
1902                 }
1903                 spin_unlock(&dev_list_lock);
1904                 schedule_timeout(round_jiffies_relative(HZ));
1905         }
1906         return 0;
1907 }
1908
1909 static void nvme_config_discard(struct nvme_ns *ns)
1910 {
1911         u32 logical_block_size = queue_logical_block_size(ns->queue);
1912         ns->queue->limits.discard_zeroes_data = 0;
1913         ns->queue->limits.discard_alignment = logical_block_size;
1914         ns->queue->limits.discard_granularity = logical_block_size;
1915         ns->queue->limits.max_discard_sectors = 0xffffffff;
1916         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1917 }
1918
1919 static struct nvme_ns *nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid,
1920                         struct nvme_id_ns *id, struct nvme_lba_range_type *rt)
1921 {
1922         struct nvme_ns *ns;
1923         struct gendisk *disk;
1924         int node = dev_to_node(&dev->pci_dev->dev);
1925         int lbaf;
1926
1927         if (rt->attributes & NVME_LBART_ATTRIB_HIDE)
1928                 return NULL;
1929
1930         ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
1931         if (!ns)
1932                 return NULL;
1933         ns->queue = blk_mq_init_queue(&dev->tagset);
1934         if (IS_ERR(ns->queue))
1935                 goto out_free_ns;
1936         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
1937         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
1938         queue_flag_set_unlocked(QUEUE_FLAG_SG_GAPS, ns->queue);
1939         ns->dev = dev;
1940         ns->queue->queuedata = ns;
1941
1942         disk = alloc_disk_node(0, node);
1943         if (!disk)
1944                 goto out_free_queue;
1945
1946         ns->ns_id = nsid;
1947         ns->disk = disk;
1948         lbaf = id->flbas & 0xf;
1949         ns->lba_shift = id->lbaf[lbaf].ds;
1950         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1951         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
1952         if (dev->max_hw_sectors)
1953                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
1954         if (dev->stripe_size)
1955                 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
1956         if (dev->vwc & NVME_CTRL_VWC_PRESENT)
1957                 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
1958
1959         disk->major = nvme_major;
1960         disk->first_minor = 0;
1961         disk->fops = &nvme_fops;
1962         disk->private_data = ns;
1963         disk->queue = ns->queue;
1964         disk->driverfs_dev = &dev->pci_dev->dev;
1965         disk->flags = GENHD_FL_EXT_DEVT;
1966         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
1967         set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
1968
1969         if (dev->oncs & NVME_CTRL_ONCS_DSM)
1970                 nvme_config_discard(ns);
1971
1972         return ns;
1973
1974  out_free_queue:
1975         blk_cleanup_queue(ns->queue);
1976  out_free_ns:
1977         kfree(ns);
1978         return NULL;
1979 }
1980
1981 static void nvme_create_io_queues(struct nvme_dev *dev)
1982 {
1983         unsigned i;
1984
1985         for (i = dev->queue_count; i <= dev->max_qid; i++)
1986                 if (!nvme_alloc_queue(dev, i, dev->q_depth))
1987                         break;
1988
1989         for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
1990                 if (nvme_create_queue(dev->queues[i], i))
1991                         break;
1992 }
1993
1994 static int set_queue_count(struct nvme_dev *dev, int count)
1995 {
1996         int status;
1997         u32 result;
1998         u32 q_count = (count - 1) | ((count - 1) << 16);
1999
2000         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2001                                                                 &result);
2002         if (status < 0)
2003                 return status;
2004         if (status > 0) {
2005                 dev_err(&dev->pci_dev->dev, "Could not set queue count (%d)\n",
2006                                                                         status);
2007                 return 0;
2008         }
2009         return min(result & 0xffff, result >> 16) + 1;
2010 }
2011
2012 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2013 {
2014         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2015 }
2016
2017 static int nvme_setup_io_queues(struct nvme_dev *dev)
2018 {
2019         struct nvme_queue *adminq = dev->queues[0];
2020         struct pci_dev *pdev = dev->pci_dev;
2021         int result, i, vecs, nr_io_queues, size;
2022
2023         nr_io_queues = num_possible_cpus();
2024         result = set_queue_count(dev, nr_io_queues);
2025         if (result <= 0)
2026                 return result;
2027         if (result < nr_io_queues)
2028                 nr_io_queues = result;
2029
2030         size = db_bar_size(dev, nr_io_queues);
2031         if (size > 8192) {
2032                 iounmap(dev->bar);
2033                 do {
2034                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2035                         if (dev->bar)
2036                                 break;
2037                         if (!--nr_io_queues)
2038                                 return -ENOMEM;
2039                         size = db_bar_size(dev, nr_io_queues);
2040                 } while (1);
2041                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2042                 adminq->q_db = dev->dbs;
2043         }
2044
2045         /* Deregister the admin queue's interrupt */
2046         free_irq(dev->entry[0].vector, adminq);
2047
2048         /*
2049          * If we enable msix early due to not intx, disable it again before
2050          * setting up the full range we need.
2051          */
2052         if (!pdev->irq)
2053                 pci_disable_msix(pdev);
2054
2055         for (i = 0; i < nr_io_queues; i++)
2056                 dev->entry[i].entry = i;
2057         vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2058         if (vecs < 0) {
2059                 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2060                 if (vecs < 0) {
2061                         vecs = 1;
2062                 } else {
2063                         for (i = 0; i < vecs; i++)
2064                                 dev->entry[i].vector = i + pdev->irq;
2065                 }
2066         }
2067
2068         /*
2069          * Should investigate if there's a performance win from allocating
2070          * more queues than interrupt vectors; it might allow the submission
2071          * path to scale better, even if the receive path is limited by the
2072          * number of interrupts.
2073          */
2074         nr_io_queues = vecs;
2075         dev->max_qid = nr_io_queues;
2076
2077         result = queue_request_irq(dev, adminq, adminq->irqname);
2078         if (result)
2079                 goto free_queues;
2080
2081         /* Free previously allocated queues that are no longer usable */
2082         nvme_free_queues(dev, nr_io_queues + 1);
2083         nvme_create_io_queues(dev);
2084
2085         return 0;
2086
2087  free_queues:
2088         nvme_free_queues(dev, 1);
2089         return result;
2090 }
2091
2092 /*
2093  * Return: error value if an error occurred setting up the queues or calling
2094  * Identify Device.  0 if these succeeded, even if adding some of the
2095  * namespaces failed.  At the moment, these failures are silent.  TBD which
2096  * failures should be reported.
2097  */
2098 static int nvme_dev_add(struct nvme_dev *dev)
2099 {
2100         struct pci_dev *pdev = dev->pci_dev;
2101         int res;
2102         unsigned nn, i;
2103         struct nvme_ns *ns;
2104         struct nvme_id_ctrl *ctrl;
2105         struct nvme_id_ns *id_ns;
2106         void *mem;
2107         dma_addr_t dma_addr;
2108         int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2109
2110         mem = dma_alloc_coherent(&pdev->dev, 8192, &dma_addr, GFP_KERNEL);
2111         if (!mem)
2112                 return -ENOMEM;
2113
2114         res = nvme_identify(dev, 0, 1, dma_addr);
2115         if (res) {
2116                 dev_err(&pdev->dev, "Identify Controller failed (%d)\n", res);
2117                 res = -EIO;
2118                 goto out;
2119         }
2120
2121         ctrl = mem;
2122         nn = le32_to_cpup(&ctrl->nn);
2123         dev->oncs = le16_to_cpup(&ctrl->oncs);
2124         dev->abort_limit = ctrl->acl + 1;
2125         dev->vwc = ctrl->vwc;
2126         dev->event_limit = min(ctrl->aerl + 1, 8);
2127         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2128         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2129         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2130         if (ctrl->mdts)
2131                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2132         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2133                         (pdev->device == 0x0953) && ctrl->vs[3]) {
2134                 unsigned int max_hw_sectors;
2135
2136                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2137                 max_hw_sectors = dev->stripe_size >> (shift - 9);
2138                 if (dev->max_hw_sectors) {
2139                         dev->max_hw_sectors = min(max_hw_sectors,
2140                                                         dev->max_hw_sectors);
2141                 } else
2142                         dev->max_hw_sectors = max_hw_sectors;
2143         }
2144
2145         dev->tagset.ops = &nvme_mq_ops;
2146         dev->tagset.nr_hw_queues = dev->online_queues - 1;
2147         dev->tagset.timeout = NVME_IO_TIMEOUT;
2148         dev->tagset.numa_node = dev_to_node(&dev->pci_dev->dev);
2149         dev->tagset.queue_depth =
2150                                 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2151         dev->tagset.cmd_size = sizeof(struct nvme_cmd_info);
2152         dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2153         dev->tagset.driver_data = dev;
2154
2155         if (blk_mq_alloc_tag_set(&dev->tagset))
2156                 goto out;
2157
2158         id_ns = mem;
2159         for (i = 1; i <= nn; i++) {
2160                 res = nvme_identify(dev, i, 0, dma_addr);
2161                 if (res)
2162                         continue;
2163
2164                 if (id_ns->ncap == 0)
2165                         continue;
2166
2167                 res = nvme_get_features(dev, NVME_FEAT_LBA_RANGE, i,
2168                                                         dma_addr + 4096, NULL);
2169                 if (res)
2170                         memset(mem + 4096, 0, 4096);
2171
2172                 ns = nvme_alloc_ns(dev, i, mem, mem + 4096);
2173                 if (ns)
2174                         list_add_tail(&ns->list, &dev->namespaces);
2175         }
2176         list_for_each_entry(ns, &dev->namespaces, list)
2177                 add_disk(ns->disk);
2178         res = 0;
2179
2180  out:
2181         dma_free_coherent(&dev->pci_dev->dev, 8192, mem, dma_addr);
2182         return res;
2183 }
2184
2185 static int nvme_dev_map(struct nvme_dev *dev)
2186 {
2187         u64 cap;
2188         int bars, result = -ENOMEM;
2189         struct pci_dev *pdev = dev->pci_dev;
2190
2191         if (pci_enable_device_mem(pdev))
2192                 return result;
2193
2194         dev->entry[0].vector = pdev->irq;
2195         pci_set_master(pdev);
2196         bars = pci_select_bars(pdev, IORESOURCE_MEM);
2197         if (!bars)
2198                 goto disable_pci;
2199
2200         if (pci_request_selected_regions(pdev, bars, "nvme"))
2201                 goto disable_pci;
2202
2203         if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) &&
2204             dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))
2205                 goto disable;
2206
2207         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2208         if (!dev->bar)
2209                 goto disable;
2210
2211         if (readl(&dev->bar->csts) == -1) {
2212                 result = -ENODEV;
2213                 goto unmap;
2214         }
2215
2216         /*
2217          * Some devices don't advertse INTx interrupts, pre-enable a single
2218          * MSIX vec for setup. We'll adjust this later.
2219          */
2220         if (!pdev->irq) {
2221                 result = pci_enable_msix(pdev, dev->entry, 1);
2222                 if (result < 0)
2223                         goto unmap;
2224         }
2225
2226         cap = readq(&dev->bar->cap);
2227         dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2228         dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2229         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2230
2231         return 0;
2232
2233  unmap:
2234         iounmap(dev->bar);
2235         dev->bar = NULL;
2236  disable:
2237         pci_release_regions(pdev);
2238  disable_pci:
2239         pci_disable_device(pdev);
2240         return result;
2241 }
2242
2243 static void nvme_dev_unmap(struct nvme_dev *dev)
2244 {
2245         if (dev->pci_dev->msi_enabled)
2246                 pci_disable_msi(dev->pci_dev);
2247         else if (dev->pci_dev->msix_enabled)
2248                 pci_disable_msix(dev->pci_dev);
2249
2250         if (dev->bar) {
2251                 iounmap(dev->bar);
2252                 dev->bar = NULL;
2253                 pci_release_regions(dev->pci_dev);
2254         }
2255
2256         if (pci_is_enabled(dev->pci_dev))
2257                 pci_disable_device(dev->pci_dev);
2258 }
2259
2260 struct nvme_delq_ctx {
2261         struct task_struct *waiter;
2262         struct kthread_worker *worker;
2263         atomic_t refcount;
2264 };
2265
2266 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2267 {
2268         dq->waiter = current;
2269         mb();
2270
2271         for (;;) {
2272                 set_current_state(TASK_KILLABLE);
2273                 if (!atomic_read(&dq->refcount))
2274                         break;
2275                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2276                                         fatal_signal_pending(current)) {
2277                         /*
2278                          * Disable the controller first since we can't trust it
2279                          * at this point, but leave the admin queue enabled
2280                          * until all queue deletion requests are flushed.
2281                          * FIXME: This may take a while if there are more h/w
2282                          * queues than admin tags.
2283                          */
2284                         set_current_state(TASK_RUNNING);
2285                         nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2286                         nvme_clear_queue(dev->queues[0]);
2287                         flush_kthread_worker(dq->worker);
2288                         nvme_disable_queue(dev, 0);
2289                         return;
2290                 }
2291         }
2292         set_current_state(TASK_RUNNING);
2293 }
2294
2295 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2296 {
2297         atomic_dec(&dq->refcount);
2298         if (dq->waiter)
2299                 wake_up_process(dq->waiter);
2300 }
2301
2302 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2303 {
2304         atomic_inc(&dq->refcount);
2305         return dq;
2306 }
2307
2308 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2309 {
2310         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2311
2312         nvme_clear_queue(nvmeq);
2313         nvme_put_dq(dq);
2314 }
2315
2316 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2317                                                 kthread_work_func_t fn)
2318 {
2319         struct nvme_command c;
2320
2321         memset(&c, 0, sizeof(c));
2322         c.delete_queue.opcode = opcode;
2323         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2324
2325         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2326         return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2327                                                                 ADMIN_TIMEOUT);
2328 }
2329
2330 static void nvme_del_cq_work_handler(struct kthread_work *work)
2331 {
2332         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2333                                                         cmdinfo.work);
2334         nvme_del_queue_end(nvmeq);
2335 }
2336
2337 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2338 {
2339         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2340                                                 nvme_del_cq_work_handler);
2341 }
2342
2343 static void nvme_del_sq_work_handler(struct kthread_work *work)
2344 {
2345         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2346                                                         cmdinfo.work);
2347         int status = nvmeq->cmdinfo.status;
2348
2349         if (!status)
2350                 status = nvme_delete_cq(nvmeq);
2351         if (status)
2352                 nvme_del_queue_end(nvmeq);
2353 }
2354
2355 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2356 {
2357         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2358                                                 nvme_del_sq_work_handler);
2359 }
2360
2361 static void nvme_del_queue_start(struct kthread_work *work)
2362 {
2363         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2364                                                         cmdinfo.work);
2365         if (nvme_delete_sq(nvmeq))
2366                 nvme_del_queue_end(nvmeq);
2367 }
2368
2369 static void nvme_disable_io_queues(struct nvme_dev *dev)
2370 {
2371         int i;
2372         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2373         struct nvme_delq_ctx dq;
2374         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2375                                         &worker, "nvme%d", dev->instance);
2376
2377         if (IS_ERR(kworker_task)) {
2378                 dev_err(&dev->pci_dev->dev,
2379                         "Failed to create queue del task\n");
2380                 for (i = dev->queue_count - 1; i > 0; i--)
2381                         nvme_disable_queue(dev, i);
2382                 return;
2383         }
2384
2385         dq.waiter = NULL;
2386         atomic_set(&dq.refcount, 0);
2387         dq.worker = &worker;
2388         for (i = dev->queue_count - 1; i > 0; i--) {
2389                 struct nvme_queue *nvmeq = dev->queues[i];
2390
2391                 if (nvme_suspend_queue(nvmeq))
2392                         continue;
2393                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2394                 nvmeq->cmdinfo.worker = dq.worker;
2395                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2396                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2397         }
2398         nvme_wait_dq(&dq, dev);
2399         kthread_stop(kworker_task);
2400 }
2401
2402 /*
2403 * Remove the node from the device list and check
2404 * for whether or not we need to stop the nvme_thread.
2405 */
2406 static void nvme_dev_list_remove(struct nvme_dev *dev)
2407 {
2408         struct task_struct *tmp = NULL;
2409
2410         spin_lock(&dev_list_lock);
2411         list_del_init(&dev->node);
2412         if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2413                 tmp = nvme_thread;
2414                 nvme_thread = NULL;
2415         }
2416         spin_unlock(&dev_list_lock);
2417
2418         if (tmp)
2419                 kthread_stop(tmp);
2420 }
2421
2422 static void nvme_freeze_queues(struct nvme_dev *dev)
2423 {
2424         struct nvme_ns *ns;
2425
2426         list_for_each_entry(ns, &dev->namespaces, list) {
2427                 blk_mq_freeze_queue_start(ns->queue);
2428
2429                 spin_lock(ns->queue->queue_lock);
2430                 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2431                 spin_unlock(ns->queue->queue_lock);
2432
2433                 blk_mq_cancel_requeue_work(ns->queue);
2434                 blk_mq_stop_hw_queues(ns->queue);
2435         }
2436 }
2437
2438 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2439 {
2440         struct nvme_ns *ns;
2441
2442         list_for_each_entry(ns, &dev->namespaces, list) {
2443                 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2444                 blk_mq_unfreeze_queue(ns->queue);
2445                 blk_mq_start_stopped_hw_queues(ns->queue, true);
2446                 blk_mq_kick_requeue_list(ns->queue);
2447         }
2448 }
2449
2450 static void nvme_dev_shutdown(struct nvme_dev *dev)
2451 {
2452         int i;
2453         u32 csts = -1;
2454
2455         dev->initialized = 0;
2456         nvme_dev_list_remove(dev);
2457
2458         if (dev->bar) {
2459                 nvme_freeze_queues(dev);
2460                 csts = readl(&dev->bar->csts);
2461         }
2462         if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2463                 for (i = dev->queue_count - 1; i >= 0; i--) {
2464                         struct nvme_queue *nvmeq = dev->queues[i];
2465                         nvme_suspend_queue(nvmeq);
2466                         nvme_clear_queue(nvmeq);
2467                 }
2468         } else {
2469                 nvme_disable_io_queues(dev);
2470                 nvme_shutdown_ctrl(dev);
2471                 nvme_disable_queue(dev, 0);
2472         }
2473         nvme_dev_unmap(dev);
2474 }
2475
2476 static void nvme_dev_remove(struct nvme_dev *dev)
2477 {
2478         struct nvme_ns *ns;
2479
2480         list_for_each_entry(ns, &dev->namespaces, list) {
2481                 if (ns->disk->flags & GENHD_FL_UP)
2482                         del_gendisk(ns->disk);
2483                 if (!blk_queue_dying(ns->queue)) {
2484                         blk_mq_abort_requeue_list(ns->queue);
2485                         blk_cleanup_queue(ns->queue);
2486                 }
2487         }
2488 }
2489
2490 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2491 {
2492         struct device *dmadev = &dev->pci_dev->dev;
2493         dev->prp_page_pool = dma_pool_create("prp list page", dmadev,
2494                                                 PAGE_SIZE, PAGE_SIZE, 0);
2495         if (!dev->prp_page_pool)
2496                 return -ENOMEM;
2497
2498         /* Optimisation for I/Os between 4k and 128k */
2499         dev->prp_small_pool = dma_pool_create("prp list 256", dmadev,
2500                                                 256, 256, 0);
2501         if (!dev->prp_small_pool) {
2502                 dma_pool_destroy(dev->prp_page_pool);
2503                 return -ENOMEM;
2504         }
2505         return 0;
2506 }
2507
2508 static void nvme_release_prp_pools(struct nvme_dev *dev)
2509 {
2510         dma_pool_destroy(dev->prp_page_pool);
2511         dma_pool_destroy(dev->prp_small_pool);
2512 }
2513
2514 static DEFINE_IDA(nvme_instance_ida);
2515
2516 static int nvme_set_instance(struct nvme_dev *dev)
2517 {
2518         int instance, error;
2519
2520         do {
2521                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2522                         return -ENODEV;
2523
2524                 spin_lock(&dev_list_lock);
2525                 error = ida_get_new(&nvme_instance_ida, &instance);
2526                 spin_unlock(&dev_list_lock);
2527         } while (error == -EAGAIN);
2528
2529         if (error)
2530                 return -ENODEV;
2531
2532         dev->instance = instance;
2533         return 0;
2534 }
2535
2536 static void nvme_release_instance(struct nvme_dev *dev)
2537 {
2538         spin_lock(&dev_list_lock);
2539         ida_remove(&nvme_instance_ida, dev->instance);
2540         spin_unlock(&dev_list_lock);
2541 }
2542
2543 static void nvme_free_namespaces(struct nvme_dev *dev)
2544 {
2545         struct nvme_ns *ns, *next;
2546
2547         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2548                 list_del(&ns->list);
2549
2550                 spin_lock(&dev_list_lock);
2551                 ns->disk->private_data = NULL;
2552                 spin_unlock(&dev_list_lock);
2553
2554                 put_disk(ns->disk);
2555                 kfree(ns);
2556         }
2557 }
2558
2559 static void nvme_free_dev(struct kref *kref)
2560 {
2561         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2562
2563         pci_dev_put(dev->pci_dev);
2564         nvme_free_namespaces(dev);
2565         nvme_release_instance(dev);
2566         blk_mq_free_tag_set(&dev->tagset);
2567         blk_put_queue(dev->admin_q);
2568         kfree(dev->queues);
2569         kfree(dev->entry);
2570         kfree(dev);
2571 }
2572
2573 static int nvme_dev_open(struct inode *inode, struct file *f)
2574 {
2575         struct nvme_dev *dev = container_of(f->private_data, struct nvme_dev,
2576                                                                 miscdev);
2577         kref_get(&dev->kref);
2578         f->private_data = dev;
2579         return 0;
2580 }
2581
2582 static int nvme_dev_release(struct inode *inode, struct file *f)
2583 {
2584         struct nvme_dev *dev = f->private_data;
2585         kref_put(&dev->kref, nvme_free_dev);
2586         return 0;
2587 }
2588
2589 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2590 {
2591         struct nvme_dev *dev = f->private_data;
2592         struct nvme_ns *ns;
2593
2594         switch (cmd) {
2595         case NVME_IOCTL_ADMIN_CMD:
2596                 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2597         case NVME_IOCTL_IO_CMD:
2598                 if (list_empty(&dev->namespaces))
2599                         return -ENOTTY;
2600                 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2601                 return nvme_user_cmd(dev, ns, (void __user *)arg);
2602         default:
2603                 return -ENOTTY;
2604         }
2605 }
2606
2607 static const struct file_operations nvme_dev_fops = {
2608         .owner          = THIS_MODULE,
2609         .open           = nvme_dev_open,
2610         .release        = nvme_dev_release,
2611         .unlocked_ioctl = nvme_dev_ioctl,
2612         .compat_ioctl   = nvme_dev_ioctl,
2613 };
2614
2615 static void nvme_set_irq_hints(struct nvme_dev *dev)
2616 {
2617         struct nvme_queue *nvmeq;
2618         int i;
2619
2620         for (i = 0; i < dev->online_queues; i++) {
2621                 nvmeq = dev->queues[i];
2622
2623                 if (!nvmeq->hctx)
2624                         continue;
2625
2626                 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2627                                                         nvmeq->hctx->cpumask);
2628         }
2629 }
2630
2631 static int nvme_dev_start(struct nvme_dev *dev)
2632 {
2633         int result;
2634         bool start_thread = false;
2635
2636         result = nvme_dev_map(dev);
2637         if (result)
2638                 return result;
2639
2640         result = nvme_configure_admin_queue(dev);
2641         if (result)
2642                 goto unmap;
2643
2644         spin_lock(&dev_list_lock);
2645         if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2646                 start_thread = true;
2647                 nvme_thread = NULL;
2648         }
2649         list_add(&dev->node, &dev_list);
2650         spin_unlock(&dev_list_lock);
2651
2652         if (start_thread) {
2653                 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2654                 wake_up_all(&nvme_kthread_wait);
2655         } else
2656                 wait_event_killable(nvme_kthread_wait, nvme_thread);
2657
2658         if (IS_ERR_OR_NULL(nvme_thread)) {
2659                 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2660                 goto disable;
2661         }
2662
2663         nvme_init_queue(dev->queues[0], 0);
2664         result = nvme_alloc_admin_tags(dev);
2665         if (result)
2666                 goto disable;
2667
2668         result = nvme_setup_io_queues(dev);
2669         if (result)
2670                 goto free_tags;
2671
2672         nvme_set_irq_hints(dev);
2673
2674         return result;
2675
2676  free_tags:
2677         nvme_dev_remove_admin(dev);
2678  disable:
2679         nvme_disable_queue(dev, 0);
2680         nvme_dev_list_remove(dev);
2681  unmap:
2682         nvme_dev_unmap(dev);
2683         return result;
2684 }
2685
2686 static int nvme_remove_dead_ctrl(void *arg)
2687 {
2688         struct nvme_dev *dev = (struct nvme_dev *)arg;
2689         struct pci_dev *pdev = dev->pci_dev;
2690
2691         if (pci_get_drvdata(pdev))
2692                 pci_stop_and_remove_bus_device_locked(pdev);
2693         kref_put(&dev->kref, nvme_free_dev);
2694         return 0;
2695 }
2696
2697 static void nvme_remove_disks(struct work_struct *ws)
2698 {
2699         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2700
2701         nvme_free_queues(dev, 1);
2702         nvme_dev_remove(dev);
2703 }
2704
2705 static int nvme_dev_resume(struct nvme_dev *dev)
2706 {
2707         int ret;
2708
2709         ret = nvme_dev_start(dev);
2710         if (ret)
2711                 return ret;
2712         if (dev->online_queues < 2) {
2713                 spin_lock(&dev_list_lock);
2714                 dev->reset_workfn = nvme_remove_disks;
2715                 queue_work(nvme_workq, &dev->reset_work);
2716                 spin_unlock(&dev_list_lock);
2717         } else {
2718                 nvme_unfreeze_queues(dev);
2719                 nvme_set_irq_hints(dev);
2720         }
2721         dev->initialized = 1;
2722         return 0;
2723 }
2724
2725 static void nvme_dev_reset(struct nvme_dev *dev)
2726 {
2727         nvme_dev_shutdown(dev);
2728         if (nvme_dev_resume(dev)) {
2729                 dev_warn(&dev->pci_dev->dev, "Device failed to resume\n");
2730                 kref_get(&dev->kref);
2731                 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
2732                                                         dev->instance))) {
2733                         dev_err(&dev->pci_dev->dev,
2734                                 "Failed to start controller remove task\n");
2735                         kref_put(&dev->kref, nvme_free_dev);
2736                 }
2737         }
2738 }
2739
2740 static void nvme_reset_failed_dev(struct work_struct *ws)
2741 {
2742         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2743         nvme_dev_reset(dev);
2744 }
2745
2746 static void nvme_reset_workfn(struct work_struct *work)
2747 {
2748         struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work);
2749         dev->reset_workfn(work);
2750 }
2751
2752 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2753 {
2754         int node, result = -ENOMEM;
2755         struct nvme_dev *dev;
2756
2757         node = dev_to_node(&pdev->dev);
2758         if (node == NUMA_NO_NODE)
2759                 set_dev_node(&pdev->dev, 0);
2760
2761         dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
2762         if (!dev)
2763                 return -ENOMEM;
2764         dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
2765                                                         GFP_KERNEL, node);
2766         if (!dev->entry)
2767                 goto free;
2768         dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
2769                                                         GFP_KERNEL, node);
2770         if (!dev->queues)
2771                 goto free;
2772
2773         INIT_LIST_HEAD(&dev->namespaces);
2774         dev->reset_workfn = nvme_reset_failed_dev;
2775         INIT_WORK(&dev->reset_work, nvme_reset_workfn);
2776         dev->pci_dev = pci_dev_get(pdev);
2777         pci_set_drvdata(pdev, dev);
2778         result = nvme_set_instance(dev);
2779         if (result)
2780                 goto put_pci;
2781
2782         result = nvme_setup_prp_pools(dev);
2783         if (result)
2784                 goto release;
2785
2786         kref_init(&dev->kref);
2787         result = nvme_dev_start(dev);
2788         if (result)
2789                 goto release_pools;
2790
2791         if (dev->online_queues > 1)
2792                 result = nvme_dev_add(dev);
2793         if (result)
2794                 goto shutdown;
2795
2796         scnprintf(dev->name, sizeof(dev->name), "nvme%d", dev->instance);
2797         dev->miscdev.minor = MISC_DYNAMIC_MINOR;
2798         dev->miscdev.parent = &pdev->dev;
2799         dev->miscdev.name = dev->name;
2800         dev->miscdev.fops = &nvme_dev_fops;
2801         result = misc_register(&dev->miscdev);
2802         if (result)
2803                 goto remove;
2804
2805         nvme_set_irq_hints(dev);
2806
2807         dev->initialized = 1;
2808         return 0;
2809
2810  remove:
2811         nvme_dev_remove(dev);
2812         nvme_dev_remove_admin(dev);
2813         nvme_free_namespaces(dev);
2814  shutdown:
2815         nvme_dev_shutdown(dev);
2816  release_pools:
2817         nvme_free_queues(dev, 0);
2818         nvme_release_prp_pools(dev);
2819  release:
2820         nvme_release_instance(dev);
2821  put_pci:
2822         pci_dev_put(dev->pci_dev);
2823  free:
2824         kfree(dev->queues);
2825         kfree(dev->entry);
2826         kfree(dev);
2827         return result;
2828 }
2829
2830 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
2831 {
2832         struct nvme_dev *dev = pci_get_drvdata(pdev);
2833
2834         if (prepare)
2835                 nvme_dev_shutdown(dev);
2836         else
2837                 nvme_dev_resume(dev);
2838 }
2839
2840 static void nvme_shutdown(struct pci_dev *pdev)
2841 {
2842         struct nvme_dev *dev = pci_get_drvdata(pdev);
2843         nvme_dev_shutdown(dev);
2844 }
2845
2846 static void nvme_remove(struct pci_dev *pdev)
2847 {
2848         struct nvme_dev *dev = pci_get_drvdata(pdev);
2849
2850         spin_lock(&dev_list_lock);
2851         list_del_init(&dev->node);
2852         spin_unlock(&dev_list_lock);
2853
2854         pci_set_drvdata(pdev, NULL);
2855         flush_work(&dev->reset_work);
2856         misc_deregister(&dev->miscdev);
2857         nvme_dev_shutdown(dev);
2858         nvme_dev_remove(dev);
2859         nvme_dev_remove_admin(dev);
2860         nvme_free_queues(dev, 0);
2861         nvme_release_prp_pools(dev);
2862         kref_put(&dev->kref, nvme_free_dev);
2863 }
2864
2865 /* These functions are yet to be implemented */
2866 #define nvme_error_detected NULL
2867 #define nvme_dump_registers NULL
2868 #define nvme_link_reset NULL
2869 #define nvme_slot_reset NULL
2870 #define nvme_error_resume NULL
2871
2872 #ifdef CONFIG_PM_SLEEP
2873 static int nvme_suspend(struct device *dev)
2874 {
2875         struct pci_dev *pdev = to_pci_dev(dev);
2876         struct nvme_dev *ndev = pci_get_drvdata(pdev);
2877
2878         nvme_dev_shutdown(ndev);
2879         return 0;
2880 }
2881
2882 static int nvme_resume(struct device *dev)
2883 {
2884         struct pci_dev *pdev = to_pci_dev(dev);
2885         struct nvme_dev *ndev = pci_get_drvdata(pdev);
2886
2887         if (nvme_dev_resume(ndev) && !work_busy(&ndev->reset_work)) {
2888                 ndev->reset_workfn = nvme_reset_failed_dev;
2889                 queue_work(nvme_workq, &ndev->reset_work);
2890         }
2891         return 0;
2892 }
2893 #endif
2894
2895 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
2896
2897 static const struct pci_error_handlers nvme_err_handler = {
2898         .error_detected = nvme_error_detected,
2899         .mmio_enabled   = nvme_dump_registers,
2900         .link_reset     = nvme_link_reset,
2901         .slot_reset     = nvme_slot_reset,
2902         .resume         = nvme_error_resume,
2903         .reset_notify   = nvme_reset_notify,
2904 };
2905
2906 /* Move to pci_ids.h later */
2907 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
2908
2909 static const struct pci_device_id nvme_id_table[] = {
2910         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
2911         { 0, }
2912 };
2913 MODULE_DEVICE_TABLE(pci, nvme_id_table);
2914
2915 static struct pci_driver nvme_driver = {
2916         .name           = "nvme",
2917         .id_table       = nvme_id_table,
2918         .probe          = nvme_probe,
2919         .remove         = nvme_remove,
2920         .shutdown       = nvme_shutdown,
2921         .driver         = {
2922                 .pm     = &nvme_dev_pm_ops,
2923         },
2924         .err_handler    = &nvme_err_handler,
2925 };
2926
2927 static int __init nvme_init(void)
2928 {
2929         int result;
2930
2931         init_waitqueue_head(&nvme_kthread_wait);
2932
2933         nvme_workq = create_singlethread_workqueue("nvme");
2934         if (!nvme_workq)
2935                 return -ENOMEM;
2936
2937         result = register_blkdev(nvme_major, "nvme");
2938         if (result < 0)
2939                 goto kill_workq;
2940         else if (result > 0)
2941                 nvme_major = result;
2942
2943         result = pci_register_driver(&nvme_driver);
2944         if (result)
2945                 goto unregister_blkdev;
2946         return 0;
2947
2948  unregister_blkdev:
2949         unregister_blkdev(nvme_major, "nvme");
2950  kill_workq:
2951         destroy_workqueue(nvme_workq);
2952         return result;
2953 }
2954
2955 static void __exit nvme_exit(void)
2956 {
2957         pci_unregister_driver(&nvme_driver);
2958         unregister_hotcpu_notifier(&nvme_nb);
2959         unregister_blkdev(nvme_major, "nvme");
2960         destroy_workqueue(nvme_workq);
2961         BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
2962         _nvme_check_size();
2963 }
2964
2965 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
2966 MODULE_LICENSE("GPL");
2967 MODULE_VERSION("1.0");
2968 module_init(nvme_init);
2969 module_exit(nvme_exit);