2 * linux/arch/sh/entry.S
4 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka
5 * Copyright (C) 2003 - 2006 Paul Mundt
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
12 #include <linux/sys.h>
13 #include <linux/errno.h>
14 #include <linux/linkage.h>
15 #include <asm/asm-offsets.h>
16 #include <asm/thread_info.h>
17 #include <asm/cpu/mmu_context.h>
18 #include <asm/unistd.h>
21 ! GNU as (as of 2.9.1) changes bf/s into bt/s and bra, when the address
22 ! to be jumped is too far, but it causes illegal slot exception.
25 * entry.S contains the system-call and fault low-level handling routines.
26 * This also contains the timer-interrupt handler, as well as all interrupts
27 * and faults that can result in a task-switch.
29 * NOTE: This code handles signal-recognition, which happens every time
30 * after a timer-interrupt and after each system call.
32 * NOTE: This code uses a convention that instructions in the delay slot
33 * of a transfer-control instruction are indented by an extra space, thus:
35 * jmp @k0 ! control-transfer instruction
36 * ldc k1, ssr ! delay slot
38 * Stack layout in 'ret_from_syscall':
39 * ptrace needs to have all regs on the stack.
40 * if the order here is changed, it needs to be
41 * updated in ptrace.c and ptrace.h
55 #if defined(CONFIG_KGDB_NMI)
56 NMI_VEC = 0x1c0 ! Must catch early for debounce
59 /* Offsets to the stack */
60 OFF_R0 = 0 /* Return value. New ABI also arg4 */
61 OFF_R1 = 4 /* New ABI: arg5 */
62 OFF_R2 = 8 /* New ABI: arg6 */
63 OFF_R3 = 12 /* New ABI: syscall_nr */
64 OFF_R4 = 16 /* New ABI: arg0 */
65 OFF_R5 = 20 /* New ABI: arg1 */
66 OFF_R6 = 24 /* New ABI: arg2 */
67 OFF_R7 = 28 /* New ABI: arg3 */
80 #define g_imask r6 /* r6_bank1 */
81 #define k_g_imask r6_bank /* r6_bank1 */
82 #define current r7 /* r7_bank1 */
85 * Kernel mode register usage:
88 * k2 scratch (Exception code)
89 * k3 scratch (Return address)
92 * k6 Global Interrupt Mask (0--15 << 4)
93 * k7 CURRENT_THREAD_INFO (pointer to current thread info)
97 ! TLB Miss / Initial Page write exception handling
99 ! TLB hits, but the access violate the protection.
100 ! It can be valid access, such as stack grow and/or C-O-W.
103 ! Find the pmd/pte entry and loadtlb
104 ! If it's not found, cause address error (SEGV)
106 ! Although this could be written in assembly language (and it'd be faster),
107 ! this first version depends *much* on C implementation.
116 mov.l __INV_IMASK, r11; \
119 stc k_g_imask, r11; \
123 #if defined(CONFIG_PREEMPT)
124 # define preempt_stop() CLI()
126 # define preempt_stop()
127 # define resume_kernel restore_all
130 #if defined(CONFIG_MMU)
137 ENTRY(tlb_miss_store)
142 ENTRY(initial_page_write)
147 ENTRY(tlb_protection_violation_load)
152 ENTRY(tlb_protection_violation_store)
180 2: .long __do_page_fault
181 3: .long do_page_fault
184 ENTRY(address_error_load)
186 mov #0,r5 ! writeaccess = 0
189 ENTRY(address_error_store)
191 mov #1,r5 ! writeaccess = 1
196 mov.l @r0, r6 ! address
203 2: .long do_address_error
204 #endif /* CONFIG_MMU */
206 #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
207 ! Handle kernel debug if either kgdb (SW) or gdb-stub (FW) is present.
208 ! If both are configured, handle the debug traps (breakpoints) in SW,
209 ! but still allow BIOS traps to FW.
213 #if defined(CONFIG_SH_STANDARD_BIOS) && defined(CONFIG_SH_KGDB)
214 /* Force BIOS call to FW (debug_trap put TRA in r8) */
219 #endif /* CONFIG_SH_STANDARD_BIOS && CONFIG_SH_KGDB */
222 #if defined(CONFIG_SH_KGDB)
223 /* Jump to kgdb, pass stacked regs as arg */
229 3: .long kgdb_handle_exception
230 #endif /* CONFIG_SH_KGDB */
232 #if defined(CONFIG_SH_STANDARD_BIOS)
233 /* Unwind the stack and jmp to the debug entry */
244 mov.l 1f, r9 ! BL =1, RB=1, IMASK=0x0F
246 ldc r8, sr ! here, change the register bank
269 2: .long gdb_vbr_vector
270 #endif /* CONFIG_SH_STANDARD_BIOS */
272 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
277 #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
279 mov.l @(r0,r15), r0 ! get status register
281 shll r0 ! kernel space?
284 mov.l @r15, r0 ! Restore R0 value
290 ENTRY(exception_error)
299 1: .long break_point_trap_software
300 2: .long do_exception_error
308 mov.l @(r0,r15), r0 ! get status register
310 shll r0 ! kernel space?
311 bt/s resume_kernel ! Yes, it's from kernel, go back soon
314 #ifdef CONFIG_PREEMPT
318 mov.l @(TI_PRE_COUNT,r8), r0 ! current_thread_info->preempt_count
322 mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags
323 tst #_TIF_NEED_RESCHED, r0 ! need_resched set?
327 mov.l @(r0,r15), r0 ! get status register
328 and #0xf0, r0 ! interrupts off (exception path)?
333 mov.l r0, @(TI_PRE_COUNT,r8)
340 mov.l r0, @(TI_PRE_COUNT,r8)
350 1: .long PREEMPT_ACTIVE
354 ENTRY(resume_userspace)
355 ! r8: current_thread_info
357 mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags
358 tst #_TIF_WORK_MASK, r0
360 tst #_TIF_NEED_RESCHED, r0
364 ! r0: current_thread_info->flags
365 ! r8: current_thread_info
366 ! t: result of "tst #_TIF_NEED_RESCHED, r0"
368 tst #(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), r0
372 mov r12, r5 ! set arg1(save_r0)
379 #ifndef CONFIG_PREEMPT
381 mov.l @(OFF_SP,r15), r0 ! get user space stack pointer
388 ! SP >= 0xc0000000 : gUSA mark
389 mov.l @(r0,r15), r2 ! get user space PC (program counter)
390 mov.l @(OFF_R0,r15), r3 ! end point
391 cmp/hs r3, r2 ! r2 >= r3?
393 add r3, r1 ! rewind point #2
394 mov.l r1, @(r0,r15) ! reset PC to rewind point #2
403 mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags
404 tst #_TIF_WORK_MASK, r0
407 tst #_TIF_NEED_RESCHED, r0
411 2: .long do_notify_resume
415 ! r0: current_thread_info->flags
416 ! r8: current_thread_info
417 tst #_TIF_SYSCALL_TRACE, r0
419 tst #_TIF_NEED_RESCHED, r0
421 ! XXX setup arguments...
422 mov.l 4f, r0 ! do_syscall_trace
431 ! XXX setup arguments...
432 mov.l 4f, r11 ! Call do_syscall_trace which notifies
433 jsr @r11 ! superior (will chomp R[0-7])
435 ! Reload R0-R4 from kernel stack, where the
436 ! parent may have modified them using
437 ! ptrace(POKEUSR). (Note that R0-R2 are
438 ! used by the system call handler directly
439 ! from the kernel stack anyway, so don't need
440 ! to be reloaded here.) This allows the parent
441 ! to rewrite system calls and args on the fly.
442 mov.l @(OFF_R4,r15), r4 ! arg0
443 mov.l @(OFF_R5,r15), r5
444 mov.l @(OFF_R6,r15), r6
445 mov.l @(OFF_R7,r15), r7 ! arg3
446 mov.l @(OFF_R3,r15), r3 ! syscall_nr
447 ! Arrange for do_syscall_trace to be called
448 ! again as the system call returns.
449 mov.l 2f, r10 ! Number of syscalls
454 mov.l r0, @(OFF_R0,r15) ! Return value
460 * Arguments #0 to #3: R4--R7
461 * Arguments #4 to #6: R0, R1, R2
462 * TRA: (number of arguments + 0x10) x 4
464 * This code also handles delegating other traps to the BIOS/gdb stub
470 * 0x0-0xf old syscall ABI
471 * 0x10-0x1f new syscall ABI
472 * 0x20-0xff delegated through debug_trap to BIOS/gdb stub.
474 * Note: When we're first called, the TRA value must be shifted
475 * right 2 bits in order to get the value that was used as the "trapa"
488 1: .long schedule_tail
492 mov.l @r9, r8 ! Read from TRA (Trap Address) Register
494 ! Is the trap argument >= 0x20? (TRA will be >= 0x80)
501 mov.l r8, @r9 ! set TRA value to tra
503 ! Call the system call handler through the table.
504 ! First check for bad syscall number
506 mov.l 2f, r8 ! Number of syscalls
508 bf/s good_system_call
510 syscall_badsys: ! Bad syscall number
513 mov.l r0, @(OFF_R0,r15) ! Return value
519 good_system_call: ! Good syscall number
520 mov.l @(TI_FLAGS,r8), r8
521 mov #_TIF_SYSCALL_TRACE, r10
523 bf syscall_trace_entry
527 mov.l 3f, r8 ! Load the address of sys_call_table
530 jsr @r8 ! jump to specific syscall handler
532 mov.l @(OFF_R0,r15), r12 ! save r0
533 mov.l r0, @(OFF_R0,r15) ! save the return value
539 mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags
540 tst #_TIF_ALLWORK_MASK, r0
554 or r9, r8 ! BL =1, RB=1
555 ldc r8, sr ! here, change the register bank
564 mov.l @r15+, k4 ! original stack pointer
567 mov.l @r15+, k3 ! original SR
571 add #4, r15 ! Skip syscall number
574 mov.l @r15+, k0 ! DSP mode marker
576 cmp/eq k0, k1 ! Do we have a DSP stack frame?
579 stc sr, k0 ! Enable CPU DSP mode
580 or k1, k0 ! (within kernel it may be disabled)
582 mov r2, k0 ! Backup r2
584 ! Restore DSP registers from stack
603 mov k0, r2 ! Restore r2
607 ! Calculate new SR value
608 mov k3, k2 ! original SR value
610 and k1, k2 ! Mask orignal SR value
612 mov k3, k0 ! Calculate IMASK-bits
620 6: or k0, k2 ! Set the IMASK-bits
623 #if defined(CONFIG_KGDB_NMI)
629 mov.l @r15+, k2 ! restore EXPEVT
637 3: .long sys_call_table
638 4: .long do_syscall_trace
639 5: .long 0x00001000 ! DSP
643 .long 0xffffff0f ! ~(IMASK)
645 ! Exception Vector Base
647 ! Should be aligned page boundary.
661 2: .long ret_from_exception
675 #if defined(CONFIG_KGDB_NMI)
676 ! Debounce (filter nested NMI)
690 #endif /* defined(CONFIG_KGDB_NMI) */
692 mov #-1, k2 ! interrupt exception marker
697 3: .long ret_from_irq
698 4: .long ret_from_exception
703 ENTRY(handle_exception)
704 ! Using k0, k1 for scratch registers (r0_bank1, r1_bank),
705 ! save all registers onto stack.
707 stc ssr, k0 ! Is it from kernel space?
708 shll k0 ! Check MD bit (bit30) by shifting it into...
709 shll k0 ! ...the T bit
710 bt/s 1f ! It's a kernel to kernel transition.
711 mov r15, k0 ! save original stack to k0
712 /* User space to kernel */
713 mov #(THREAD_SIZE >> 8), k1
714 shll8 k1 ! k1 := THREAD_SIZE
716 mov k1, r15 ! change to kernel stack
721 mov.l r2, @-r15 ! Save r2, we need another reg
724 tst r2, k4 ! Check if in DSP mode
725 mov.l @r15+, r2 ! Restore r2 now
727 mov #0, k4 ! Set marker for no stack frame
729 mov r2, k4 ! Backup r2 (in k4) for later
731 ! Save DSP registers on stack
742 ! GAS is broken, does not generate correct "movs.l Ds,@-As" instr.
744 ! FIXME: Make sure that this is still the case with newer toolchains,
745 ! as we're not at all interested in supporting ancient toolchains at
746 ! this point. -- PFM.
749 .word 0xf653 ! movs.l a1, @-r2
750 .word 0xf6f3 ! movs.l a0g, @-r2
751 .word 0xf6d3 ! movs.l a1g, @-r2
752 .word 0xf6c3 ! movs.l m0, @-r2
753 .word 0xf6e3 ! movs.l m1, @-r2
756 mov k4, r2 ! Restore r2
757 mov.l 1f, k4 ! Force DSP stack frame
759 mov.l k4, @-r15 ! Push DSP mode marker onto stack
761 ! Save the user registers on the stack.
762 mov.l k2, @-r15 ! EXPEVT
765 mov.l k4, @-r15 ! set TRA (default: -1)
774 lds k3, pr ! Set the return address to pr
776 mov.l k0, @-r15 ! save orignal stack
785 stc sr, r8 ! Back to normal register bank, and
786 or k1, r8 ! Block all interrupts
789 ldc r8, sr ! ...changed here.
801 * This gets a bit tricky.. in the INTEVT case we don't want to use
802 * the VBR offset as a destination in the jump call table, since all
803 * of the destinations are the same. In this case, (interrupt) sets
804 * a marker in r2 (now r2_bank since SR.RB changed), which we check
805 * to determine the exception type. For all other exceptions, we
806 * forcibly read EXPEVT from memory and fix up the jump address, in
807 * the interrupt exception case we jump to do_IRQ() and defer the
808 * INTEVT read until there. As a bonus, we can also clean up the SR.RB
809 * checks that do_IRQ() was doing..
813 bf interrupt_exception
825 1: .long 0x00001000 ! DSP=1
826 2: .long 0x000080f0 ! FD=1, IMASK=15
827 3: .long 0xcfffffff ! RB=0, BL=0
828 4: .long exception_handling_table
841 ENTRY(exception_none)