Pull button into test branch
[linux-drm-fsl-dcu.git] / arch / sh / kernel / cpu / sh2 / probe.c
1 /*
2  * arch/sh/kernel/cpu/sh2/probe.c
3  *
4  * CPU Subtype Probing for SH-2.
5  *
6  * Copyright (C) 2002 Paul Mundt
7  *
8  * This file is subject to the terms and conditions of the GNU General Public
9  * License.  See the file "COPYING" in the main directory of this archive
10  * for more details.
11  */
12
13
14 #include <linux/init.h>
15 #include <asm/processor.h>
16 #include <asm/cache.h>
17
18 int __init detect_cpu_and_cache_system(void)
19 {
20 #if defined(CONFIG_CPU_SUBTYPE_SH7604)
21         cpu_data->type                  = CPU_SH7604;
22         cpu_data->dcache.ways           = 4;
23         cpu_data->dcache.way_incr       = (1<<10);
24         cpu_data->dcache.sets           = 64;
25         cpu_data->dcache.entry_shift    = 4;
26         cpu_data->dcache.linesz         = L1_CACHE_BYTES;
27         cpu_data->dcache.flags          = 0;
28 #elif defined(CONFIG_CPU_SUBTYPE_SH7619)
29         cpu_data->type                  = CPU_SH7619;
30         cpu_data->dcache.ways           = 4;
31         cpu_data->dcache.way_incr       = (1<<12);
32         cpu_data->dcache.sets           = 256;
33         cpu_data->dcache.entry_shift    = 4;
34         cpu_data->dcache.linesz         = L1_CACHE_BYTES;
35         cpu_data->dcache.flags          = 0;
36 #endif
37         /*
38          * SH-2 doesn't have separate caches
39          */
40         cpu_data->dcache.flags |= SH_CACHE_COMBINED;
41         cpu_data->icache = cpu_data->dcache;
42
43         return 0;
44 }
45