2 * linux/arch/sh/boards/se/7780/irq.c
4 * Copyright (C) 2006,2007 Nobuhiro Iwamatsu
6 * Hitachi UL SolutionEngine 7780 Support.
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
12 #include <linux/init.h>
13 #include <linux/irq.h>
14 #include <linux/interrupt.h>
17 #include <asm/se7780.h>
19 #define INTC_INTMSK0 0xFFD00044
20 #define INTC_INTMSKCLR0 0xFFD00064
22 static void disable_se7780_irq(unsigned int irq)
24 struct intc2_data *p = get_irq_chip_data(irq);
25 ctrl_outl(1 << p->msk_shift, INTC_INTMSK0 + p->msk_offset);
28 static void enable_se7780_irq(unsigned int irq)
30 struct intc2_data *p = get_irq_chip_data(irq);
31 ctrl_outl(1 << p->msk_shift, INTC_INTMSKCLR0 + p->msk_offset);
34 static struct irq_chip se7780_irq_chip __read_mostly = {
36 .mask = disable_se7780_irq,
37 .unmask = enable_se7780_irq,
38 .mask_ack = disable_se7780_irq,
41 static struct intc2_data intc2_irq_table[] = {
42 { 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT1 */
43 { 4, 0, 30, 0, 30, 3 }, /* daughter board EXTINT2 */
44 { 6, 0, 29, 0, 29, 3 }, /* daughter board EXTINT3 */
45 { 8, 0, 28, 0, 28, 3 }, /* SMC 91C111 (LAN) */
46 { 10, 0, 27, 0, 27, 3 }, /* daughter board EXTINT4 */
47 { 4, 0, 30, 0, 30, 3 }, /* daughter board EXTINT5 */
48 { 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT6 */
49 { 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT7 */
50 { 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT8 */
51 { 0 , 0, 24, 0, 24, 3 }, /* SM501 */
55 * Initialize IRQ setting
57 void __init init_se7780_IRQ(void)
61 /* enable all interrupt at FPGA */
62 ctrl_outw(0, FPGA_INTMSK1);
63 /* mask SM501 interrupt */
64 ctrl_outw((ctrl_inw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1);
65 /* enable all interrupt at FPGA */
66 ctrl_outw(0, FPGA_INTMSK2);
68 /* set FPGA INTSEL register */
70 ctrl_outw( ((IRQPIN_SM501 << IRQPOS_SM501) |
71 (IRQPIN_SMC91CX << IRQPOS_SMC91CX)), FPGA_INTSEL1);
74 ctrl_outw(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) |
75 (IRQPIN_EXTINT3 << IRQPOS_EXTINT3) |
76 (IRQPIN_EXTINT2 << IRQPOS_EXTINT2) |
77 (IRQPIN_EXTINT1 << IRQPOS_EXTINT1)), FPGA_INTSEL2);
80 ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);
82 for (i = 0; i < ARRAY_SIZE(intc2_irq_table); i++) {
83 disable_irq_nosync(intc2_irq_table[i].irq);
84 set_irq_chip_and_handler_name( intc2_irq_table[i].irq, &se7780_irq_chip,
85 handle_level_irq, "level");
86 set_irq_chip_data( intc2_irq_table[i].irq, &intc2_irq_table[i] );
87 disable_se7780_irq(intc2_irq_table[i].irq);