arch/powerpc/platforms/pseries/smp.c

   1 /*
   2  * SMP support for pSeries machines.
   3  *
   4  * Dave Engebretsen, Peter Bergner, and
   5  * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
   6  *
   7  * Plus various changes from other IBM teams...
   8  *
   9  *      This program is free software; you can redistribute it and/or
  10  *      modify it under the terms of the GNU General Public License
  11  *      as published by the Free Software Foundation; either version
  12  *      2 of the License, or (at your option) any later version.
  13  */
  14
  15 #undef DEBUG
  16
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19 #include <linux/sched.h>
  20 #include <linux/smp.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/delay.h>
  23 #include <linux/init.h>
  24 #include <linux/spinlock.h>
  25 #include <linux/cache.h>
  26 #include <linux/err.h>
  27 #include <linux/sysdev.h>
  28 #include <linux/cpu.h>
  29
  30 #include <asm/ptrace.h>
  31 #include <asm/atomic.h>
  32 #include <asm/irq.h>
  33 #include <asm/page.h>
  34 #include <asm/pgtable.h>
  35 #include <asm/io.h>
  36 #include <asm/prom.h>
  37 #include <asm/smp.h>
  38 #include <asm/paca.h>
  39 #include <asm/time.h>
  40 #include <asm/machdep.h>
  41 #include "xics.h"
  42 #include <asm/cputable.h>
  43 #include <asm/firmware.h>
  44 #include <asm/system.h>
  45 #include <asm/rtas.h>
  46 #include <asm/pSeries_reconfig.h>
  47 #include <asm/mpic.h>
  48 #include <asm/vdso_datapage.h>
  49
  50 #include "plpar_wrappers.h"
  51
  52 #ifdef DEBUG
  53 #include <asm/udbg.h>
  54 #define DBG(fmt...) udbg_printf(fmt)
  55 #else
  56 #define DBG(fmt...)
  57 #endif
  58
  59 /*
  60  * The primary thread of each non-boot processor is recorded here before
  61  * smp init.
  62  */
  63 static cpumask_t of_spin_map;
  64
  65 extern void generic_secondary_smp_init(unsigned long);
  66
  67 /**
  68  * smp_startup_cpu() - start the given cpu
  69  *
  70  * At boot time, there is nothing to do for primary threads which were
  71  * started from Open Firmware.  For anything else, call RTAS with the
  72  * appropriate start location.
  73  *
  74  * Returns:
  75  *      0       - failure
  76  *      1       - success
  77  */
  78 static inline int __devinit smp_startup_cpu(unsigned int lcpu)
  79 {
  80         int status;
  81         unsigned long start_here = __pa((u32)*((unsigned long *)
  82                                                generic_secondary_smp_init));
  83         unsigned int pcpu;
  84         int start_cpu;
  85
  86         if (cpu_isset(lcpu, of_spin_map))
  87                 /* Already started by OF and sitting in spin loop */
  88                 return 1;
  89
  90         pcpu = get_hard_smp_processor_id(lcpu);
  91
  92         /* Fixup atomic count: it exited inside IRQ handler. */
  93         task_thread_info(paca[lcpu].__current)->preempt_count   = 0;
  94
  95         /*
  96          * If the RTAS start-cpu token does not exist then presume the
  97          * cpu is already spinning.
  98          */
  99         start_cpu = rtas_token("start-cpu");
 100         if (start_cpu == RTAS_UNKNOWN_SERVICE)
 101                 return 1;
 102
 103         status = rtas_call(start_cpu, 3, 1, NULL, pcpu, start_here, pcpu);
 104         if (status != 0) {
 105                 printk(KERN_ERR "start-cpu failed: %i\n", status);
 106                 return 0;
 107         }
 108
 109         return 1;
 110 }
 111
 112 #ifdef CONFIG_XICS
 113 static inline void smp_xics_do_message(int cpu, int msg)
 114 {
 115         set_bit(msg, &xics_ipi_message[cpu].value);
 116         mb();
 117         xics_cause_IPI(cpu);
 118 }
 119
 120 static void smp_xics_message_pass(int target, int msg)
 121 {
 122         unsigned int i;
 123
 124         if (target < NR_CPUS) {
 125                 smp_xics_do_message(target, msg);
 126         } else {
 127                 for_each_online_cpu(i) {
 128                         if (target == MSG_ALL_BUT_SELF
 129                             && i == smp_processor_id())
 130                                 continue;
 131                         smp_xics_do_message(i, msg);
 132                 }
 133         }
 134 }
 135
 136 static int __init smp_xics_probe(void)
 137 {
 138         xics_request_IPIs();
 139
 140         return cpus_weight(cpu_possible_map);
 141 }
 142
 143 static void __devinit smp_xics_setup_cpu(int cpu)
 144 {
 145         if (cpu != boot_cpuid)
 146                 xics_setup_cpu();
 147
 148         if (firmware_has_feature(FW_FEATURE_SPLPAR))
 149                 vpa_init(cpu);
 150
 151         cpu_clear(cpu, of_spin_map);
 152
 153 }
 154 #endif /* CONFIG_XICS */
 155
 156 static DEFINE_SPINLOCK(timebase_lock);
 157 static unsigned long timebase = 0;
 158
 159 static void __devinit pSeries_give_timebase(void)
 160 {
 161         spin_lock(&timebase_lock);
 162         rtas_call(rtas_token("freeze-time-base"), 0, 1, NULL);
 163         timebase = get_tb();
 164         spin_unlock(&timebase_lock);
 165
 166         while (timebase)
 167                 barrier();
 168         rtas_call(rtas_token("thaw-time-base"), 0, 1, NULL);
 169 }
 170
 171 static void __devinit pSeries_take_timebase(void)
 172 {
 173         while (!timebase)
 174                 barrier();
 175         spin_lock(&timebase_lock);
 176         set_tb(timebase >> 32, timebase & 0xffffffff);
 177         timebase = 0;
 178         spin_unlock(&timebase_lock);
 179 }
 180
 181 static void __devinit smp_pSeries_kick_cpu(int nr)
 182 {
 183         BUG_ON(nr < 0 || nr >= NR_CPUS);
 184
 185         if (!smp_startup_cpu(nr))
 186                 return;
 187
 188         /*
 189          * The processor is currently spinning, waiting for the
 190          * cpu_start field to become non-zero After we set cpu_start,
 191          * the processor will continue on to secondary_start
 192          */
 193         paca[nr].cpu_start = 1;
 194 }
 195
 196 static int smp_pSeries_cpu_bootable(unsigned int nr)
 197 {
 198         /* Special case - we inhibit secondary thread startup
 199          * during boot if the user requests it.  Odd-numbered
 200          * cpus are assumed to be secondary threads.
 201          */
 202         if (system_state < SYSTEM_RUNNING &&
 203             cpu_has_feature(CPU_FTR_SMT) &&
 204             !smt_enabled_at_boot && nr % 2 != 0)
 205                 return 0;
 206
 207         return 1;
 208 }
 209 #ifdef CONFIG_MPIC
 210 static struct smp_ops_t pSeries_mpic_smp_ops = {
 211         .message_pass   = smp_mpic_message_pass,
 212         .probe          = smp_mpic_probe,
 213         .kick_cpu       = smp_pSeries_kick_cpu,
 214         .setup_cpu      = smp_mpic_setup_cpu,
 215 };
 216 #endif
 217 #ifdef CONFIG_XICS
 218 static struct smp_ops_t pSeries_xics_smp_ops = {
 219         .message_pass   = smp_xics_message_pass,
 220         .probe          = smp_xics_probe,
 221         .kick_cpu       = smp_pSeries_kick_cpu,
 222         .setup_cpu      = smp_xics_setup_cpu,
 223         .cpu_bootable   = smp_pSeries_cpu_bootable,
 224 };
 225 #endif
 226
 227 /* This is called very early */
 228 static void __init smp_init_pseries(void)
 229 {
 230         int i;
 231
 232         DBG(" -> smp_init_pSeries()\n");
 233
 234         /* Mark threads which are still spinning in hold loops. */
 235         if (cpu_has_feature(CPU_FTR_SMT)) {
 236                 for_each_present_cpu(i) {
 237                         if (i % 2 == 0)
 238                                 /*
 239                                  * Even-numbered logical cpus correspond to
 240                                  * primary threads.
 241                                  */
 242                                 cpu_set(i, of_spin_map);
 243                 }
 244         } else {
 245                 of_spin_map = cpu_present_map;
 246         }
 247
 248         cpu_clear(boot_cpuid, of_spin_map);
 249
 250         /* Non-lpar has additional take/give timebase */
 251         if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
 252                 smp_ops->give_timebase = pSeries_give_timebase;
 253                 smp_ops->take_timebase = pSeries_take_timebase;
 254         }
 255
 256         DBG(" <- smp_init_pSeries()\n");
 257 }
 258
 259 #ifdef CONFIG_MPIC
 260 void __init smp_init_pseries_mpic(void)
 261 {
 262         smp_ops = &pSeries_mpic_smp_ops;
 263
 264         smp_init_pseries();
 265 }
 266 #endif
 267
 268 void __init smp_init_pseries_xics(void)
 269 {
 270         smp_ops = &pSeries_xics_smp_ops;
 271
 272         smp_init_pseries();
 273 }