arch/powerpc/boot/dts/mpc834x_mds.dts

   1 /*
   2  * MPC8349E MDS Device Tree Source
   3  *
   4  * Copyright 2005, 2006 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 / {
  13         model = "MPC8349EMDS";
  14         compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
  15         #address-cells = <1>;
  16         #size-cells = <1>;
  17
  18         cpus {
  19                 #address-cells = <1>;
  20                 #size-cells = <0>;
  21
  22                 PowerPC,8349@0 {
  23                         device_type = "cpu";
  24                         reg = <0>;
  25                         d-cache-line-size = <20>;       // 32 bytes
  26                         i-cache-line-size = <20>;       // 32 bytes
  27                         d-cache-size = <8000>;          // L1, 32K
  28                         i-cache-size = <8000>;          // L1, 32K
  29                         timebase-frequency = <0>;       // from bootloader
  30                         bus-frequency = <0>;            // from bootloader
  31                         clock-frequency = <0>;          // from bootloader
  32                         32-bit;
  33                 };
  34         };
  35
  36         memory {
  37                 device_type = "memory";
  38                 reg = <00000000 10000000>;      // 256MB at 0
  39         };
  40
  41         bcsr@e2400000 {
  42                 device_type = "board-control";
  43                 reg = <e2400000 8000>;
  44         };
  45
  46         soc8349@e0000000 {
  47                 #address-cells = <1>;
  48                 #size-cells = <1>;
  49                 #interrupt-cells = <2>;
  50                 device_type = "soc";
  51                 ranges = <0 e0000000 00100000>;
  52                 reg = <e0000000 00000200>;
  53                 bus-frequency = <0>;
  54
  55                 wdt@200 {
  56                         device_type = "watchdog";
  57                         compatible = "mpc83xx_wdt";
  58                         reg = <200 100>;
  59                 };
  60
  61                 i2c@3000 {
  62                         device_type = "i2c";
  63                         compatible = "fsl-i2c";
  64                         reg = <3000 100>;
  65                         interrupts = <e 8>;
  66                         interrupt-parent = < &ipic >;
  67                         dfsrr;
  68                 };
  69
  70                 i2c@3100 {
  71                         device_type = "i2c";
  72                         compatible = "fsl-i2c";
  73                         reg = <3100 100>;
  74                         interrupts = <f 8>;
  75                         interrupt-parent = < &ipic >;
  76                         dfsrr;
  77                 };
  78
  79                 spi@7000 {
  80                         device_type = "spi";
  81                         compatible = "mpc83xx_spi";
  82                         reg = <7000 1000>;
  83                         interrupts = <10 8>;
  84                         interrupt-parent = < &ipic >;
  85                         mode = <0>;
  86                 };
  87
  88                 /* phy type (ULPI or SERIAL) are only types supportted for MPH */
  89                 /* port = 0 or 1 */
  90                 usb@22000 {
  91                         device_type = "usb";
  92                         compatible = "fsl-usb2-mph";
  93                         reg = <22000 1000>;
  94                         #address-cells = <1>;
  95                         #size-cells = <0>;
  96                         interrupt-parent = < &ipic >;
  97                         interrupts = <27 8>;
  98                         phy_type = "ulpi";
  99                         port1;
 100                 };
 101                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
 102                 usb@23000 {
 103                         device_type = "usb";
 104                         compatible = "fsl-usb2-dr";
 105                         reg = <23000 1000>;
 106                         #address-cells = <1>;
 107                         #size-cells = <0>;
 108                         interrupt-parent = < &ipic >;
 109                         interrupts = <26 8>;
 110                         dr_mode = "otg";
 111                         phy_type = "ulpi";
 112                 };
 113
 114                 mdio@24520 {
 115                         device_type = "mdio";
 116                         compatible = "gianfar";
 117                         reg = <24520 20>;
 118                         #address-cells = <1>;
 119                         #size-cells = <0>;
 120                         phy0: ethernet-phy@0 {
 121                                 interrupt-parent = < &ipic >;
 122                                 interrupts = <11 8>;
 123                                 reg = <0>;
 124                                 device_type = "ethernet-phy";
 125                         };
 126                         phy1: ethernet-phy@1 {
 127                                 interrupt-parent = < &ipic >;
 128                                 interrupts = <12 8>;
 129                                 reg = <1>;
 130                                 device_type = "ethernet-phy";
 131                         };
 132                 };
 133
 134                 ethernet@24000 {
 135                         device_type = "network";
 136                         model = "TSEC";
 137                         compatible = "gianfar";
 138                         reg = <24000 1000>;
 139                         address = [ 00 00 00 00 00 00 ];
 140                         local-mac-address = [ 00 00 00 00 00 00 ];
 141                         interrupts = <20 8 21 8 22 8>;
 142                         interrupt-parent = < &ipic >;
 143                         phy-handle = < &phy0 >;
 144                 };
 145
 146                 ethernet@25000 {
 147                         #address-cells = <1>;
 148                         #size-cells = <0>;
 149                         device_type = "network";
 150                         model = "TSEC";
 151                         compatible = "gianfar";
 152                         reg = <25000 1000>;
 153                         address = [ 00 00 00 00 00 00 ];
 154                         local-mac-address = [ 00 00 00 00 00 00 ];
 155                         interrupts = <23 8 24 8 25 8>;
 156                         interrupt-parent = < &ipic >;
 157                         phy-handle = < &phy1 >;
 158                 };
 159
 160                 serial@4500 {
 161                         device_type = "serial";
 162                         compatible = "ns16550";
 163                         reg = <4500 100>;
 164                         clock-frequency = <0>;
 165                         interrupts = <9 8>;
 166                         interrupt-parent = < &ipic >;
 167                 };
 168
 169                 serial@4600 {
 170                         device_type = "serial";
 171                         compatible = "ns16550";
 172                         reg = <4600 100>;
 173                         clock-frequency = <0>;
 174                         interrupts = <a 8>;
 175                         interrupt-parent = < &ipic >;
 176                 };
 177
 178                 pci@8500 {
 179                         interrupt-map-mask = <f800 0 0 7>;
 180                         interrupt-map = <
 181
 182                                         /* IDSEL 0x11 */
 183                                          8800 0 0 1 &ipic 14 8
 184                                          8800 0 0 2 &ipic 15 8
 185                                          8800 0 0 3 &ipic 16 8
 186                                          8800 0 0 4 &ipic 17 8
 187
 188                                         /* IDSEL 0x12 */
 189                                          9000 0 0 1 &ipic 16 8
 190                                          9000 0 0 2 &ipic 17 8
 191                                          9000 0 0 3 &ipic 14 8
 192                                          9000 0 0 4 &ipic 15 8
 193
 194                                         /* IDSEL 0x13 */
 195                                          9800 0 0 1 &ipic 17 8
 196                                          9800 0 0 2 &ipic 14 8
 197                                          9800 0 0 3 &ipic 15 8
 198                                          9800 0 0 4 &ipic 16 8
 199
 200                                         /* IDSEL 0x15 */
 201                                          a800 0 0 1 &ipic 14 8
 202                                          a800 0 0 2 &ipic 15 8
 203                                          a800 0 0 3 &ipic 16 8
 204                                          a800 0 0 4 &ipic 17 8
 205
 206                                         /* IDSEL 0x16 */
 207                                          b000 0 0 1 &ipic 17 8
 208                                          b000 0 0 2 &ipic 14 8
 209                                          b000 0 0 3 &ipic 15 8
 210                                          b000 0 0 4 &ipic 16 8
 211
 212                                         /* IDSEL 0x17 */
 213                                          b800 0 0 1 &ipic 16 8
 214                                          b800 0 0 2 &ipic 17 8
 215                                          b800 0 0 3 &ipic 14 8
 216                                          b800 0 0 4 &ipic 15 8
 217
 218                                         /* IDSEL 0x18 */
 219                                          c000 0 0 1 &ipic 15 8
 220                                          c000 0 0 2 &ipic 16 8
 221                                          c000 0 0 3 &ipic 17 8
 222                                          c000 0 0 4 &ipic 14 8>;
 223                         interrupt-parent = < &ipic >;
 224                         interrupts = <42 8>;
 225                         bus-range = <0 0>;
 226                         ranges = <02000000 0 a0000000 a0000000 0 10000000
 227                                   42000000 0 80000000 80000000 0 10000000
 228                                   01000000 0 00000000 e2000000 0 00100000>;
 229                         clock-frequency = <3f940aa>;
 230                         #interrupt-cells = <1>;
 231                         #size-cells = <2>;
 232                         #address-cells = <3>;
 233                         reg = <8500 100>;
 234                         compatible = "83xx";
 235                         device_type = "pci";
 236                 };
 237
 238                 pci@8600 {
 239                         interrupt-map-mask = <f800 0 0 7>;
 240                         interrupt-map = <
 241
 242                                         /* IDSEL 0x11 */
 243                                          8800 0 0 1 &ipic 14 8
 244                                          8800 0 0 2 &ipic 15 8
 245                                          8800 0 0 3 &ipic 16 8
 246                                          8800 0 0 4 &ipic 17 8
 247
 248                                         /* IDSEL 0x12 */
 249                                          9000 0 0 1 &ipic 16 8
 250                                          9000 0 0 2 &ipic 17 8
 251                                          9000 0 0 3 &ipic 14 8
 252                                          9000 0 0 4 &ipic 15 8
 253
 254                                         /* IDSEL 0x13 */
 255                                          9800 0 0 1 &ipic 17 8
 256                                          9800 0 0 2 &ipic 14 8
 257                                          9800 0 0 3 &ipic 15 8
 258                                          9800 0 0 4 &ipic 16 8
 259
 260                                         /* IDSEL 0x15 */
 261                                          a800 0 0 1 &ipic 14 8
 262                                          a800 0 0 2 &ipic 15 8
 263                                          a800 0 0 3 &ipic 16 8
 264                                          a800 0 0 4 &ipic 17 8
 265
 266                                         /* IDSEL 0x16 */
 267                                          b000 0 0 1 &ipic 17 8
 268                                          b000 0 0 2 &ipic 14 8
 269                                          b000 0 0 3 &ipic 15 8
 270                                          b000 0 0 4 &ipic 16 8
 271
 272                                         /* IDSEL 0x17 */
 273                                          b800 0 0 1 &ipic 16 8
 274                                          b800 0 0 2 &ipic 17 8
 275                                          b800 0 0 3 &ipic 14 8
 276                                          b800 0 0 4 &ipic 15 8
 277
 278                                         /* IDSEL 0x18 */
 279                                          c000 0 0 1 &ipic 15 8
 280                                          c000 0 0 2 &ipic 16 8
 281                                          c000 0 0 3 &ipic 17 8
 282                                          c000 0 0 4 &ipic 14 8>;
 283                         interrupt-parent = < &ipic >;
 284                         interrupts = <42 8>;
 285                         bus-range = <0 0>;
 286                         ranges = <02000000 0 b0000000 b0000000 0 10000000
 287                                   42000000 0 90000000 90000000 0 10000000
 288                                   01000000 0 00000000 e2100000 0 00100000>;
 289                         clock-frequency = <3f940aa>;
 290                         #interrupt-cells = <1>;
 291                         #size-cells = <2>;
 292                         #address-cells = <3>;
 293                         reg = <8600 100>;
 294                         compatible = "83xx";
 295                         device_type = "pci";
 296                 };
 297
 298                 /* May need to remove if on a part without crypto engine */
 299                 crypto@30000 {
 300                         device_type = "crypto";
 301                         model = "SEC2";
 302                         compatible = "talitos";
 303                         reg = <30000 10000>;
 304                         interrupts = <b 8>;
 305                         interrupt-parent = < &ipic >;
 306                         num-channels = <4>;
 307                         channel-fifo-len = <18>;
 308                         exec-units-mask = <0000007e>;
 309                         /* desc mask is for rev2.0,
 310                          * we need runtime fixup for >2.0 */
 311                         descriptor-types-mask = <01010ebf>;
 312                 };
 313
 314                 /* IPIC
 315                  * interrupts cell = <intr #, sense>
 316                  * sense values match linux IORESOURCE_IRQ_* defines:
 317                  * sense == 8: Level, low assertion
 318                  * sense == 2: Edge, high-to-low change
 319                  */
 320                 ipic: pic@700 {
 321                         interrupt-controller;
 322                         #address-cells = <0>;
 323                         #interrupt-cells = <2>;
 324                         reg = <700 100>;
 325                         built-in;
 326                         device_type = "ipic";
 327                 };
 328         };
 329 };