Pull button into test branch
[linux-drm-fsl-dcu.git] / arch / powerpc / boot / dts / kuroboxHG.dts
1 /*
2  * Device Tree Souce for Buffalo KuroboxHG
3  *
4  * Choose CONFIG_LINKSTATION to build a kernel for KuroboxHG, or use
5  * the default configuration linkstation_defconfig.
6  *
7  * Based on sandpoint.dts
8  *
9  * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
10  *
11  * This file is licensed under
12  * the terms of the GNU General Public License version 2.  This program
13  * is licensed "as is" without any warranty of any kind, whether express
14  * or implied.
15
16 XXXX add flash parts, rtc, ??
17
18 build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
19
20
21  */
22
23 / {
24         linux,phandle = <1000>;
25         model = "KuroboxHG";
26         compatible = "linkstation";
27         #address-cells = <1>;
28         #size-cells = <1>;
29
30         cpus {
31                 linux,phandle = <2000>;
32                 #cpus = <1>;
33                 #address-cells = <1>;
34                 #size-cells = <0>;
35
36                 PowerPC,603e { /* Really 8241 */
37                         linux,phandle = <2100>;
38                         linux,boot-cpu;
39                         device_type = "cpu";
40                         reg = <0>;
41                         clock-frequency = <fdad680>;    /* Fixed by bootwrapper */
42                         timebase-frequency = <1F04000>; /* Fixed by bootwrapper */
43                         bus-frequency = <0>;            /* From bootloader */
44                         /* Following required by dtc but not used */
45                         i-cache-line-size = <0>;
46                         d-cache-line-size = <0>;
47                         i-cache-size = <4000>;
48                         d-cache-size = <4000>;
49                 };
50         };
51
52         memory {
53                 linux,phandle = <3000>;
54                 device_type = "memory";
55                 reg = <00000000 08000000>;
56         };
57
58         soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
59                 linux,phandle = <4000>;
60                 #address-cells = <1>;
61                 #size-cells = <1>;
62                 #interrupt-cells = <2>;
63                 device_type = "soc";
64                 compatible = "mpc10x";
65                 store-gathering = <0>; /* 0 == off, !0 == on */
66                 reg = <80000000 00100000>;
67                 ranges = <80000000 80000000 70000000    /* pci mem space */
68                           fc000000 fc000000 00100000    /* EUMB */
69                           fe000000 fe000000 00c00000    /* pci i/o space */
70                           fec00000 fec00000 00300000    /* pci cfg regs */
71                           fef00000 fef00000 00100000>;  /* pci iack */
72
73                 i2c@80003000 {
74                         linux,phandle = <4300>;
75                         device_type = "i2c";
76                         compatible = "fsl-i2c";
77                         reg = <80003000 1000>;
78                         interrupts = <5 2>;
79                         interrupt-parent = <4400>;
80                 };
81
82                 serial@80004500 {
83                         linux,phandle = <4511>;
84                         device_type = "serial";
85                         compatible = "ns16550";
86                         reg = <80004500 8>;
87                         clock-frequency = <7c044a8>;
88                         current-speed = <2580>;
89                         interrupts = <9 2>;
90                         interrupt-parent = <4400>;
91                 };
92
93                 serial@80004600 {
94                         linux,phandle = <4512>;
95                         device_type = "serial";
96                         compatible = "ns16550";
97                         reg = <80004600 8>;
98                         clock-frequency = <7c044a8>;
99                         current-speed = <e100>;
100                         interrupts = <a 0>;
101                         interrupt-parent = <4400>;
102                 };
103
104                 pic@80040000 {
105                         linux,phandle = <4400>;
106                         #interrupt-cells = <2>;
107                         #address-cells = <0>;
108                         device_type = "open-pic";
109                         compatible = "chrp,open-pic";
110                         interrupt-controller;
111                         reg = <80040000 40000>;
112                         built-in;
113                 };
114
115                 pci@fec00000 {
116                         linux,phandle = <4500>;
117                         #address-cells = <3>;
118                         #size-cells = <2>;
119                         #interrupt-cells = <1>;
120                         device_type = "pci";
121                         compatible = "mpc10x-pci";
122                         reg = <fec00000 400000>;
123                         ranges = <01000000 0        0 fe000000 0 00c00000
124                                   02000000 0 80000000 80000000 0 70000000>;
125                         bus-range = <0 ff>;
126                         clock-frequency = <7f28155>;
127                         interrupt-parent = <4400>;
128                         interrupt-map-mask = <f800 0 0 7>;
129                         interrupt-map = <
130                                 /* IDSEL 0x11 - IRQ0 ETH */
131                                 5800 0 0 1 4400 0 1
132                                 5800 0 0 2 4400 1 1
133                                 5800 0 0 3 4400 2 1
134                                 5800 0 0 4 4400 3 1
135                                 /* IDSEL 0x12 - IRQ1 IDE0 */
136                                 6000 0 0 1 4400 1 1
137                                 6000 0 0 2 4400 2 1
138                                 6000 0 0 3 4400 3 1
139                                 6000 0 0 4 4400 0 1
140                                 /* IDSEL 0x14 - IRQ3 USB2.0 */
141                                 7000 0 0 1 4400 3 1
142                                 7000 0 0 2 4400 3 1
143                                 7000 0 0 3 4400 3 1
144                                 7000 0 0 4 4400 3 1
145                         >;
146                 };
147         };
148 };