2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
7 * Copyright (C) 2000, 2001, 06 Ralf Baechle <ralf@linux-mips.org>
8 * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
11 #include <linux/types.h>
12 #include <linux/dma-mapping.h>
14 #include <linux/module.h>
15 #include <linux/scatterlist.h>
16 #include <linux/string.h>
17 #include <linux/gfp.h>
18 #include <linux/highmem.h>
19 #include <linux/dma-contiguous.h>
21 #include <asm/cache.h>
22 #include <asm/cpu-type.h>
25 #include <dma-coherence.h>
27 #ifdef CONFIG_DMA_MAYBE_COHERENT
28 int coherentio = 0; /* User defined DMA coherency from command line. */
29 EXPORT_SYMBOL_GPL(coherentio);
30 int hw_coherentio = 0; /* Actual hardware supported DMA coherency setting. */
32 static int __init setcoherentio(char *str)
35 pr_info("Hardware DMA cache coherency (command line)\n");
38 early_param("coherentio", setcoherentio);
40 static int __init setnocoherentio(char *str)
43 pr_info("Software DMA cache coherency (command line)\n");
46 early_param("nocoherentio", setnocoherentio);
49 static inline struct page *dma_addr_to_page(struct device *dev,
53 plat_dma_addr_to_phys(dev, dma_addr) >> PAGE_SHIFT);
57 * The affected CPUs below in 'cpu_needs_post_dma_flush()' can
58 * speculatively fill random cachelines with stale data at any time,
59 * requiring an extra flush post-DMA.
61 * Warning on the terminology - Linux calls an uncached area coherent;
62 * MIPS terminology calls memory areas with hardware maintained coherency
65 * Note that the R14000 and R16000 should also be checked for in this
66 * condition. However this function is only called on non-I/O-coherent
67 * systems and only the R10000 and R12000 are used in such systems, the
68 * SGI IP28 Indigo² rsp. SGI IP32 aka O2.
70 static inline int cpu_needs_post_dma_flush(struct device *dev)
72 return !plat_device_is_coherent(dev) &&
73 (boot_cpu_type() == CPU_R10000 ||
74 boot_cpu_type() == CPU_R12000 ||
75 boot_cpu_type() == CPU_BMIPS5000);
78 static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp)
82 /* ignore region specifiers */
83 gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
90 #if defined(CONFIG_ZONE_DMA32) && defined(CONFIG_ZONE_DMA)
91 if (dev->coherent_dma_mask < DMA_BIT_MASK(32))
93 else if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
94 dma_flag = __GFP_DMA32;
97 #if defined(CONFIG_ZONE_DMA32) && !defined(CONFIG_ZONE_DMA)
98 if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
99 dma_flag = __GFP_DMA32;
102 #if defined(CONFIG_ZONE_DMA) && !defined(CONFIG_ZONE_DMA32)
103 if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
104 dma_flag = __GFP_DMA;
109 /* Don't invoke OOM killer */
110 gfp |= __GFP_NORETRY;
112 return gfp | dma_flag;
115 void *dma_alloc_noncoherent(struct device *dev, size_t size,
116 dma_addr_t * dma_handle, gfp_t gfp)
120 gfp = massage_gfp_flags(dev, gfp);
122 ret = (void *) __get_free_pages(gfp, get_order(size));
125 memset(ret, 0, size);
126 *dma_handle = plat_map_dma_mem(dev, ret, size);
131 EXPORT_SYMBOL(dma_alloc_noncoherent);
133 static void *mips_dma_alloc_coherent(struct device *dev, size_t size,
134 dma_addr_t * dma_handle, gfp_t gfp, struct dma_attrs *attrs)
137 struct page *page = NULL;
138 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
140 if (dma_alloc_from_coherent(dev, size, dma_handle, &ret))
143 gfp = massage_gfp_flags(dev, gfp);
145 if (IS_ENABLED(CONFIG_DMA_CMA) && !(gfp & GFP_ATOMIC))
146 page = dma_alloc_from_contiguous(dev,
147 count, get_order(size));
149 page = alloc_pages(gfp, get_order(size));
154 ret = page_address(page);
155 memset(ret, 0, size);
156 *dma_handle = plat_map_dma_mem(dev, ret, size);
157 if (!plat_device_is_coherent(dev)) {
158 dma_cache_wback_inv((unsigned long) ret, size);
160 ret = UNCAC_ADDR(ret);
167 void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
168 dma_addr_t dma_handle)
170 plat_unmap_dma_mem(dev, dma_handle, size, DMA_BIDIRECTIONAL);
171 free_pages((unsigned long) vaddr, get_order(size));
173 EXPORT_SYMBOL(dma_free_noncoherent);
175 static void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
176 dma_addr_t dma_handle, struct dma_attrs *attrs)
178 unsigned long addr = (unsigned long) vaddr;
179 int order = get_order(size);
180 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
181 struct page *page = NULL;
183 if (dma_release_from_coherent(dev, order, vaddr))
186 plat_unmap_dma_mem(dev, dma_handle, size, DMA_BIDIRECTIONAL);
188 if (!plat_device_is_coherent(dev) && !hw_coherentio)
189 addr = CAC_ADDR(addr);
191 page = virt_to_page((void *) addr);
193 if (!dma_release_from_contiguous(dev, page, count))
194 __free_pages(page, get_order(size));
197 static int mips_dma_mmap(struct device *dev, struct vm_area_struct *vma,
198 void *cpu_addr, dma_addr_t dma_addr, size_t size,
199 struct dma_attrs *attrs)
201 unsigned long user_count = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
202 unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
203 unsigned long addr = (unsigned long)cpu_addr;
204 unsigned long off = vma->vm_pgoff;
208 if (!plat_device_is_coherent(dev) && !hw_coherentio)
209 addr = CAC_ADDR(addr);
211 pfn = page_to_pfn(virt_to_page((void *)addr));
213 if (dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs))
214 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
216 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
218 if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
221 if (off < count && user_count <= (count - off)) {
222 ret = remap_pfn_range(vma, vma->vm_start,
224 user_count << PAGE_SHIFT,
231 static inline void __dma_sync_virtual(void *addr, size_t size,
232 enum dma_data_direction direction)
236 dma_cache_wback((unsigned long)addr, size);
239 case DMA_FROM_DEVICE:
240 dma_cache_inv((unsigned long)addr, size);
243 case DMA_BIDIRECTIONAL:
244 dma_cache_wback_inv((unsigned long)addr, size);
253 * A single sg entry may refer to multiple physically contiguous
254 * pages. But we still need to process highmem pages individually.
255 * If highmem is not configured then the bulk of this loop gets
258 static inline void __dma_sync(struct page *page,
259 unsigned long offset, size_t size, enum dma_data_direction direction)
266 if (PageHighMem(page)) {
269 if (offset + len > PAGE_SIZE) {
270 if (offset >= PAGE_SIZE) {
271 page += offset >> PAGE_SHIFT;
272 offset &= ~PAGE_MASK;
274 len = PAGE_SIZE - offset;
277 addr = kmap_atomic(page);
278 __dma_sync_virtual(addr + offset, len, direction);
281 __dma_sync_virtual(page_address(page) + offset,
289 static void mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr,
290 size_t size, enum dma_data_direction direction, struct dma_attrs *attrs)
292 if (cpu_needs_post_dma_flush(dev))
293 __dma_sync(dma_addr_to_page(dev, dma_addr),
294 dma_addr & ~PAGE_MASK, size, direction);
295 plat_post_dma_flush(dev);
296 plat_unmap_dma_mem(dev, dma_addr, size, direction);
299 static int mips_dma_map_sg(struct device *dev, struct scatterlist *sglist,
300 int nents, enum dma_data_direction direction, struct dma_attrs *attrs)
303 struct scatterlist *sg;
305 for_each_sg(sglist, sg, nents, i) {
306 if (!plat_device_is_coherent(dev))
307 __dma_sync(sg_page(sg), sg->offset, sg->length,
309 #ifdef CONFIG_NEED_SG_DMA_LENGTH
310 sg->dma_length = sg->length;
312 sg->dma_address = plat_map_dma_mem_page(dev, sg_page(sg)) +
319 static dma_addr_t mips_dma_map_page(struct device *dev, struct page *page,
320 unsigned long offset, size_t size, enum dma_data_direction direction,
321 struct dma_attrs *attrs)
323 if (!plat_device_is_coherent(dev))
324 __dma_sync(page, offset, size, direction);
326 return plat_map_dma_mem_page(dev, page) + offset;
329 static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sglist,
330 int nhwentries, enum dma_data_direction direction,
331 struct dma_attrs *attrs)
334 struct scatterlist *sg;
336 for_each_sg(sglist, sg, nhwentries, i) {
337 if (!plat_device_is_coherent(dev) &&
338 direction != DMA_TO_DEVICE)
339 __dma_sync(sg_page(sg), sg->offset, sg->length,
341 plat_unmap_dma_mem(dev, sg->dma_address, sg->length, direction);
345 static void mips_dma_sync_single_for_cpu(struct device *dev,
346 dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
348 if (cpu_needs_post_dma_flush(dev))
349 __dma_sync(dma_addr_to_page(dev, dma_handle),
350 dma_handle & ~PAGE_MASK, size, direction);
351 plat_post_dma_flush(dev);
354 static void mips_dma_sync_single_for_device(struct device *dev,
355 dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
357 if (!plat_device_is_coherent(dev))
358 __dma_sync(dma_addr_to_page(dev, dma_handle),
359 dma_handle & ~PAGE_MASK, size, direction);
362 static void mips_dma_sync_sg_for_cpu(struct device *dev,
363 struct scatterlist *sglist, int nelems,
364 enum dma_data_direction direction)
367 struct scatterlist *sg;
369 if (cpu_needs_post_dma_flush(dev)) {
370 for_each_sg(sglist, sg, nelems, i) {
371 __dma_sync(sg_page(sg), sg->offset, sg->length,
375 plat_post_dma_flush(dev);
378 static void mips_dma_sync_sg_for_device(struct device *dev,
379 struct scatterlist *sglist, int nelems,
380 enum dma_data_direction direction)
383 struct scatterlist *sg;
385 if (!plat_device_is_coherent(dev)) {
386 for_each_sg(sglist, sg, nelems, i) {
387 __dma_sync(sg_page(sg), sg->offset, sg->length,
393 int mips_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
398 int mips_dma_supported(struct device *dev, u64 mask)
400 return plat_dma_supported(dev, mask);
403 void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
404 enum dma_data_direction direction)
406 BUG_ON(direction == DMA_NONE);
408 if (!plat_device_is_coherent(dev))
409 __dma_sync_virtual(vaddr, size, direction);
412 EXPORT_SYMBOL(dma_cache_sync);
414 static struct dma_map_ops mips_default_dma_map_ops = {
415 .alloc = mips_dma_alloc_coherent,
416 .free = mips_dma_free_coherent,
417 .mmap = mips_dma_mmap,
418 .map_page = mips_dma_map_page,
419 .unmap_page = mips_dma_unmap_page,
420 .map_sg = mips_dma_map_sg,
421 .unmap_sg = mips_dma_unmap_sg,
422 .sync_single_for_cpu = mips_dma_sync_single_for_cpu,
423 .sync_single_for_device = mips_dma_sync_single_for_device,
424 .sync_sg_for_cpu = mips_dma_sync_sg_for_cpu,
425 .sync_sg_for_device = mips_dma_sync_sg_for_device,
426 .mapping_error = mips_dma_mapping_error,
427 .dma_supported = mips_dma_supported
430 struct dma_map_ops *mips_dma_map_ops = &mips_default_dma_map_ops;
431 EXPORT_SYMBOL(mips_dma_map_ops);
433 #define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
435 static int __init mips_dma_init(void)
437 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
441 fs_initcall(mips_dma_init);