mips: delete non-required instances of include <linux/init.h>
[linux-drm-fsl-dcu.git] / arch / mips / kvm / kvm_tlb.c
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License.  See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * KVM/MIPS TLB handling, this file is part of the Linux host kernel so that
7 * TLB handlers run from KSEG0
8 *
9 * Copyright (C) 2012  MIPS Technologies, Inc.  All rights reserved.
10 * Authors: Sanjay Lal <sanjayl@kymasys.com>
11 */
12
13 #include <linux/sched.h>
14 #include <linux/smp.h>
15 #include <linux/mm.h>
16 #include <linux/delay.h>
17 #include <linux/module.h>
18 #include <linux/kvm_host.h>
19 #include <linux/srcu.h>
20
21
22 #include <asm/cpu.h>
23 #include <asm/bootinfo.h>
24 #include <asm/mmu_context.h>
25 #include <asm/pgtable.h>
26 #include <asm/cacheflush.h>
27 #include <asm/tlb.h>
28
29 #undef CONFIG_MIPS_MT
30 #include <asm/r4kcache.h>
31 #define CONFIG_MIPS_MT
32
33 #define KVM_GUEST_PC_TLB    0
34 #define KVM_GUEST_SP_TLB    1
35
36 #define PRIx64 "llx"
37
38 atomic_t kvm_mips_instance;
39 EXPORT_SYMBOL(kvm_mips_instance);
40
41 /* These function pointers are initialized once the KVM module is loaded */
42 pfn_t(*kvm_mips_gfn_to_pfn) (struct kvm *kvm, gfn_t gfn);
43 EXPORT_SYMBOL(kvm_mips_gfn_to_pfn);
44
45 void (*kvm_mips_release_pfn_clean) (pfn_t pfn);
46 EXPORT_SYMBOL(kvm_mips_release_pfn_clean);
47
48 bool(*kvm_mips_is_error_pfn) (pfn_t pfn);
49 EXPORT_SYMBOL(kvm_mips_is_error_pfn);
50
51 uint32_t kvm_mips_get_kernel_asid(struct kvm_vcpu *vcpu)
52 {
53         return vcpu->arch.guest_kernel_asid[smp_processor_id()] & ASID_MASK;
54 }
55
56
57 uint32_t kvm_mips_get_user_asid(struct kvm_vcpu *vcpu)
58 {
59         return vcpu->arch.guest_user_asid[smp_processor_id()] & ASID_MASK;
60 }
61
62 inline uint32_t kvm_mips_get_commpage_asid (struct kvm_vcpu *vcpu)
63 {
64         return vcpu->kvm->arch.commpage_tlb;
65 }
66
67
68 /*
69  * Structure defining an tlb entry data set.
70  */
71
72 void kvm_mips_dump_host_tlbs(void)
73 {
74         unsigned long old_entryhi;
75         unsigned long old_pagemask;
76         struct kvm_mips_tlb tlb;
77         unsigned long flags;
78         int i;
79
80         local_irq_save(flags);
81
82         old_entryhi = read_c0_entryhi();
83         old_pagemask = read_c0_pagemask();
84
85         printk("HOST TLBs:\n");
86         printk("ASID: %#lx\n", read_c0_entryhi() & ASID_MASK);
87
88         for (i = 0; i < current_cpu_data.tlbsize; i++) {
89                 write_c0_index(i);
90                 mtc0_tlbw_hazard();
91
92                 tlb_read();
93                 tlbw_use_hazard();
94
95                 tlb.tlb_hi = read_c0_entryhi();
96                 tlb.tlb_lo0 = read_c0_entrylo0();
97                 tlb.tlb_lo1 = read_c0_entrylo1();
98                 tlb.tlb_mask = read_c0_pagemask();
99
100                 printk("TLB%c%3d Hi 0x%08lx ",
101                        (tlb.tlb_lo0 | tlb.tlb_lo1) & MIPS3_PG_V ? ' ' : '*',
102                        i, tlb.tlb_hi);
103                 printk("Lo0=0x%09" PRIx64 " %c%c attr %lx ",
104                        (uint64_t) mips3_tlbpfn_to_paddr(tlb.tlb_lo0),
105                        (tlb.tlb_lo0 & MIPS3_PG_D) ? 'D' : ' ',
106                        (tlb.tlb_lo0 & MIPS3_PG_G) ? 'G' : ' ',
107                        (tlb.tlb_lo0 >> 3) & 7);
108                 printk("Lo1=0x%09" PRIx64 " %c%c attr %lx sz=%lx\n",
109                        (uint64_t) mips3_tlbpfn_to_paddr(tlb.tlb_lo1),
110                        (tlb.tlb_lo1 & MIPS3_PG_D) ? 'D' : ' ',
111                        (tlb.tlb_lo1 & MIPS3_PG_G) ? 'G' : ' ',
112                        (tlb.tlb_lo1 >> 3) & 7, tlb.tlb_mask);
113         }
114         write_c0_entryhi(old_entryhi);
115         write_c0_pagemask(old_pagemask);
116         mtc0_tlbw_hazard();
117         local_irq_restore(flags);
118 }
119
120 void kvm_mips_dump_guest_tlbs(struct kvm_vcpu *vcpu)
121 {
122         struct mips_coproc *cop0 = vcpu->arch.cop0;
123         struct kvm_mips_tlb tlb;
124         int i;
125
126         printk("Guest TLBs:\n");
127         printk("Guest EntryHi: %#lx\n", kvm_read_c0_guest_entryhi(cop0));
128
129         for (i = 0; i < KVM_MIPS_GUEST_TLB_SIZE; i++) {
130                 tlb = vcpu->arch.guest_tlb[i];
131                 printk("TLB%c%3d Hi 0x%08lx ",
132                        (tlb.tlb_lo0 | tlb.tlb_lo1) & MIPS3_PG_V ? ' ' : '*',
133                        i, tlb.tlb_hi);
134                 printk("Lo0=0x%09" PRIx64 " %c%c attr %lx ",
135                        (uint64_t) mips3_tlbpfn_to_paddr(tlb.tlb_lo0),
136                        (tlb.tlb_lo0 & MIPS3_PG_D) ? 'D' : ' ',
137                        (tlb.tlb_lo0 & MIPS3_PG_G) ? 'G' : ' ',
138                        (tlb.tlb_lo0 >> 3) & 7);
139                 printk("Lo1=0x%09" PRIx64 " %c%c attr %lx sz=%lx\n",
140                        (uint64_t) mips3_tlbpfn_to_paddr(tlb.tlb_lo1),
141                        (tlb.tlb_lo1 & MIPS3_PG_D) ? 'D' : ' ',
142                        (tlb.tlb_lo1 & MIPS3_PG_G) ? 'G' : ' ',
143                        (tlb.tlb_lo1 >> 3) & 7, tlb.tlb_mask);
144         }
145 }
146
147 static int kvm_mips_map_page(struct kvm *kvm, gfn_t gfn)
148 {
149         int srcu_idx, err = 0;
150         pfn_t pfn;
151
152         if (kvm->arch.guest_pmap[gfn] != KVM_INVALID_PAGE)
153                 return 0;
154
155         srcu_idx = srcu_read_lock(&kvm->srcu);
156         pfn = kvm_mips_gfn_to_pfn(kvm, gfn);
157
158         if (kvm_mips_is_error_pfn(pfn)) {
159                 kvm_err("Couldn't get pfn for gfn %#" PRIx64 "!\n", gfn);
160                 err = -EFAULT;
161                 goto out;
162         }
163
164         kvm->arch.guest_pmap[gfn] = pfn;
165 out:
166         srcu_read_unlock(&kvm->srcu, srcu_idx);
167         return err;
168 }
169
170 /* Translate guest KSEG0 addresses to Host PA */
171 unsigned long kvm_mips_translate_guest_kseg0_to_hpa(struct kvm_vcpu *vcpu,
172         unsigned long gva)
173 {
174         gfn_t gfn;
175         uint32_t offset = gva & ~PAGE_MASK;
176         struct kvm *kvm = vcpu->kvm;
177
178         if (KVM_GUEST_KSEGX(gva) != KVM_GUEST_KSEG0) {
179                 kvm_err("%s/%p: Invalid gva: %#lx\n", __func__,
180                         __builtin_return_address(0), gva);
181                 return KVM_INVALID_PAGE;
182         }
183
184         gfn = (KVM_GUEST_CPHYSADDR(gva) >> PAGE_SHIFT);
185
186         if (gfn >= kvm->arch.guest_pmap_npages) {
187                 kvm_err("%s: Invalid gfn: %#llx, GVA: %#lx\n", __func__, gfn,
188                         gva);
189                 return KVM_INVALID_PAGE;
190         }
191
192         if (kvm_mips_map_page(vcpu->kvm, gfn) < 0)
193                 return KVM_INVALID_ADDR;
194
195         return (kvm->arch.guest_pmap[gfn] << PAGE_SHIFT) + offset;
196 }
197
198 /* XXXKYMA: Must be called with interrupts disabled */
199 /* set flush_dcache_mask == 0 if no dcache flush required */
200 int
201 kvm_mips_host_tlb_write(struct kvm_vcpu *vcpu, unsigned long entryhi,
202         unsigned long entrylo0, unsigned long entrylo1, int flush_dcache_mask)
203 {
204         unsigned long flags;
205         unsigned long old_entryhi;
206         volatile int idx;
207
208         local_irq_save(flags);
209
210
211         old_entryhi = read_c0_entryhi();
212         write_c0_entryhi(entryhi);
213         mtc0_tlbw_hazard();
214
215         tlb_probe();
216         tlb_probe_hazard();
217         idx = read_c0_index();
218
219         if (idx > current_cpu_data.tlbsize) {
220                 kvm_err("%s: Invalid Index: %d\n", __func__, idx);
221                 kvm_mips_dump_host_tlbs();
222                 return -1;
223         }
224
225         if (idx < 0) {
226                 idx = read_c0_random() % current_cpu_data.tlbsize;
227                 write_c0_index(idx);
228                 mtc0_tlbw_hazard();
229         }
230         write_c0_entrylo0(entrylo0);
231         write_c0_entrylo1(entrylo1);
232         mtc0_tlbw_hazard();
233
234         tlb_write_indexed();
235         tlbw_use_hazard();
236
237 #ifdef DEBUG
238         if (debug) {
239                 kvm_debug("@ %#lx idx: %2d [entryhi(R): %#lx] "
240                           "entrylo0(R): 0x%08lx, entrylo1(R): 0x%08lx\n",
241                           vcpu->arch.pc, idx, read_c0_entryhi(),
242                           read_c0_entrylo0(), read_c0_entrylo1());
243         }
244 #endif
245
246         /* Flush D-cache */
247         if (flush_dcache_mask) {
248                 if (entrylo0 & MIPS3_PG_V) {
249                         ++vcpu->stat.flush_dcache_exits;
250                         flush_data_cache_page((entryhi & VPN2_MASK) & ~flush_dcache_mask);
251                 }
252                 if (entrylo1 & MIPS3_PG_V) {
253                         ++vcpu->stat.flush_dcache_exits;
254                         flush_data_cache_page(((entryhi & VPN2_MASK) & ~flush_dcache_mask) |
255                                 (0x1 << PAGE_SHIFT));
256                 }
257         }
258
259         /* Restore old ASID */
260         write_c0_entryhi(old_entryhi);
261         mtc0_tlbw_hazard();
262         tlbw_use_hazard();
263         local_irq_restore(flags);
264         return 0;
265 }
266
267
268 /* XXXKYMA: Must be called with interrupts disabled */
269 int kvm_mips_handle_kseg0_tlb_fault(unsigned long badvaddr,
270         struct kvm_vcpu *vcpu)
271 {
272         gfn_t gfn;
273         pfn_t pfn0, pfn1;
274         unsigned long vaddr = 0;
275         unsigned long entryhi = 0, entrylo0 = 0, entrylo1 = 0;
276         int even;
277         struct kvm *kvm = vcpu->kvm;
278         const int flush_dcache_mask = 0;
279
280
281         if (KVM_GUEST_KSEGX(badvaddr) != KVM_GUEST_KSEG0) {
282                 kvm_err("%s: Invalid BadVaddr: %#lx\n", __func__, badvaddr);
283                 kvm_mips_dump_host_tlbs();
284                 return -1;
285         }
286
287         gfn = (KVM_GUEST_CPHYSADDR(badvaddr) >> PAGE_SHIFT);
288         if (gfn >= kvm->arch.guest_pmap_npages) {
289                 kvm_err("%s: Invalid gfn: %#llx, BadVaddr: %#lx\n", __func__,
290                         gfn, badvaddr);
291                 kvm_mips_dump_host_tlbs();
292                 return -1;
293         }
294         even = !(gfn & 0x1);
295         vaddr = badvaddr & (PAGE_MASK << 1);
296
297         if (kvm_mips_map_page(vcpu->kvm, gfn) < 0)
298                 return -1;
299
300         if (kvm_mips_map_page(vcpu->kvm, gfn ^ 0x1) < 0)
301                 return -1;
302
303         if (even) {
304                 pfn0 = kvm->arch.guest_pmap[gfn];
305                 pfn1 = kvm->arch.guest_pmap[gfn ^ 0x1];
306         } else {
307                 pfn0 = kvm->arch.guest_pmap[gfn ^ 0x1];
308                 pfn1 = kvm->arch.guest_pmap[gfn];
309         }
310
311         entryhi = (vaddr | kvm_mips_get_kernel_asid(vcpu));
312         entrylo0 = mips3_paddr_to_tlbpfn(pfn0 << PAGE_SHIFT) | (0x3 << 3) | (1 << 2) |
313                         (0x1 << 1);
314         entrylo1 = mips3_paddr_to_tlbpfn(pfn1 << PAGE_SHIFT) | (0x3 << 3) | (1 << 2) |
315                         (0x1 << 1);
316
317         return kvm_mips_host_tlb_write(vcpu, entryhi, entrylo0, entrylo1,
318                                        flush_dcache_mask);
319 }
320
321 int kvm_mips_handle_commpage_tlb_fault(unsigned long badvaddr,
322         struct kvm_vcpu *vcpu)
323 {
324         pfn_t pfn0, pfn1;
325         unsigned long flags, old_entryhi = 0, vaddr = 0;
326         unsigned long entrylo0 = 0, entrylo1 = 0;
327
328
329         pfn0 = CPHYSADDR(vcpu->arch.kseg0_commpage) >> PAGE_SHIFT;
330         pfn1 = 0;
331         entrylo0 = mips3_paddr_to_tlbpfn(pfn0 << PAGE_SHIFT) | (0x3 << 3) | (1 << 2) |
332                         (0x1 << 1);
333         entrylo1 = 0;
334
335         local_irq_save(flags);
336
337         old_entryhi = read_c0_entryhi();
338         vaddr = badvaddr & (PAGE_MASK << 1);
339         write_c0_entryhi(vaddr | kvm_mips_get_kernel_asid(vcpu));
340         mtc0_tlbw_hazard();
341         write_c0_entrylo0(entrylo0);
342         mtc0_tlbw_hazard();
343         write_c0_entrylo1(entrylo1);
344         mtc0_tlbw_hazard();
345         write_c0_index(kvm_mips_get_commpage_asid(vcpu));
346         mtc0_tlbw_hazard();
347         tlb_write_indexed();
348         mtc0_tlbw_hazard();
349         tlbw_use_hazard();
350
351 #ifdef DEBUG
352         kvm_debug ("@ %#lx idx: %2d [entryhi(R): %#lx] entrylo0 (R): 0x%08lx, entrylo1(R): 0x%08lx\n",
353              vcpu->arch.pc, read_c0_index(), read_c0_entryhi(),
354              read_c0_entrylo0(), read_c0_entrylo1());
355 #endif
356
357         /* Restore old ASID */
358         write_c0_entryhi(old_entryhi);
359         mtc0_tlbw_hazard();
360         tlbw_use_hazard();
361         local_irq_restore(flags);
362
363         return 0;
364 }
365
366 int
367 kvm_mips_handle_mapped_seg_tlb_fault(struct kvm_vcpu *vcpu,
368         struct kvm_mips_tlb *tlb, unsigned long *hpa0, unsigned long *hpa1)
369 {
370         unsigned long entryhi = 0, entrylo0 = 0, entrylo1 = 0;
371         struct kvm *kvm = vcpu->kvm;
372         pfn_t pfn0, pfn1;
373
374
375         if ((tlb->tlb_hi & VPN2_MASK) == 0) {
376                 pfn0 = 0;
377                 pfn1 = 0;
378         } else {
379                 if (kvm_mips_map_page(kvm, mips3_tlbpfn_to_paddr(tlb->tlb_lo0) >> PAGE_SHIFT) < 0)
380                         return -1;
381
382                 if (kvm_mips_map_page(kvm, mips3_tlbpfn_to_paddr(tlb->tlb_lo1) >> PAGE_SHIFT) < 0)
383                         return -1;
384
385                 pfn0 = kvm->arch.guest_pmap[mips3_tlbpfn_to_paddr(tlb->tlb_lo0) >> PAGE_SHIFT];
386                 pfn1 = kvm->arch.guest_pmap[mips3_tlbpfn_to_paddr(tlb->tlb_lo1) >> PAGE_SHIFT];
387         }
388
389         if (hpa0)
390                 *hpa0 = pfn0 << PAGE_SHIFT;
391
392         if (hpa1)
393                 *hpa1 = pfn1 << PAGE_SHIFT;
394
395         /* Get attributes from the Guest TLB */
396         entryhi = (tlb->tlb_hi & VPN2_MASK) | (KVM_GUEST_KERNEL_MODE(vcpu) ?
397                         kvm_mips_get_kernel_asid(vcpu) : kvm_mips_get_user_asid(vcpu));
398         entrylo0 = mips3_paddr_to_tlbpfn(pfn0 << PAGE_SHIFT) | (0x3 << 3) |
399                         (tlb->tlb_lo0 & MIPS3_PG_D) | (tlb->tlb_lo0 & MIPS3_PG_V);
400         entrylo1 = mips3_paddr_to_tlbpfn(pfn1 << PAGE_SHIFT) | (0x3 << 3) |
401                         (tlb->tlb_lo1 & MIPS3_PG_D) | (tlb->tlb_lo1 & MIPS3_PG_V);
402
403 #ifdef DEBUG
404         kvm_debug("@ %#lx tlb_lo0: 0x%08lx tlb_lo1: 0x%08lx\n", vcpu->arch.pc,
405                   tlb->tlb_lo0, tlb->tlb_lo1);
406 #endif
407
408         return kvm_mips_host_tlb_write(vcpu, entryhi, entrylo0, entrylo1,
409                                        tlb->tlb_mask);
410 }
411
412 int kvm_mips_guest_tlb_lookup(struct kvm_vcpu *vcpu, unsigned long entryhi)
413 {
414         int i;
415         int index = -1;
416         struct kvm_mips_tlb *tlb = vcpu->arch.guest_tlb;
417
418
419         for (i = 0; i < KVM_MIPS_GUEST_TLB_SIZE; i++) {
420                 if (((TLB_VPN2(tlb[i]) & ~tlb[i].tlb_mask) == ((entryhi & VPN2_MASK) & ~tlb[i].tlb_mask)) &&
421                         (TLB_IS_GLOBAL(tlb[i]) || (TLB_ASID(tlb[i]) == (entryhi & ASID_MASK)))) {
422                         index = i;
423                         break;
424                 }
425         }
426
427 #ifdef DEBUG
428         kvm_debug("%s: entryhi: %#lx, index: %d lo0: %#lx, lo1: %#lx\n",
429                   __func__, entryhi, index, tlb[i].tlb_lo0, tlb[i].tlb_lo1);
430 #endif
431
432         return index;
433 }
434
435 int kvm_mips_host_tlb_lookup(struct kvm_vcpu *vcpu, unsigned long vaddr)
436 {
437         unsigned long old_entryhi, flags;
438         volatile int idx;
439
440
441         local_irq_save(flags);
442
443         old_entryhi = read_c0_entryhi();
444
445         if (KVM_GUEST_KERNEL_MODE(vcpu))
446                 write_c0_entryhi((vaddr & VPN2_MASK) | kvm_mips_get_kernel_asid(vcpu));
447         else {
448                 write_c0_entryhi((vaddr & VPN2_MASK) | kvm_mips_get_user_asid(vcpu));
449         }
450
451         mtc0_tlbw_hazard();
452
453         tlb_probe();
454         tlb_probe_hazard();
455         idx = read_c0_index();
456
457         /* Restore old ASID */
458         write_c0_entryhi(old_entryhi);
459         mtc0_tlbw_hazard();
460         tlbw_use_hazard();
461
462         local_irq_restore(flags);
463
464 #ifdef DEBUG
465         kvm_debug("Host TLB lookup, %#lx, idx: %2d\n", vaddr, idx);
466 #endif
467
468         return idx;
469 }
470
471 int kvm_mips_host_tlb_inv(struct kvm_vcpu *vcpu, unsigned long va)
472 {
473         int idx;
474         unsigned long flags, old_entryhi;
475
476         local_irq_save(flags);
477
478
479         old_entryhi = read_c0_entryhi();
480
481         write_c0_entryhi((va & VPN2_MASK) | kvm_mips_get_user_asid(vcpu));
482         mtc0_tlbw_hazard();
483
484         tlb_probe();
485         tlb_probe_hazard();
486         idx = read_c0_index();
487
488         if (idx >= current_cpu_data.tlbsize)
489                 BUG();
490
491         if (idx > 0) {
492                 write_c0_entryhi(UNIQUE_ENTRYHI(idx));
493                 mtc0_tlbw_hazard();
494
495                 write_c0_entrylo0(0);
496                 mtc0_tlbw_hazard();
497
498                 write_c0_entrylo1(0);
499                 mtc0_tlbw_hazard();
500
501                 tlb_write_indexed();
502                 mtc0_tlbw_hazard();
503         }
504
505         write_c0_entryhi(old_entryhi);
506         mtc0_tlbw_hazard();
507         tlbw_use_hazard();
508
509         local_irq_restore(flags);
510
511 #ifdef DEBUG
512         if (idx > 0) {
513                 kvm_debug("%s: Invalidated entryhi %#lx @ idx %d\n", __func__,
514                           (va & VPN2_MASK) | (vcpu->arch.asid_map[va & ASID_MASK] & ASID_MASK), idx);
515         }
516 #endif
517
518         return 0;
519 }
520
521 /* XXXKYMA: Fix Guest USER/KERNEL no longer share the same ASID*/
522 int kvm_mips_host_tlb_inv_index(struct kvm_vcpu *vcpu, int index)
523 {
524         unsigned long flags, old_entryhi;
525
526         if (index >= current_cpu_data.tlbsize)
527                 BUG();
528
529         local_irq_save(flags);
530
531
532         old_entryhi = read_c0_entryhi();
533
534         write_c0_entryhi(UNIQUE_ENTRYHI(index));
535         mtc0_tlbw_hazard();
536
537         write_c0_index(index);
538         mtc0_tlbw_hazard();
539
540         write_c0_entrylo0(0);
541         mtc0_tlbw_hazard();
542
543         write_c0_entrylo1(0);
544         mtc0_tlbw_hazard();
545
546         tlb_write_indexed();
547         mtc0_tlbw_hazard();
548         tlbw_use_hazard();
549
550         write_c0_entryhi(old_entryhi);
551         mtc0_tlbw_hazard();
552         tlbw_use_hazard();
553
554         local_irq_restore(flags);
555
556         return 0;
557 }
558
559 void kvm_mips_flush_host_tlb(int skip_kseg0)
560 {
561         unsigned long flags;
562         unsigned long old_entryhi, entryhi;
563         unsigned long old_pagemask;
564         int entry = 0;
565         int maxentry = current_cpu_data.tlbsize;
566
567
568         local_irq_save(flags);
569
570         old_entryhi = read_c0_entryhi();
571         old_pagemask = read_c0_pagemask();
572
573         /* Blast 'em all away. */
574         for (entry = 0; entry < maxentry; entry++) {
575
576                 write_c0_index(entry);
577                 mtc0_tlbw_hazard();
578
579                 if (skip_kseg0) {
580                         tlb_read();
581                         tlbw_use_hazard();
582
583                         entryhi = read_c0_entryhi();
584
585                         /* Don't blow away guest kernel entries */
586                         if (KVM_GUEST_KSEGX(entryhi) == KVM_GUEST_KSEG0) {
587                                 continue;
588                         }
589                 }
590
591                 /* Make sure all entries differ. */
592                 write_c0_entryhi(UNIQUE_ENTRYHI(entry));
593                 mtc0_tlbw_hazard();
594                 write_c0_entrylo0(0);
595                 mtc0_tlbw_hazard();
596                 write_c0_entrylo1(0);
597                 mtc0_tlbw_hazard();
598
599                 tlb_write_indexed();
600                 mtc0_tlbw_hazard();
601         }
602
603         tlbw_use_hazard();
604
605         write_c0_entryhi(old_entryhi);
606         write_c0_pagemask(old_pagemask);
607         mtc0_tlbw_hazard();
608         tlbw_use_hazard();
609
610         local_irq_restore(flags);
611 }
612
613 void
614 kvm_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu,
615                         struct kvm_vcpu *vcpu)
616 {
617         unsigned long asid = asid_cache(cpu);
618
619         if (!((asid += ASID_INC) & ASID_MASK)) {
620                 if (cpu_has_vtag_icache) {
621                         flush_icache_all();
622                 }
623
624                 kvm_local_flush_tlb_all();      /* start new asid cycle */
625
626                 if (!asid)      /* fix version if needed */
627                         asid = ASID_FIRST_VERSION;
628         }
629
630         cpu_context(cpu, mm) = asid_cache(cpu) = asid;
631 }
632
633 void kvm_local_flush_tlb_all(void)
634 {
635         unsigned long flags;
636         unsigned long old_ctx;
637         int entry = 0;
638
639         local_irq_save(flags);
640         /* Save old context and create impossible VPN2 value */
641         old_ctx = read_c0_entryhi();
642         write_c0_entrylo0(0);
643         write_c0_entrylo1(0);
644
645         /* Blast 'em all away. */
646         while (entry < current_cpu_data.tlbsize) {
647                 /* Make sure all entries differ. */
648                 write_c0_entryhi(UNIQUE_ENTRYHI(entry));
649                 write_c0_index(entry);
650                 mtc0_tlbw_hazard();
651                 tlb_write_indexed();
652                 entry++;
653         }
654         tlbw_use_hazard();
655         write_c0_entryhi(old_ctx);
656         mtc0_tlbw_hazard();
657
658         local_irq_restore(flags);
659 }
660
661 /* Restore ASID once we are scheduled back after preemption */
662 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
663 {
664         unsigned long flags;
665         int newasid = 0;
666
667 #ifdef DEBUG
668         kvm_debug("%s: vcpu %p, cpu: %d\n", __func__, vcpu, cpu);
669 #endif
670
671         /* Alocate new kernel and user ASIDs if needed */
672
673         local_irq_save(flags);
674
675         if (((vcpu->arch.
676               guest_kernel_asid[cpu] ^ asid_cache(cpu)) & ASID_VERSION_MASK)) {
677                 kvm_get_new_mmu_context(&vcpu->arch.guest_kernel_mm, cpu, vcpu);
678                 vcpu->arch.guest_kernel_asid[cpu] =
679                     vcpu->arch.guest_kernel_mm.context.asid[cpu];
680                 kvm_get_new_mmu_context(&vcpu->arch.guest_user_mm, cpu, vcpu);
681                 vcpu->arch.guest_user_asid[cpu] =
682                     vcpu->arch.guest_user_mm.context.asid[cpu];
683                 newasid++;
684
685                 kvm_info("[%d]: cpu_context: %#lx\n", cpu,
686                          cpu_context(cpu, current->mm));
687                 kvm_info("[%d]: Allocated new ASID for Guest Kernel: %#x\n",
688                          cpu, vcpu->arch.guest_kernel_asid[cpu]);
689                 kvm_info("[%d]: Allocated new ASID for Guest User: %#x\n", cpu,
690                          vcpu->arch.guest_user_asid[cpu]);
691         }
692
693         if (vcpu->arch.last_sched_cpu != cpu) {
694                 kvm_info("[%d->%d]KVM VCPU[%d] switch\n",
695                          vcpu->arch.last_sched_cpu, cpu, vcpu->vcpu_id);
696         }
697
698         if (!newasid) {
699                 /* If we preempted while the guest was executing, then reload the pre-empted ASID */
700                 if (current->flags & PF_VCPU) {
701                         write_c0_entryhi(vcpu->arch.
702                                          preempt_entryhi & ASID_MASK);
703                         ehb();
704                 }
705         } else {
706                 /* New ASIDs were allocated for the VM */
707
708                 /* Were we in guest context? If so then the pre-empted ASID is no longer
709                  * valid, we need to set it to what it should be based on the mode of
710                  * the Guest (Kernel/User)
711                  */
712                 if (current->flags & PF_VCPU) {
713                         if (KVM_GUEST_KERNEL_MODE(vcpu))
714                                 write_c0_entryhi(vcpu->arch.
715                                                  guest_kernel_asid[cpu] &
716                                                  ASID_MASK);
717                         else
718                                 write_c0_entryhi(vcpu->arch.
719                                                  guest_user_asid[cpu] &
720                                                  ASID_MASK);
721                         ehb();
722                 }
723         }
724
725         local_irq_restore(flags);
726
727 }
728
729 /* ASID can change if another task is scheduled during preemption */
730 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
731 {
732         unsigned long flags;
733         uint32_t cpu;
734
735         local_irq_save(flags);
736
737         cpu = smp_processor_id();
738
739
740         vcpu->arch.preempt_entryhi = read_c0_entryhi();
741         vcpu->arch.last_sched_cpu = cpu;
742
743         if (((cpu_context(cpu, current->mm) ^ asid_cache(cpu)) &
744              ASID_VERSION_MASK)) {
745                 kvm_debug("%s: Dropping MMU Context:  %#lx\n", __func__,
746                           cpu_context(cpu, current->mm));
747                 drop_mmu_context(current->mm, cpu);
748         }
749         write_c0_entryhi(cpu_asid(cpu, current->mm));
750         ehb();
751
752         local_irq_restore(flags);
753 }
754
755 uint32_t kvm_get_inst(uint32_t *opc, struct kvm_vcpu *vcpu)
756 {
757         struct mips_coproc *cop0 = vcpu->arch.cop0;
758         unsigned long paddr, flags;
759         uint32_t inst;
760         int index;
761
762         if (KVM_GUEST_KSEGX((unsigned long) opc) < KVM_GUEST_KSEG0 ||
763             KVM_GUEST_KSEGX((unsigned long) opc) == KVM_GUEST_KSEG23) {
764                 local_irq_save(flags);
765                 index = kvm_mips_host_tlb_lookup(vcpu, (unsigned long) opc);
766                 if (index >= 0) {
767                         inst = *(opc);
768                 } else {
769                         index =
770                             kvm_mips_guest_tlb_lookup(vcpu,
771                                                       ((unsigned long) opc & VPN2_MASK)
772                                                       |
773                                                       (kvm_read_c0_guest_entryhi
774                                                        (cop0) & ASID_MASK));
775                         if (index < 0) {
776                                 kvm_err
777                                     ("%s: get_user_failed for %p, vcpu: %p, ASID: %#lx\n",
778                                      __func__, opc, vcpu, read_c0_entryhi());
779                                 kvm_mips_dump_host_tlbs();
780                                 local_irq_restore(flags);
781                                 return KVM_INVALID_INST;
782                         }
783                         kvm_mips_handle_mapped_seg_tlb_fault(vcpu,
784                                                              &vcpu->arch.
785                                                              guest_tlb[index],
786                                                              NULL, NULL);
787                         inst = *(opc);
788                 }
789                 local_irq_restore(flags);
790         } else if (KVM_GUEST_KSEGX(opc) == KVM_GUEST_KSEG0) {
791                 paddr =
792                     kvm_mips_translate_guest_kseg0_to_hpa(vcpu,
793                                                          (unsigned long) opc);
794                 inst = *(uint32_t *) CKSEG0ADDR(paddr);
795         } else {
796                 kvm_err("%s: illegal address: %p\n", __func__, opc);
797                 return KVM_INVALID_INST;
798         }
799
800         return inst;
801 }
802
803 EXPORT_SYMBOL(kvm_local_flush_tlb_all);
804 EXPORT_SYMBOL(kvm_mips_handle_mapped_seg_tlb_fault);
805 EXPORT_SYMBOL(kvm_mips_handle_commpage_tlb_fault);
806 EXPORT_SYMBOL(kvm_mips_dump_host_tlbs);
807 EXPORT_SYMBOL(kvm_mips_handle_kseg0_tlb_fault);
808 EXPORT_SYMBOL(kvm_mips_host_tlb_lookup);
809 EXPORT_SYMBOL(kvm_mips_flush_host_tlb);
810 EXPORT_SYMBOL(kvm_mips_guest_tlb_lookup);
811 EXPORT_SYMBOL(kvm_mips_host_tlb_inv);
812 EXPORT_SYMBOL(kvm_mips_translate_guest_kseg0_to_hpa);
813 EXPORT_SYMBOL(kvm_mips_dump_guest_tlbs);
814 EXPORT_SYMBOL(kvm_get_inst);
815 EXPORT_SYMBOL(kvm_arch_vcpu_load);
816 EXPORT_SYMBOL(kvm_arch_vcpu_put);