arch/mips/jazz/jazzdma.c

   1 /*
   2  * Mips Jazz DMA controller support
   3  * Copyright (C) 1995, 1996 by Andreas Busse
   4  *
   5  * NOTE: Some of the argument checking could be removed when
   6  * things have settled down. Also, instead of returning 0xffffffff
   7  * on failure of vdma_alloc() one could leave page #0 unused
   8  * and return the more usual NULL pointer as logical address.
   9  */
  10 #include <linux/kernel.h>
  11 #include <linux/init.h>
  12 #include <linux/module.h>
  13 #include <linux/errno.h>
  14 #include <linux/mm.h>
  15 #include <linux/bootmem.h>
  16 #include <linux/spinlock.h>
  17 #include <asm/mipsregs.h>
  18 #include <asm/jazz.h>
  19 #include <asm/io.h>
  20 #include <asm/uaccess.h>
  21 #include <asm/dma.h>
  22 #include <asm/jazzdma.h>
  23 #include <asm/pgtable.h>
  24
  25 /*
  26  * Set this to one to enable additional vdma debug code.
  27  */
  28 #define CONF_DEBUG_VDMA 0
  29
  30 static unsigned long vdma_pagetable_start;
  31
  32 static DEFINE_SPINLOCK(vdma_lock);
  33
  34 /*
  35  * Debug stuff
  36  */
  37 #define vdma_debug     ((CONF_DEBUG_VDMA) ? debuglvl : 0)
  38
  39 static int debuglvl = 3;
  40
  41 /*
  42  * Initialize the pagetable with a one-to-one mapping of
  43  * the first 16 Mbytes of main memory and declare all
  44  * entries to be unused. Using this method will at least
  45  * allow some early device driver operations to work.
  46  */
  47 static inline void vdma_pgtbl_init(void)
  48 {
  49         VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
  50         unsigned long paddr = 0;
  51         int i;
  52
  53         for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
  54                 pgtbl[i].frame = paddr;
  55                 pgtbl[i].owner = VDMA_PAGE_EMPTY;
  56                 paddr += VDMA_PAGESIZE;
  57         }
  58 }
  59
  60 /*
  61  * Initialize the Jazz R4030 dma controller
  62  */
  63 void __init vdma_init(void)
  64 {
  65         /*
  66          * Allocate 32k of memory for DMA page tables.  This needs to be page
  67          * aligned and should be uncached to avoid cache flushing after every
  68          * update.
  69          */
  70         vdma_pagetable_start =
  71                 (unsigned long) alloc_bootmem_low_pages(VDMA_PGTBL_SIZE);
  72         if (!vdma_pagetable_start)
  73                 BUG();
  74         dma_cache_wback_inv(vdma_pagetable_start, VDMA_PGTBL_SIZE);
  75         vdma_pagetable_start = KSEG1ADDR(vdma_pagetable_start);
  76
  77         /*
  78          * Clear the R4030 translation table
  79          */
  80         vdma_pgtbl_init();
  81
  82         r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE,
  83                           CPHYSADDR(vdma_pagetable_start));
  84         r4030_write_reg32(JAZZ_R4030_TRSTBL_LIM, VDMA_PGTBL_SIZE);
  85         r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
  86
  87         printk("VDMA: R4030 DMA pagetables initialized.\n");
  88 }
  89
  90 /*
  91  * Allocate DMA pagetables using a simple first-fit algorithm
  92  */
  93 unsigned long vdma_alloc(unsigned long paddr, unsigned long size)
  94 {
  95         VDMA_PGTBL_ENTRY *entry = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
  96         int first, last, pages, frame, i;
  97         unsigned long laddr, flags;
  98
  99         /* check arguments */
 100
 101         if (paddr > 0x1fffffff) {
 102                 if (vdma_debug)
 103                         printk("vdma_alloc: Invalid physical address: %08lx\n",
 104                                paddr);
 105                 return VDMA_ERROR;      /* invalid physical address */
 106         }
 107         if (size > 0x400000 || size == 0) {
 108                 if (vdma_debug)
 109                         printk("vdma_alloc: Invalid size: %08lx\n", size);
 110                 return VDMA_ERROR;      /* invalid physical address */
 111         }
 112
 113         spin_lock_irqsave(&vdma_lock, flags);
 114         /*
 115          * Find free chunk
 116          */
 117         pages = (size + 4095) >> 12;    /* no. of pages to allocate */
 118         first = 0;
 119         while (1) {
 120                 while (entry[first].owner != VDMA_PAGE_EMPTY &&
 121                        first < VDMA_PGTBL_ENTRIES) first++;
 122                 if (first + pages > VDMA_PGTBL_ENTRIES) {       /* nothing free */
 123                         spin_unlock_irqrestore(&vdma_lock, flags);
 124                         return VDMA_ERROR;
 125                 }
 126
 127                 last = first + 1;
 128                 while (entry[last].owner == VDMA_PAGE_EMPTY
 129                        && last - first < pages)
 130                         last++;
 131
 132                 if (last - first == pages)
 133                         break;  /* found */
 134         }
 135
 136         /*
 137          * Mark pages as allocated
 138          */
 139         laddr = (first << 12) + (paddr & (VDMA_PAGESIZE - 1));
 140         frame = paddr & ~(VDMA_PAGESIZE - 1);
 141
 142         for (i = first; i < last; i++) {
 143                 entry[i].frame = frame;
 144                 entry[i].owner = laddr;
 145                 frame += VDMA_PAGESIZE;
 146         }
 147
 148         /*
 149          * Update translation table and return logical start address
 150          */
 151         r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
 152
 153         if (vdma_debug > 1)
 154                 printk("vdma_alloc: Allocated %d pages starting from %08lx\n",
 155                      pages, laddr);
 156
 157         if (vdma_debug > 2) {
 158                 printk("LADDR: ");
 159                 for (i = first; i < last; i++)
 160                         printk("%08x ", i << 12);
 161                 printk("\nPADDR: ");
 162                 for (i = first; i < last; i++)
 163                         printk("%08x ", entry[i].frame);
 164                 printk("\nOWNER: ");
 165                 for (i = first; i < last; i++)
 166                         printk("%08x ", entry[i].owner);
 167                 printk("\n");
 168         }
 169
 170         spin_unlock_irqrestore(&vdma_lock, flags);
 171
 172         return laddr;
 173 }
 174
 175 EXPORT_SYMBOL(vdma_alloc);
 176
 177 /*
 178  * Free previously allocated dma translation pages
 179  * Note that this does NOT change the translation table,
 180  * it just marks the free'd pages as unused!
 181  */
 182 int vdma_free(unsigned long laddr)
 183 {
 184         VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
 185         int i;
 186
 187         i = laddr >> 12;
 188
 189         if (pgtbl[i].owner != laddr) {
 190                 printk
 191                     ("vdma_free: trying to free other's dma pages, laddr=%8lx\n",
 192                      laddr);
 193                 return -1;
 194         }
 195
 196         while (pgtbl[i].owner == laddr && i < VDMA_PGTBL_ENTRIES) {
 197                 pgtbl[i].owner = VDMA_PAGE_EMPTY;
 198                 i++;
 199         }
 200
 201         if (vdma_debug > 1)
 202                 printk("vdma_free: freed %ld pages starting from %08lx\n",
 203                        i - (laddr >> 12), laddr);
 204
 205         return 0;
 206 }
 207
 208 EXPORT_SYMBOL(vdma_free);
 209
 210 /*
 211  * Map certain page(s) to another physical address.
 212  * Caller must have allocated the page(s) before.
 213  */
 214 int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size)
 215 {
 216         VDMA_PGTBL_ENTRY *pgtbl =
 217             (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
 218         int first, pages, npages;
 219
 220         if (laddr > 0xffffff) {
 221                 if (vdma_debug)
 222                         printk
 223                             ("vdma_map: Invalid logical address: %08lx\n",
 224                              laddr);
 225                 return -EINVAL; /* invalid logical address */
 226         }
 227         if (paddr > 0x1fffffff) {
 228                 if (vdma_debug)
 229                         printk
 230                             ("vdma_map: Invalid physical address: %08lx\n",
 231                              paddr);
 232                 return -EINVAL; /* invalid physical address */
 233         }
 234
 235         npages = pages =
 236             (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
 237         first = laddr >> 12;
 238         if (vdma_debug)
 239                 printk("vdma_remap: first=%x, pages=%x\n", first, pages);
 240         if (first + pages > VDMA_PGTBL_ENTRIES) {
 241                 if (vdma_debug)
 242                         printk("vdma_alloc: Invalid size: %08lx\n", size);
 243                 return -EINVAL;
 244         }
 245
 246         paddr &= ~(VDMA_PAGESIZE - 1);
 247         while (pages > 0 && first < VDMA_PGTBL_ENTRIES) {
 248                 if (pgtbl[first].owner != laddr) {
 249                         if (vdma_debug)
 250                                 printk("Trying to remap other's pages.\n");
 251                         return -EPERM;  /* not owner */
 252                 }
 253                 pgtbl[first].frame = paddr;
 254                 paddr += VDMA_PAGESIZE;
 255                 first++;
 256                 pages--;
 257         }
 258
 259         /*
 260          * Update translation table
 261          */
 262         r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
 263
 264         if (vdma_debug > 2) {
 265                 int i;
 266                 pages = (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
 267                 first = laddr >> 12;
 268                 printk("LADDR: ");
 269                 for (i = first; i < first + pages; i++)
 270                         printk("%08x ", i << 12);
 271                 printk("\nPADDR: ");
 272                 for (i = first; i < first + pages; i++)
 273                         printk("%08x ", pgtbl[i].frame);
 274                 printk("\nOWNER: ");
 275                 for (i = first; i < first + pages; i++)
 276                         printk("%08x ", pgtbl[i].owner);
 277                 printk("\n");
 278         }
 279
 280         return 0;
 281 }
 282
 283 /*
 284  * Translate a physical address to a logical address.
 285  * This will return the logical address of the first
 286  * match.
 287  */
 288 unsigned long vdma_phys2log(unsigned long paddr)
 289 {
 290         int i;
 291         int frame;
 292         VDMA_PGTBL_ENTRY *pgtbl =
 293             (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
 294
 295         frame = paddr & ~(VDMA_PAGESIZE - 1);
 296
 297         for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
 298                 if (pgtbl[i].frame == frame)
 299                         break;
 300         }
 301
 302         if (i == VDMA_PGTBL_ENTRIES)
 303                 return ~0UL;
 304
 305         return (i << 12) + (paddr & (VDMA_PAGESIZE - 1));
 306 }
 307
 308 EXPORT_SYMBOL(vdma_phys2log);
 309
 310 /*
 311  * Translate a logical DMA address to a physical address
 312  */
 313 unsigned long vdma_log2phys(unsigned long laddr)
 314 {
 315         VDMA_PGTBL_ENTRY *pgtbl =
 316             (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
 317
 318         return pgtbl[laddr >> 12].frame + (laddr & (VDMA_PAGESIZE - 1));
 319 }
 320
 321 EXPORT_SYMBOL(vdma_log2phys);
 322
 323 /*
 324  * Print DMA statistics
 325  */
 326 void vdma_stats(void)
 327 {
 328         int i;
 329
 330         printk("vdma_stats: CONFIG: %08x\n",
 331                r4030_read_reg32(JAZZ_R4030_CONFIG));
 332         printk("R4030 translation table base: %08x\n",
 333                r4030_read_reg32(JAZZ_R4030_TRSTBL_BASE));
 334         printk("R4030 translation table limit: %08x\n",
 335                r4030_read_reg32(JAZZ_R4030_TRSTBL_LIM));
 336         printk("vdma_stats: INV_ADDR: %08x\n",
 337                r4030_read_reg32(JAZZ_R4030_INV_ADDR));
 338         printk("vdma_stats: R_FAIL_ADDR: %08x\n",
 339                r4030_read_reg32(JAZZ_R4030_R_FAIL_ADDR));
 340         printk("vdma_stats: M_FAIL_ADDR: %08x\n",
 341                r4030_read_reg32(JAZZ_R4030_M_FAIL_ADDR));
 342         printk("vdma_stats: IRQ_SOURCE: %08x\n",
 343                r4030_read_reg32(JAZZ_R4030_IRQ_SOURCE));
 344         printk("vdma_stats: I386_ERROR: %08x\n",
 345                r4030_read_reg32(JAZZ_R4030_I386_ERROR));
 346         printk("vdma_chnl_modes:   ");
 347         for (i = 0; i < 8; i++)
 348                 printk("%04x ",
 349                        (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
 350                                                    (i << 5)));
 351         printk("\n");
 352         printk("vdma_chnl_enables: ");
 353         for (i = 0; i < 8; i++)
 354                 printk("%04x ",
 355                        (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
 356                                                    (i << 5)));
 357         printk("\n");
 358 }
 359
 360 /*
 361  * DMA transfer functions
 362  */
 363
 364 /*
 365  * Enable a DMA channel. Also clear any error conditions.
 366  */
 367 void vdma_enable(int channel)
 368 {
 369         int status;
 370
 371         if (vdma_debug)
 372                 printk("vdma_enable: channel %d\n", channel);
 373
 374         /*
 375          * Check error conditions first
 376          */
 377         status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
 378         if (status & 0x400)
 379                 printk("VDMA: Channel %d: Address error!\n", channel);
 380         if (status & 0x200)
 381                 printk("VDMA: Channel %d: Memory error!\n", channel);
 382
 383         /*
 384          * Clear all interrupt flags
 385          */
 386         r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
 387                           r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
 388                                            (channel << 5)) | R4030_TC_INTR
 389                           | R4030_MEM_INTR | R4030_ADDR_INTR);
 390
 391         /*
 392          * Enable the desired channel
 393          */
 394         r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
 395                           r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
 396                                            (channel << 5)) |
 397                           R4030_CHNL_ENABLE);
 398 }
 399
 400 EXPORT_SYMBOL(vdma_enable);
 401
 402 /*
 403  * Disable a DMA channel
 404  */
 405 void vdma_disable(int channel)
 406 {
 407         if (vdma_debug) {
 408                 int status =
 409                     r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
 410                                      (channel << 5));
 411
 412                 printk("vdma_disable: channel %d\n", channel);
 413                 printk("VDMA: channel %d status: %04x (%s) mode: "
 414                        "%02x addr: %06x count: %06x\n",
 415                        channel, status,
 416                        ((status & 0x600) ? "ERROR" : "OK"),
 417                        (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
 418                                                    (channel << 5)),
 419                        (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ADDR +
 420                                                    (channel << 5)),
 421                        (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_COUNT +
 422                                                    (channel << 5)));
 423         }
 424
 425         r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
 426                           r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
 427                                            (channel << 5)) &
 428                           ~R4030_CHNL_ENABLE);
 429
 430         /*
 431          * After disabling a DMA channel a remote bus register should be
 432          * read to ensure that the current DMA acknowledge cycle is completed.
 433          */
 434         *((volatile unsigned int *) JAZZ_DUMMY_DEVICE);
 435 }
 436
 437 EXPORT_SYMBOL(vdma_disable);
 438
 439 /*
 440  * Set DMA mode. This function accepts the mode values used
 441  * to set a PC-style DMA controller. For the SCSI and FDC
 442  * channels, we also set the default modes each time we're
 443  * called.
 444  * NOTE: The FAST and BURST dma modes are supported by the
 445  * R4030 Rev. 2 and PICA chipsets only. I leave them disabled
 446  * for now.
 447  */
 448 void vdma_set_mode(int channel, int mode)
 449 {
 450         if (vdma_debug)
 451                 printk("vdma_set_mode: channel %d, mode 0x%x\n", channel,
 452                        mode);
 453
 454         switch (channel) {
 455         case JAZZ_SCSI_DMA:     /* scsi */
 456                 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
 457 /*                        R4030_MODE_FAST | */
 458 /*                        R4030_MODE_BURST | */
 459                                   R4030_MODE_INTR_EN |
 460                                   R4030_MODE_WIDTH_16 |
 461                                   R4030_MODE_ATIME_80);
 462                 break;
 463
 464         case JAZZ_FLOPPY_DMA:   /* floppy */
 465                 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
 466 /*                        R4030_MODE_FAST | */
 467 /*                        R4030_MODE_BURST | */
 468                                   R4030_MODE_INTR_EN |
 469                                   R4030_MODE_WIDTH_8 |
 470                                   R4030_MODE_ATIME_120);
 471                 break;
 472
 473         case JAZZ_AUDIOL_DMA:
 474         case JAZZ_AUDIOR_DMA:
 475                 printk("VDMA: Audio DMA not supported yet.\n");
 476                 break;
 477
 478         default:
 479                 printk
 480                     ("VDMA: vdma_set_mode() called with unsupported channel %d!\n",
 481                      channel);
 482         }
 483
 484         switch (mode) {
 485         case DMA_MODE_READ:
 486                 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
 487                                   r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
 488                                                    (channel << 5)) &
 489                                   ~R4030_CHNL_WRITE);
 490                 break;
 491
 492         case DMA_MODE_WRITE:
 493                 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
 494                                   r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
 495                                                    (channel << 5)) |
 496                                   R4030_CHNL_WRITE);
 497                 break;
 498
 499         default:
 500                 printk
 501                     ("VDMA: vdma_set_mode() called with unknown dma mode 0x%x\n",
 502                      mode);
 503         }
 504 }
 505
 506 EXPORT_SYMBOL(vdma_set_mode);
 507
 508 /*
 509  * Set Transfer Address
 510  */
 511 void vdma_set_addr(int channel, long addr)
 512 {
 513         if (vdma_debug)
 514                 printk("vdma_set_addr: channel %d, addr %lx\n", channel,
 515                        addr);
 516
 517         r4030_write_reg32(JAZZ_R4030_CHNL_ADDR + (channel << 5), addr);
 518 }
 519
 520 EXPORT_SYMBOL(vdma_set_addr);
 521
 522 /*
 523  * Set Transfer Count
 524  */
 525 void vdma_set_count(int channel, int count)
 526 {
 527         if (vdma_debug)
 528                 printk("vdma_set_count: channel %d, count %08x\n", channel,
 529                        (unsigned) count);
 530
 531         r4030_write_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5), count);
 532 }
 533
 534 EXPORT_SYMBOL(vdma_set_count);
 535
 536 /*
 537  * Get Residual
 538  */
 539 int vdma_get_residue(int channel)
 540 {
 541         int residual;
 542
 543         residual = r4030_read_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5));
 544
 545         if (vdma_debug)
 546                 printk("vdma_get_residual: channel %d: residual=%d\n",
 547                        channel, residual);
 548
 549         return residual;
 550 }
 551
 552 /*
 553  * Get DMA channel enable register
 554  */
 555 int vdma_get_enable(int channel)
 556 {
 557         int enable;
 558
 559         enable = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
 560
 561         if (vdma_debug)
 562                 printk("vdma_get_enable: channel %d: enable=%d\n", channel,
 563                        enable);
 564
 565         return enable;
 566 }