arch/mips/include/asm/tlb.h

   1 #ifndef __ASM_TLB_H
   2 #define __ASM_TLB_H
   3
   4 /*
   5  * MIPS doesn't need any special per-pte or per-vma handling, except
   6  * we need to flush cache for area to be unmapped.
   7  */
   8 #define tlb_start_vma(tlb, vma)                                 \
   9         do {                                                    \
  10                 if (!tlb->fullmm)                               \
  11                         flush_cache_range(vma, vma->vm_start, vma->vm_end); \
  12         }  while (0)
  13 #define tlb_end_vma(tlb, vma) do { } while (0)
  14 #define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
  15
  16 /*
  17  * .. because we flush the whole mm when it fills up.
  18  */
  19 #define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
  20
  21 #include <asm-generic/tlb.h>
  22
  23 #endif /* __ASM_TLB_H */