MIPS: Whitespace cleanup.
[linux-drm-fsl-dcu.git] / arch / mips / include / asm / octeon / cvmx-pip-defs.h
1 /***********************license start***************
2  * Author: Cavium Networks
3  *
4  * Contact: support@caviumnetworks.com
5  * This file is part of the OCTEON SDK
6  *
7  * Copyright (c) 2003-2012 Cavium Networks
8  *
9  * This file is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License, Version 2, as
11  * published by the Free Software Foundation.
12  *
13  * This file is distributed in the hope that it will be useful, but
14  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16  * NONINFRINGEMENT.  See the GNU General Public License for more
17  * details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this file; if not, write to the Free Software
21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22  * or visit http://www.gnu.org/licenses/.
23  *
24  * This file may also be available under a different license from Cavium.
25  * Contact Cavium Networks for more information
26  ***********************license end**************************************/
27
28 #ifndef __CVMX_PIP_DEFS_H__
29 #define __CVMX_PIP_DEFS_H__
30
31 /*
32  * Enumeration representing the amount of packet processing
33  * and validation performed by the input hardware.
34  */
35 enum cvmx_pip_port_parse_mode {
36         /*
37          * Packet input doesn't perform any processing of the input
38          * packet.
39          */
40         CVMX_PIP_PORT_CFG_MODE_NONE = 0ull,
41         /*
42          * Full packet processing is performed with pointer starting
43          * at the L2 (ethernet MAC) header.
44          */
45         CVMX_PIP_PORT_CFG_MODE_SKIPL2 = 1ull,
46         /*
47          * Input packets are assumed to be IP.  Results from non IP
48          * packets is undefined. Pointers reference the beginning of
49          * the IP header.
50          */
51         CVMX_PIP_PORT_CFG_MODE_SKIPIP = 2ull
52 };
53
54 #define CVMX_PIP_ALT_SKIP_CFGX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002A00ull) + ((offset) & 3) * 8)
55 #define CVMX_PIP_BCK_PRS (CVMX_ADD_IO_SEG(0x00011800A0000038ull))
56 #define CVMX_PIP_BIST_STATUS (CVMX_ADD_IO_SEG(0x00011800A0000000ull))
57 #define CVMX_PIP_BSEL_EXT_CFGX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002800ull) + ((offset) & 3) * 16)
58 #define CVMX_PIP_BSEL_EXT_POSX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002808ull) + ((offset) & 3) * 16)
59 #define CVMX_PIP_BSEL_TBL_ENTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0003000ull) + ((offset) & 511) * 8)
60 #define CVMX_PIP_CLKEN (CVMX_ADD_IO_SEG(0x00011800A0000040ull))
61 #define CVMX_PIP_CRC_CTLX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000040ull) + ((offset) & 1) * 8)
62 #define CVMX_PIP_CRC_IVX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000050ull) + ((offset) & 1) * 8)
63 #define CVMX_PIP_DEC_IPSECX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000080ull) + ((offset) & 3) * 8)
64 #define CVMX_PIP_DSA_SRC_GRP (CVMX_ADD_IO_SEG(0x00011800A0000190ull))
65 #define CVMX_PIP_DSA_VID_GRP (CVMX_ADD_IO_SEG(0x00011800A0000198ull))
66 #define CVMX_PIP_FRM_LEN_CHKX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000180ull) + ((offset) & 1) * 8)
67 #define CVMX_PIP_GBL_CFG (CVMX_ADD_IO_SEG(0x00011800A0000028ull))
68 #define CVMX_PIP_GBL_CTL (CVMX_ADD_IO_SEG(0x00011800A0000020ull))
69 #define CVMX_PIP_HG_PRI_QOS (CVMX_ADD_IO_SEG(0x00011800A00001A0ull))
70 #define CVMX_PIP_INT_EN (CVMX_ADD_IO_SEG(0x00011800A0000010ull))
71 #define CVMX_PIP_INT_REG (CVMX_ADD_IO_SEG(0x00011800A0000008ull))
72 #define CVMX_PIP_IP_OFFSET (CVMX_ADD_IO_SEG(0x00011800A0000060ull))
73 #define CVMX_PIP_PRI_TBLX(offset) (CVMX_ADD_IO_SEG(0x00011800A0004000ull) + ((offset) & 255) * 8)
74 #define CVMX_PIP_PRT_CFGBX(offset) (CVMX_ADD_IO_SEG(0x00011800A0008000ull) + ((offset) & 63) * 8)
75 #define CVMX_PIP_PRT_CFGX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000200ull) + ((offset) & 63) * 8)
76 #define CVMX_PIP_PRT_TAGX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000400ull) + ((offset) & 63) * 8)
77 #define CVMX_PIP_QOS_DIFFX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000600ull) + ((offset) & 63) * 8)
78 #define CVMX_PIP_QOS_VLANX(offset) (CVMX_ADD_IO_SEG(0x00011800A00000C0ull) + ((offset) & 7) * 8)
79 #define CVMX_PIP_QOS_WATCHX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000100ull) + ((offset) & 7) * 8)
80 #define CVMX_PIP_RAW_WORD (CVMX_ADD_IO_SEG(0x00011800A00000B0ull))
81 #define CVMX_PIP_SFT_RST (CVMX_ADD_IO_SEG(0x00011800A0000030ull))
82 #define CVMX_PIP_STAT0_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000800ull) + ((offset) & 63) * 80)
83 #define CVMX_PIP_STAT0_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040000ull) + ((offset) & 63) * 128)
84 #define CVMX_PIP_STAT10_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0001480ull) + ((offset) & 63) * 16)
85 #define CVMX_PIP_STAT10_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040050ull) + ((offset) & 63) * 128)
86 #define CVMX_PIP_STAT11_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0001488ull) + ((offset) & 63) * 16)
87 #define CVMX_PIP_STAT11_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040058ull) + ((offset) & 63) * 128)
88 #define CVMX_PIP_STAT1_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000808ull) + ((offset) & 63) * 80)
89 #define CVMX_PIP_STAT1_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040008ull) + ((offset) & 63) * 128)
90 #define CVMX_PIP_STAT2_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000810ull) + ((offset) & 63) * 80)
91 #define CVMX_PIP_STAT2_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040010ull) + ((offset) & 63) * 128)
92 #define CVMX_PIP_STAT3_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000818ull) + ((offset) & 63) * 80)
93 #define CVMX_PIP_STAT3_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040018ull) + ((offset) & 63) * 128)
94 #define CVMX_PIP_STAT4_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000820ull) + ((offset) & 63) * 80)
95 #define CVMX_PIP_STAT4_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040020ull) + ((offset) & 63) * 128)
96 #define CVMX_PIP_STAT5_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000828ull) + ((offset) & 63) * 80)
97 #define CVMX_PIP_STAT5_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040028ull) + ((offset) & 63) * 128)
98 #define CVMX_PIP_STAT6_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000830ull) + ((offset) & 63) * 80)
99 #define CVMX_PIP_STAT6_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040030ull) + ((offset) & 63) * 128)
100 #define CVMX_PIP_STAT7_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000838ull) + ((offset) & 63) * 80)
101 #define CVMX_PIP_STAT7_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040038ull) + ((offset) & 63) * 128)
102 #define CVMX_PIP_STAT8_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000840ull) + ((offset) & 63) * 80)
103 #define CVMX_PIP_STAT8_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040040ull) + ((offset) & 63) * 128)
104 #define CVMX_PIP_STAT9_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0000848ull) + ((offset) & 63) * 80)
105 #define CVMX_PIP_STAT9_X(offset) (CVMX_ADD_IO_SEG(0x00011800A0040048ull) + ((offset) & 63) * 128)
106 #define CVMX_PIP_STAT_CTL (CVMX_ADD_IO_SEG(0x00011800A0000018ull))
107 #define CVMX_PIP_STAT_INB_ERRSX(offset) (CVMX_ADD_IO_SEG(0x00011800A0001A10ull) + ((offset) & 63) * 32)
108 #define CVMX_PIP_STAT_INB_ERRS_PKNDX(offset) (CVMX_ADD_IO_SEG(0x00011800A0020010ull) + ((offset) & 63) * 32)
109 #define CVMX_PIP_STAT_INB_OCTSX(offset) (CVMX_ADD_IO_SEG(0x00011800A0001A08ull) + ((offset) & 63) * 32)
110 #define CVMX_PIP_STAT_INB_OCTS_PKNDX(offset) (CVMX_ADD_IO_SEG(0x00011800A0020008ull) + ((offset) & 63) * 32)
111 #define CVMX_PIP_STAT_INB_PKTSX(offset) (CVMX_ADD_IO_SEG(0x00011800A0001A00ull) + ((offset) & 63) * 32)
112 #define CVMX_PIP_STAT_INB_PKTS_PKNDX(offset) (CVMX_ADD_IO_SEG(0x00011800A0020000ull) + ((offset) & 63) * 32)
113 #define CVMX_PIP_SUB_PKIND_FCSX(block_id) (CVMX_ADD_IO_SEG(0x00011800A0080000ull))
114 #define CVMX_PIP_TAG_INCX(offset) (CVMX_ADD_IO_SEG(0x00011800A0001800ull) + ((offset) & 63) * 8)
115 #define CVMX_PIP_TAG_MASK (CVMX_ADD_IO_SEG(0x00011800A0000070ull))
116 #define CVMX_PIP_TAG_SECRET (CVMX_ADD_IO_SEG(0x00011800A0000068ull))
117 #define CVMX_PIP_TODO_ENTRY (CVMX_ADD_IO_SEG(0x00011800A0000078ull))
118 #define CVMX_PIP_VLAN_ETYPESX(offset) (CVMX_ADD_IO_SEG(0x00011800A00001C0ull) + ((offset) & 1) * 8)
119 #define CVMX_PIP_XSTAT0_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002000ull) + ((offset) & 63) * 80 - 80*40)
120 #define CVMX_PIP_XSTAT10_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0001700ull) + ((offset) & 63) * 16 - 16*40)
121 #define CVMX_PIP_XSTAT11_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0001708ull) + ((offset) & 63) * 16 - 16*40)
122 #define CVMX_PIP_XSTAT1_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002008ull) + ((offset) & 63) * 80 - 80*40)
123 #define CVMX_PIP_XSTAT2_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002010ull) + ((offset) & 63) * 80 - 80*40)
124 #define CVMX_PIP_XSTAT3_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002018ull) + ((offset) & 63) * 80 - 80*40)
125 #define CVMX_PIP_XSTAT4_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002020ull) + ((offset) & 63) * 80 - 80*40)
126 #define CVMX_PIP_XSTAT5_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002028ull) + ((offset) & 63) * 80 - 80*40)
127 #define CVMX_PIP_XSTAT6_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002030ull) + ((offset) & 63) * 80 - 80*40)
128 #define CVMX_PIP_XSTAT7_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002038ull) + ((offset) & 63) * 80 - 80*40)
129 #define CVMX_PIP_XSTAT8_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002040ull) + ((offset) & 63) * 80 - 80*40)
130 #define CVMX_PIP_XSTAT9_PRTX(offset) (CVMX_ADD_IO_SEG(0x00011800A0002048ull) + ((offset) & 63) * 80 - 80*40)
131
132 union cvmx_pip_alt_skip_cfgx {
133         uint64_t u64;
134         struct cvmx_pip_alt_skip_cfgx_s {
135 #ifdef __BIG_ENDIAN_BITFIELD
136                 uint64_t reserved_57_63:7;
137                 uint64_t len:1;
138                 uint64_t reserved_46_55:10;
139                 uint64_t bit1:6;
140                 uint64_t reserved_38_39:2;
141                 uint64_t bit0:6;
142                 uint64_t reserved_23_31:9;
143                 uint64_t skip3:7;
144                 uint64_t reserved_15_15:1;
145                 uint64_t skip2:7;
146                 uint64_t reserved_7_7:1;
147                 uint64_t skip1:7;
148 #else
149                 uint64_t skip1:7;
150                 uint64_t reserved_7_7:1;
151                 uint64_t skip2:7;
152                 uint64_t reserved_15_15:1;
153                 uint64_t skip3:7;
154                 uint64_t reserved_23_31:9;
155                 uint64_t bit0:6;
156                 uint64_t reserved_38_39:2;
157                 uint64_t bit1:6;
158                 uint64_t reserved_46_55:10;
159                 uint64_t len:1;
160                 uint64_t reserved_57_63:7;
161 #endif
162         } s;
163         struct cvmx_pip_alt_skip_cfgx_s cn61xx;
164         struct cvmx_pip_alt_skip_cfgx_s cn66xx;
165         struct cvmx_pip_alt_skip_cfgx_s cn68xx;
166         struct cvmx_pip_alt_skip_cfgx_s cnf71xx;
167 };
168
169 union cvmx_pip_bck_prs {
170         uint64_t u64;
171         struct cvmx_pip_bck_prs_s {
172 #ifdef __BIG_ENDIAN_BITFIELD
173                 uint64_t bckprs:1;
174                 uint64_t reserved_13_62:50;
175                 uint64_t hiwater:5;
176                 uint64_t reserved_5_7:3;
177                 uint64_t lowater:5;
178 #else
179                 uint64_t lowater:5;
180                 uint64_t reserved_5_7:3;
181                 uint64_t hiwater:5;
182                 uint64_t reserved_13_62:50;
183                 uint64_t bckprs:1;
184 #endif
185         } s;
186         struct cvmx_pip_bck_prs_s cn38xx;
187         struct cvmx_pip_bck_prs_s cn38xxp2;
188         struct cvmx_pip_bck_prs_s cn56xx;
189         struct cvmx_pip_bck_prs_s cn56xxp1;
190         struct cvmx_pip_bck_prs_s cn58xx;
191         struct cvmx_pip_bck_prs_s cn58xxp1;
192         struct cvmx_pip_bck_prs_s cn61xx;
193         struct cvmx_pip_bck_prs_s cn63xx;
194         struct cvmx_pip_bck_prs_s cn63xxp1;
195         struct cvmx_pip_bck_prs_s cn66xx;
196         struct cvmx_pip_bck_prs_s cn68xx;
197         struct cvmx_pip_bck_prs_s cn68xxp1;
198         struct cvmx_pip_bck_prs_s cnf71xx;
199 };
200
201 union cvmx_pip_bist_status {
202         uint64_t u64;
203         struct cvmx_pip_bist_status_s {
204 #ifdef __BIG_ENDIAN_BITFIELD
205                 uint64_t reserved_22_63:42;
206                 uint64_t bist:22;
207 #else
208                 uint64_t bist:22;
209                 uint64_t reserved_22_63:42;
210 #endif
211         } s;
212         struct cvmx_pip_bist_status_cn30xx {
213 #ifdef __BIG_ENDIAN_BITFIELD
214                 uint64_t reserved_18_63:46;
215                 uint64_t bist:18;
216 #else
217                 uint64_t bist:18;
218                 uint64_t reserved_18_63:46;
219 #endif
220         } cn30xx;
221         struct cvmx_pip_bist_status_cn30xx cn31xx;
222         struct cvmx_pip_bist_status_cn30xx cn38xx;
223         struct cvmx_pip_bist_status_cn30xx cn38xxp2;
224         struct cvmx_pip_bist_status_cn50xx {
225 #ifdef __BIG_ENDIAN_BITFIELD
226                 uint64_t reserved_17_63:47;
227                 uint64_t bist:17;
228 #else
229                 uint64_t bist:17;
230                 uint64_t reserved_17_63:47;
231 #endif
232         } cn50xx;
233         struct cvmx_pip_bist_status_cn30xx cn52xx;
234         struct cvmx_pip_bist_status_cn30xx cn52xxp1;
235         struct cvmx_pip_bist_status_cn30xx cn56xx;
236         struct cvmx_pip_bist_status_cn30xx cn56xxp1;
237         struct cvmx_pip_bist_status_cn30xx cn58xx;
238         struct cvmx_pip_bist_status_cn30xx cn58xxp1;
239         struct cvmx_pip_bist_status_cn61xx {
240 #ifdef __BIG_ENDIAN_BITFIELD
241                 uint64_t reserved_20_63:44;
242                 uint64_t bist:20;
243 #else
244                 uint64_t bist:20;
245                 uint64_t reserved_20_63:44;
246 #endif
247         } cn61xx;
248         struct cvmx_pip_bist_status_cn30xx cn63xx;
249         struct cvmx_pip_bist_status_cn30xx cn63xxp1;
250         struct cvmx_pip_bist_status_cn61xx cn66xx;
251         struct cvmx_pip_bist_status_s cn68xx;
252         struct cvmx_pip_bist_status_cn61xx cn68xxp1;
253         struct cvmx_pip_bist_status_cn61xx cnf71xx;
254 };
255
256 union cvmx_pip_bsel_ext_cfgx {
257         uint64_t u64;
258         struct cvmx_pip_bsel_ext_cfgx_s {
259 #ifdef __BIG_ENDIAN_BITFIELD
260                 uint64_t reserved_56_63:8;
261                 uint64_t upper_tag:16;
262                 uint64_t tag:8;
263                 uint64_t reserved_25_31:7;
264                 uint64_t offset:9;
265                 uint64_t reserved_7_15:9;
266                 uint64_t skip:7;
267 #else
268                 uint64_t skip:7;
269                 uint64_t reserved_7_15:9;
270                 uint64_t offset:9;
271                 uint64_t reserved_25_31:7;
272                 uint64_t tag:8;
273                 uint64_t upper_tag:16;
274                 uint64_t reserved_56_63:8;
275 #endif
276         } s;
277         struct cvmx_pip_bsel_ext_cfgx_s cn61xx;
278         struct cvmx_pip_bsel_ext_cfgx_s cn68xx;
279         struct cvmx_pip_bsel_ext_cfgx_s cnf71xx;
280 };
281
282 union cvmx_pip_bsel_ext_posx {
283         uint64_t u64;
284         struct cvmx_pip_bsel_ext_posx_s {
285 #ifdef __BIG_ENDIAN_BITFIELD
286                 uint64_t pos7_val:1;
287                 uint64_t pos7:7;
288                 uint64_t pos6_val:1;
289                 uint64_t pos6:7;
290                 uint64_t pos5_val:1;
291                 uint64_t pos5:7;
292                 uint64_t pos4_val:1;
293                 uint64_t pos4:7;
294                 uint64_t pos3_val:1;
295                 uint64_t pos3:7;
296                 uint64_t pos2_val:1;
297                 uint64_t pos2:7;
298                 uint64_t pos1_val:1;
299                 uint64_t pos1:7;
300                 uint64_t pos0_val:1;
301                 uint64_t pos0:7;
302 #else
303                 uint64_t pos0:7;
304                 uint64_t pos0_val:1;
305                 uint64_t pos1:7;
306                 uint64_t pos1_val:1;
307                 uint64_t pos2:7;
308                 uint64_t pos2_val:1;
309                 uint64_t pos3:7;
310                 uint64_t pos3_val:1;
311                 uint64_t pos4:7;
312                 uint64_t pos4_val:1;
313                 uint64_t pos5:7;
314                 uint64_t pos5_val:1;
315                 uint64_t pos6:7;
316                 uint64_t pos6_val:1;
317                 uint64_t pos7:7;
318                 uint64_t pos7_val:1;
319 #endif
320         } s;
321         struct cvmx_pip_bsel_ext_posx_s cn61xx;
322         struct cvmx_pip_bsel_ext_posx_s cn68xx;
323         struct cvmx_pip_bsel_ext_posx_s cnf71xx;
324 };
325
326 union cvmx_pip_bsel_tbl_entx {
327         uint64_t u64;
328         struct cvmx_pip_bsel_tbl_entx_s {
329 #ifdef __BIG_ENDIAN_BITFIELD
330                 uint64_t tag_en:1;
331                 uint64_t grp_en:1;
332                 uint64_t tt_en:1;
333                 uint64_t qos_en:1;
334                 uint64_t reserved_40_59:20;
335                 uint64_t tag:8;
336                 uint64_t reserved_22_31:10;
337                 uint64_t grp:6;
338                 uint64_t reserved_10_15:6;
339                 uint64_t tt:2;
340                 uint64_t reserved_3_7:5;
341                 uint64_t qos:3;
342 #else
343                 uint64_t qos:3;
344                 uint64_t reserved_3_7:5;
345                 uint64_t tt:2;
346                 uint64_t reserved_10_15:6;
347                 uint64_t grp:6;
348                 uint64_t reserved_22_31:10;
349                 uint64_t tag:8;
350                 uint64_t reserved_40_59:20;
351                 uint64_t qos_en:1;
352                 uint64_t tt_en:1;
353                 uint64_t grp_en:1;
354                 uint64_t tag_en:1;
355 #endif
356         } s;
357         struct cvmx_pip_bsel_tbl_entx_cn61xx {
358 #ifdef __BIG_ENDIAN_BITFIELD
359                 uint64_t tag_en:1;
360                 uint64_t grp_en:1;
361                 uint64_t tt_en:1;
362                 uint64_t qos_en:1;
363                 uint64_t reserved_40_59:20;
364                 uint64_t tag:8;
365                 uint64_t reserved_20_31:12;
366                 uint64_t grp:4;
367                 uint64_t reserved_10_15:6;
368                 uint64_t tt:2;
369                 uint64_t reserved_3_7:5;
370                 uint64_t qos:3;
371 #else
372                 uint64_t qos:3;
373                 uint64_t reserved_3_7:5;
374                 uint64_t tt:2;
375                 uint64_t reserved_10_15:6;
376                 uint64_t grp:4;
377                 uint64_t reserved_20_31:12;
378                 uint64_t tag:8;
379                 uint64_t reserved_40_59:20;
380                 uint64_t qos_en:1;
381                 uint64_t tt_en:1;
382                 uint64_t grp_en:1;
383                 uint64_t tag_en:1;
384 #endif
385         } cn61xx;
386         struct cvmx_pip_bsel_tbl_entx_s cn68xx;
387         struct cvmx_pip_bsel_tbl_entx_cn61xx cnf71xx;
388 };
389
390 union cvmx_pip_clken {
391         uint64_t u64;
392         struct cvmx_pip_clken_s {
393 #ifdef __BIG_ENDIAN_BITFIELD
394                 uint64_t reserved_1_63:63;
395                 uint64_t clken:1;
396 #else
397                 uint64_t clken:1;
398                 uint64_t reserved_1_63:63;
399 #endif
400         } s;
401         struct cvmx_pip_clken_s cn61xx;
402         struct cvmx_pip_clken_s cn63xx;
403         struct cvmx_pip_clken_s cn63xxp1;
404         struct cvmx_pip_clken_s cn66xx;
405         struct cvmx_pip_clken_s cn68xx;
406         struct cvmx_pip_clken_s cn68xxp1;
407         struct cvmx_pip_clken_s cnf71xx;
408 };
409
410 union cvmx_pip_crc_ctlx {
411         uint64_t u64;
412         struct cvmx_pip_crc_ctlx_s {
413 #ifdef __BIG_ENDIAN_BITFIELD
414                 uint64_t reserved_2_63:62;
415                 uint64_t invres:1;
416                 uint64_t reflect:1;
417 #else
418                 uint64_t reflect:1;
419                 uint64_t invres:1;
420                 uint64_t reserved_2_63:62;
421 #endif
422         } s;
423         struct cvmx_pip_crc_ctlx_s cn38xx;
424         struct cvmx_pip_crc_ctlx_s cn38xxp2;
425         struct cvmx_pip_crc_ctlx_s cn58xx;
426         struct cvmx_pip_crc_ctlx_s cn58xxp1;
427 };
428
429 union cvmx_pip_crc_ivx {
430         uint64_t u64;
431         struct cvmx_pip_crc_ivx_s {
432 #ifdef __BIG_ENDIAN_BITFIELD
433                 uint64_t reserved_32_63:32;
434                 uint64_t iv:32;
435 #else
436                 uint64_t iv:32;
437                 uint64_t reserved_32_63:32;
438 #endif
439         } s;
440         struct cvmx_pip_crc_ivx_s cn38xx;
441         struct cvmx_pip_crc_ivx_s cn38xxp2;
442         struct cvmx_pip_crc_ivx_s cn58xx;
443         struct cvmx_pip_crc_ivx_s cn58xxp1;
444 };
445
446 union cvmx_pip_dec_ipsecx {
447         uint64_t u64;
448         struct cvmx_pip_dec_ipsecx_s {
449 #ifdef __BIG_ENDIAN_BITFIELD
450                 uint64_t reserved_18_63:46;
451                 uint64_t tcp:1;
452                 uint64_t udp:1;
453                 uint64_t dprt:16;
454 #else
455                 uint64_t dprt:16;
456                 uint64_t udp:1;
457                 uint64_t tcp:1;
458                 uint64_t reserved_18_63:46;
459 #endif
460         } s;
461         struct cvmx_pip_dec_ipsecx_s cn30xx;
462         struct cvmx_pip_dec_ipsecx_s cn31xx;
463         struct cvmx_pip_dec_ipsecx_s cn38xx;
464         struct cvmx_pip_dec_ipsecx_s cn38xxp2;
465         struct cvmx_pip_dec_ipsecx_s cn50xx;
466         struct cvmx_pip_dec_ipsecx_s cn52xx;
467         struct cvmx_pip_dec_ipsecx_s cn52xxp1;
468         struct cvmx_pip_dec_ipsecx_s cn56xx;
469         struct cvmx_pip_dec_ipsecx_s cn56xxp1;
470         struct cvmx_pip_dec_ipsecx_s cn58xx;
471         struct cvmx_pip_dec_ipsecx_s cn58xxp1;
472         struct cvmx_pip_dec_ipsecx_s cn61xx;
473         struct cvmx_pip_dec_ipsecx_s cn63xx;
474         struct cvmx_pip_dec_ipsecx_s cn63xxp1;
475         struct cvmx_pip_dec_ipsecx_s cn66xx;
476         struct cvmx_pip_dec_ipsecx_s cn68xx;
477         struct cvmx_pip_dec_ipsecx_s cn68xxp1;
478         struct cvmx_pip_dec_ipsecx_s cnf71xx;
479 };
480
481 union cvmx_pip_dsa_src_grp {
482         uint64_t u64;
483         struct cvmx_pip_dsa_src_grp_s {
484 #ifdef __BIG_ENDIAN_BITFIELD
485                 uint64_t map15:4;
486                 uint64_t map14:4;
487                 uint64_t map13:4;
488                 uint64_t map12:4;
489                 uint64_t map11:4;
490                 uint64_t map10:4;
491                 uint64_t map9:4;
492                 uint64_t map8:4;
493                 uint64_t map7:4;
494                 uint64_t map6:4;
495                 uint64_t map5:4;
496                 uint64_t map4:4;
497                 uint64_t map3:4;
498                 uint64_t map2:4;
499                 uint64_t map1:4;
500                 uint64_t map0:4;
501 #else
502                 uint64_t map0:4;
503                 uint64_t map1:4;
504                 uint64_t map2:4;
505                 uint64_t map3:4;
506                 uint64_t map4:4;
507                 uint64_t map5:4;
508                 uint64_t map6:4;
509                 uint64_t map7:4;
510                 uint64_t map8:4;
511                 uint64_t map9:4;
512                 uint64_t map10:4;
513                 uint64_t map11:4;
514                 uint64_t map12:4;
515                 uint64_t map13:4;
516                 uint64_t map14:4;
517                 uint64_t map15:4;
518 #endif
519         } s;
520         struct cvmx_pip_dsa_src_grp_s cn52xx;
521         struct cvmx_pip_dsa_src_grp_s cn52xxp1;
522         struct cvmx_pip_dsa_src_grp_s cn56xx;
523         struct cvmx_pip_dsa_src_grp_s cn61xx;
524         struct cvmx_pip_dsa_src_grp_s cn63xx;
525         struct cvmx_pip_dsa_src_grp_s cn63xxp1;
526         struct cvmx_pip_dsa_src_grp_s cn66xx;
527         struct cvmx_pip_dsa_src_grp_s cn68xx;
528         struct cvmx_pip_dsa_src_grp_s cn68xxp1;
529         struct cvmx_pip_dsa_src_grp_s cnf71xx;
530 };
531
532 union cvmx_pip_dsa_vid_grp {
533         uint64_t u64;
534         struct cvmx_pip_dsa_vid_grp_s {
535 #ifdef __BIG_ENDIAN_BITFIELD
536                 uint64_t map15:4;
537                 uint64_t map14:4;
538                 uint64_t map13:4;
539                 uint64_t map12:4;
540                 uint64_t map11:4;
541                 uint64_t map10:4;
542                 uint64_t map9:4;
543                 uint64_t map8:4;
544                 uint64_t map7:4;
545                 uint64_t map6:4;
546                 uint64_t map5:4;
547                 uint64_t map4:4;
548                 uint64_t map3:4;
549                 uint64_t map2:4;
550                 uint64_t map1:4;
551                 uint64_t map0:4;
552 #else
553                 uint64_t map0:4;
554                 uint64_t map1:4;
555                 uint64_t map2:4;
556                 uint64_t map3:4;
557                 uint64_t map4:4;
558                 uint64_t map5:4;
559                 uint64_t map6:4;
560                 uint64_t map7:4;
561                 uint64_t map8:4;
562                 uint64_t map9:4;
563                 uint64_t map10:4;
564                 uint64_t map11:4;
565                 uint64_t map12:4;
566                 uint64_t map13:4;
567                 uint64_t map14:4;
568                 uint64_t map15:4;
569 #endif
570         } s;
571         struct cvmx_pip_dsa_vid_grp_s cn52xx;
572         struct cvmx_pip_dsa_vid_grp_s cn52xxp1;
573         struct cvmx_pip_dsa_vid_grp_s cn56xx;
574         struct cvmx_pip_dsa_vid_grp_s cn61xx;
575         struct cvmx_pip_dsa_vid_grp_s cn63xx;
576         struct cvmx_pip_dsa_vid_grp_s cn63xxp1;
577         struct cvmx_pip_dsa_vid_grp_s cn66xx;
578         struct cvmx_pip_dsa_vid_grp_s cn68xx;
579         struct cvmx_pip_dsa_vid_grp_s cn68xxp1;
580         struct cvmx_pip_dsa_vid_grp_s cnf71xx;
581 };
582
583 union cvmx_pip_frm_len_chkx {
584         uint64_t u64;
585         struct cvmx_pip_frm_len_chkx_s {
586 #ifdef __BIG_ENDIAN_BITFIELD
587                 uint64_t reserved_32_63:32;
588                 uint64_t maxlen:16;
589                 uint64_t minlen:16;
590 #else
591                 uint64_t minlen:16;
592                 uint64_t maxlen:16;
593                 uint64_t reserved_32_63:32;
594 #endif
595         } s;
596         struct cvmx_pip_frm_len_chkx_s cn50xx;
597         struct cvmx_pip_frm_len_chkx_s cn52xx;
598         struct cvmx_pip_frm_len_chkx_s cn52xxp1;
599         struct cvmx_pip_frm_len_chkx_s cn56xx;
600         struct cvmx_pip_frm_len_chkx_s cn56xxp1;
601         struct cvmx_pip_frm_len_chkx_s cn61xx;
602         struct cvmx_pip_frm_len_chkx_s cn63xx;
603         struct cvmx_pip_frm_len_chkx_s cn63xxp1;
604         struct cvmx_pip_frm_len_chkx_s cn66xx;
605         struct cvmx_pip_frm_len_chkx_s cn68xx;
606         struct cvmx_pip_frm_len_chkx_s cn68xxp1;
607         struct cvmx_pip_frm_len_chkx_s cnf71xx;
608 };
609
610 union cvmx_pip_gbl_cfg {
611         uint64_t u64;
612         struct cvmx_pip_gbl_cfg_s {
613 #ifdef __BIG_ENDIAN_BITFIELD
614                 uint64_t reserved_19_63:45;
615                 uint64_t tag_syn:1;
616                 uint64_t ip6_udp:1;
617                 uint64_t max_l2:1;
618                 uint64_t reserved_11_15:5;
619                 uint64_t raw_shf:3;
620                 uint64_t reserved_3_7:5;
621                 uint64_t nip_shf:3;
622 #else
623                 uint64_t nip_shf:3;
624                 uint64_t reserved_3_7:5;
625                 uint64_t raw_shf:3;
626                 uint64_t reserved_11_15:5;
627                 uint64_t max_l2:1;
628                 uint64_t ip6_udp:1;
629                 uint64_t tag_syn:1;
630                 uint64_t reserved_19_63:45;
631 #endif
632         } s;
633         struct cvmx_pip_gbl_cfg_s cn30xx;
634         struct cvmx_pip_gbl_cfg_s cn31xx;
635         struct cvmx_pip_gbl_cfg_s cn38xx;
636         struct cvmx_pip_gbl_cfg_s cn38xxp2;
637         struct cvmx_pip_gbl_cfg_s cn50xx;
638         struct cvmx_pip_gbl_cfg_s cn52xx;
639         struct cvmx_pip_gbl_cfg_s cn52xxp1;
640         struct cvmx_pip_gbl_cfg_s cn56xx;
641         struct cvmx_pip_gbl_cfg_s cn56xxp1;
642         struct cvmx_pip_gbl_cfg_s cn58xx;
643         struct cvmx_pip_gbl_cfg_s cn58xxp1;
644         struct cvmx_pip_gbl_cfg_s cn61xx;
645         struct cvmx_pip_gbl_cfg_s cn63xx;
646         struct cvmx_pip_gbl_cfg_s cn63xxp1;
647         struct cvmx_pip_gbl_cfg_s cn66xx;
648         struct cvmx_pip_gbl_cfg_s cn68xx;
649         struct cvmx_pip_gbl_cfg_s cn68xxp1;
650         struct cvmx_pip_gbl_cfg_s cnf71xx;
651 };
652
653 union cvmx_pip_gbl_ctl {
654         uint64_t u64;
655         struct cvmx_pip_gbl_ctl_s {
656 #ifdef __BIG_ENDIAN_BITFIELD
657                 uint64_t reserved_29_63:35;
658                 uint64_t egrp_dis:1;
659                 uint64_t ihmsk_dis:1;
660                 uint64_t dsa_grp_tvid:1;
661                 uint64_t dsa_grp_scmd:1;
662                 uint64_t dsa_grp_sid:1;
663                 uint64_t reserved_21_23:3;
664                 uint64_t ring_en:1;
665                 uint64_t reserved_17_19:3;
666                 uint64_t ignrs:1;
667                 uint64_t vs_wqe:1;
668                 uint64_t vs_qos:1;
669                 uint64_t l2_mal:1;
670                 uint64_t tcp_flag:1;
671                 uint64_t l4_len:1;
672                 uint64_t l4_chk:1;
673                 uint64_t l4_prt:1;
674                 uint64_t l4_mal:1;
675                 uint64_t reserved_6_7:2;
676                 uint64_t ip6_eext:2;
677                 uint64_t ip4_opts:1;
678                 uint64_t ip_hop:1;
679                 uint64_t ip_mal:1;
680                 uint64_t ip_chk:1;
681 #else
682                 uint64_t ip_chk:1;
683                 uint64_t ip_mal:1;
684                 uint64_t ip_hop:1;
685                 uint64_t ip4_opts:1;
686                 uint64_t ip6_eext:2;
687                 uint64_t reserved_6_7:2;
688                 uint64_t l4_mal:1;
689                 uint64_t l4_prt:1;
690                 uint64_t l4_chk:1;
691                 uint64_t l4_len:1;
692                 uint64_t tcp_flag:1;
693                 uint64_t l2_mal:1;
694                 uint64_t vs_qos:1;
695                 uint64_t vs_wqe:1;
696                 uint64_t ignrs:1;
697                 uint64_t reserved_17_19:3;
698                 uint64_t ring_en:1;
699                 uint64_t reserved_21_23:3;
700                 uint64_t dsa_grp_sid:1;
701                 uint64_t dsa_grp_scmd:1;
702                 uint64_t dsa_grp_tvid:1;
703                 uint64_t ihmsk_dis:1;
704                 uint64_t egrp_dis:1;
705                 uint64_t reserved_29_63:35;
706 #endif
707         } s;
708         struct cvmx_pip_gbl_ctl_cn30xx {
709 #ifdef __BIG_ENDIAN_BITFIELD
710                 uint64_t reserved_17_63:47;
711                 uint64_t ignrs:1;
712                 uint64_t vs_wqe:1;
713                 uint64_t vs_qos:1;
714                 uint64_t l2_mal:1;
715                 uint64_t tcp_flag:1;
716                 uint64_t l4_len:1;
717                 uint64_t l4_chk:1;
718                 uint64_t l4_prt:1;
719                 uint64_t l4_mal:1;
720                 uint64_t reserved_6_7:2;
721                 uint64_t ip6_eext:2;
722                 uint64_t ip4_opts:1;
723                 uint64_t ip_hop:1;
724                 uint64_t ip_mal:1;
725                 uint64_t ip_chk:1;
726 #else
727                 uint64_t ip_chk:1;
728                 uint64_t ip_mal:1;
729                 uint64_t ip_hop:1;
730                 uint64_t ip4_opts:1;
731                 uint64_t ip6_eext:2;
732                 uint64_t reserved_6_7:2;
733                 uint64_t l4_mal:1;
734                 uint64_t l4_prt:1;
735                 uint64_t l4_chk:1;
736                 uint64_t l4_len:1;
737                 uint64_t tcp_flag:1;
738                 uint64_t l2_mal:1;
739                 uint64_t vs_qos:1;
740                 uint64_t vs_wqe:1;
741                 uint64_t ignrs:1;
742                 uint64_t reserved_17_63:47;
743 #endif
744         } cn30xx;
745         struct cvmx_pip_gbl_ctl_cn30xx cn31xx;
746         struct cvmx_pip_gbl_ctl_cn30xx cn38xx;
747         struct cvmx_pip_gbl_ctl_cn30xx cn38xxp2;
748         struct cvmx_pip_gbl_ctl_cn30xx cn50xx;
749         struct cvmx_pip_gbl_ctl_cn52xx {
750 #ifdef __BIG_ENDIAN_BITFIELD
751                 uint64_t reserved_27_63:37;
752                 uint64_t dsa_grp_tvid:1;
753                 uint64_t dsa_grp_scmd:1;
754                 uint64_t dsa_grp_sid:1;
755                 uint64_t reserved_21_23:3;
756                 uint64_t ring_en:1;
757                 uint64_t reserved_17_19:3;
758                 uint64_t ignrs:1;
759                 uint64_t vs_wqe:1;
760                 uint64_t vs_qos:1;
761                 uint64_t l2_mal:1;
762                 uint64_t tcp_flag:1;
763                 uint64_t l4_len:1;
764                 uint64_t l4_chk:1;
765                 uint64_t l4_prt:1;
766                 uint64_t l4_mal:1;
767                 uint64_t reserved_6_7:2;
768                 uint64_t ip6_eext:2;
769                 uint64_t ip4_opts:1;
770                 uint64_t ip_hop:1;
771                 uint64_t ip_mal:1;
772                 uint64_t ip_chk:1;
773 #else
774                 uint64_t ip_chk:1;
775                 uint64_t ip_mal:1;
776                 uint64_t ip_hop:1;
777                 uint64_t ip4_opts:1;
778                 uint64_t ip6_eext:2;
779                 uint64_t reserved_6_7:2;
780                 uint64_t l4_mal:1;
781                 uint64_t l4_prt:1;
782                 uint64_t l4_chk:1;
783                 uint64_t l4_len:1;
784                 uint64_t tcp_flag:1;
785                 uint64_t l2_mal:1;
786                 uint64_t vs_qos:1;
787                 uint64_t vs_wqe:1;
788                 uint64_t ignrs:1;
789                 uint64_t reserved_17_19:3;
790                 uint64_t ring_en:1;
791                 uint64_t reserved_21_23:3;
792                 uint64_t dsa_grp_sid:1;
793                 uint64_t dsa_grp_scmd:1;
794                 uint64_t dsa_grp_tvid:1;
795                 uint64_t reserved_27_63:37;
796 #endif
797         } cn52xx;
798         struct cvmx_pip_gbl_ctl_cn52xx cn52xxp1;
799         struct cvmx_pip_gbl_ctl_cn52xx cn56xx;
800         struct cvmx_pip_gbl_ctl_cn56xxp1 {
801 #ifdef __BIG_ENDIAN_BITFIELD
802                 uint64_t reserved_21_63:43;
803                 uint64_t ring_en:1;
804                 uint64_t reserved_17_19:3;
805                 uint64_t ignrs:1;
806                 uint64_t vs_wqe:1;
807                 uint64_t vs_qos:1;
808                 uint64_t l2_mal:1;
809                 uint64_t tcp_flag:1;
810                 uint64_t l4_len:1;
811                 uint64_t l4_chk:1;
812                 uint64_t l4_prt:1;
813                 uint64_t l4_mal:1;
814                 uint64_t reserved_6_7:2;
815                 uint64_t ip6_eext:2;
816                 uint64_t ip4_opts:1;
817                 uint64_t ip_hop:1;
818                 uint64_t ip_mal:1;
819                 uint64_t ip_chk:1;
820 #else
821                 uint64_t ip_chk:1;
822                 uint64_t ip_mal:1;
823                 uint64_t ip_hop:1;
824                 uint64_t ip4_opts:1;
825                 uint64_t ip6_eext:2;
826                 uint64_t reserved_6_7:2;
827                 uint64_t l4_mal:1;
828                 uint64_t l4_prt:1;
829                 uint64_t l4_chk:1;
830                 uint64_t l4_len:1;
831                 uint64_t tcp_flag:1;
832                 uint64_t l2_mal:1;
833                 uint64_t vs_qos:1;
834                 uint64_t vs_wqe:1;
835                 uint64_t ignrs:1;
836                 uint64_t reserved_17_19:3;
837                 uint64_t ring_en:1;
838                 uint64_t reserved_21_63:43;
839 #endif
840         } cn56xxp1;
841         struct cvmx_pip_gbl_ctl_cn30xx cn58xx;
842         struct cvmx_pip_gbl_ctl_cn30xx cn58xxp1;
843         struct cvmx_pip_gbl_ctl_cn61xx {
844 #ifdef __BIG_ENDIAN_BITFIELD
845                 uint64_t reserved_28_63:36;
846                 uint64_t ihmsk_dis:1;
847                 uint64_t dsa_grp_tvid:1;
848                 uint64_t dsa_grp_scmd:1;
849                 uint64_t dsa_grp_sid:1;
850                 uint64_t reserved_21_23:3;
851                 uint64_t ring_en:1;
852                 uint64_t reserved_17_19:3;
853                 uint64_t ignrs:1;
854                 uint64_t vs_wqe:1;
855                 uint64_t vs_qos:1;
856                 uint64_t l2_mal:1;
857                 uint64_t tcp_flag:1;
858                 uint64_t l4_len:1;
859                 uint64_t l4_chk:1;
860                 uint64_t l4_prt:1;
861                 uint64_t l4_mal:1;
862                 uint64_t reserved_6_7:2;
863                 uint64_t ip6_eext:2;
864                 uint64_t ip4_opts:1;
865                 uint64_t ip_hop:1;
866                 uint64_t ip_mal:1;
867                 uint64_t ip_chk:1;
868 #else
869                 uint64_t ip_chk:1;
870                 uint64_t ip_mal:1;
871                 uint64_t ip_hop:1;
872                 uint64_t ip4_opts:1;
873                 uint64_t ip6_eext:2;
874                 uint64_t reserved_6_7:2;
875                 uint64_t l4_mal:1;
876                 uint64_t l4_prt:1;
877                 uint64_t l4_chk:1;
878                 uint64_t l4_len:1;
879                 uint64_t tcp_flag:1;
880                 uint64_t l2_mal:1;
881                 uint64_t vs_qos:1;
882                 uint64_t vs_wqe:1;
883                 uint64_t ignrs:1;
884                 uint64_t reserved_17_19:3;
885                 uint64_t ring_en:1;
886                 uint64_t reserved_21_23:3;
887                 uint64_t dsa_grp_sid:1;
888                 uint64_t dsa_grp_scmd:1;
889                 uint64_t dsa_grp_tvid:1;
890                 uint64_t ihmsk_dis:1;
891                 uint64_t reserved_28_63:36;
892 #endif
893         } cn61xx;
894         struct cvmx_pip_gbl_ctl_cn61xx cn63xx;
895         struct cvmx_pip_gbl_ctl_cn61xx cn63xxp1;
896         struct cvmx_pip_gbl_ctl_cn61xx cn66xx;
897         struct cvmx_pip_gbl_ctl_cn68xx {
898 #ifdef __BIG_ENDIAN_BITFIELD
899                 uint64_t reserved_29_63:35;
900                 uint64_t egrp_dis:1;
901                 uint64_t ihmsk_dis:1;
902                 uint64_t dsa_grp_tvid:1;
903                 uint64_t dsa_grp_scmd:1;
904                 uint64_t dsa_grp_sid:1;
905                 uint64_t reserved_17_23:7;
906                 uint64_t ignrs:1;
907                 uint64_t vs_wqe:1;
908                 uint64_t vs_qos:1;
909                 uint64_t l2_mal:1;
910                 uint64_t tcp_flag:1;
911                 uint64_t l4_len:1;
912                 uint64_t l4_chk:1;
913                 uint64_t l4_prt:1;
914                 uint64_t l4_mal:1;
915                 uint64_t reserved_6_7:2;
916                 uint64_t ip6_eext:2;
917                 uint64_t ip4_opts:1;
918                 uint64_t ip_hop:1;
919                 uint64_t ip_mal:1;
920                 uint64_t ip_chk:1;
921 #else
922                 uint64_t ip_chk:1;
923                 uint64_t ip_mal:1;
924                 uint64_t ip_hop:1;
925                 uint64_t ip4_opts:1;
926                 uint64_t ip6_eext:2;
927                 uint64_t reserved_6_7:2;
928                 uint64_t l4_mal:1;
929                 uint64_t l4_prt:1;
930                 uint64_t l4_chk:1;
931                 uint64_t l4_len:1;
932                 uint64_t tcp_flag:1;
933                 uint64_t l2_mal:1;
934                 uint64_t vs_qos:1;
935                 uint64_t vs_wqe:1;
936                 uint64_t ignrs:1;
937                 uint64_t reserved_17_23:7;
938                 uint64_t dsa_grp_sid:1;
939                 uint64_t dsa_grp_scmd:1;
940                 uint64_t dsa_grp_tvid:1;
941                 uint64_t ihmsk_dis:1;
942                 uint64_t egrp_dis:1;
943                 uint64_t reserved_29_63:35;
944 #endif
945         } cn68xx;
946         struct cvmx_pip_gbl_ctl_cn68xxp1 {
947 #ifdef __BIG_ENDIAN_BITFIELD
948                 uint64_t reserved_28_63:36;
949                 uint64_t ihmsk_dis:1;
950                 uint64_t dsa_grp_tvid:1;
951                 uint64_t dsa_grp_scmd:1;
952                 uint64_t dsa_grp_sid:1;
953                 uint64_t reserved_17_23:7;
954                 uint64_t ignrs:1;
955                 uint64_t vs_wqe:1;
956                 uint64_t vs_qos:1;
957                 uint64_t l2_mal:1;
958                 uint64_t tcp_flag:1;
959                 uint64_t l4_len:1;
960                 uint64_t l4_chk:1;
961                 uint64_t l4_prt:1;
962                 uint64_t l4_mal:1;
963                 uint64_t reserved_6_7:2;
964                 uint64_t ip6_eext:2;
965                 uint64_t ip4_opts:1;
966                 uint64_t ip_hop:1;
967                 uint64_t ip_mal:1;
968                 uint64_t ip_chk:1;
969 #else
970                 uint64_t ip_chk:1;
971                 uint64_t ip_mal:1;
972                 uint64_t ip_hop:1;
973                 uint64_t ip4_opts:1;
974                 uint64_t ip6_eext:2;
975                 uint64_t reserved_6_7:2;
976                 uint64_t l4_mal:1;
977                 uint64_t l4_prt:1;
978                 uint64_t l4_chk:1;
979                 uint64_t l4_len:1;
980                 uint64_t tcp_flag:1;
981                 uint64_t l2_mal:1;
982                 uint64_t vs_qos:1;
983                 uint64_t vs_wqe:1;
984                 uint64_t ignrs:1;
985                 uint64_t reserved_17_23:7;
986                 uint64_t dsa_grp_sid:1;
987                 uint64_t dsa_grp_scmd:1;
988                 uint64_t dsa_grp_tvid:1;
989                 uint64_t ihmsk_dis:1;
990                 uint64_t reserved_28_63:36;
991 #endif
992         } cn68xxp1;
993         struct cvmx_pip_gbl_ctl_cn61xx cnf71xx;
994 };
995
996 union cvmx_pip_hg_pri_qos {
997         uint64_t u64;
998         struct cvmx_pip_hg_pri_qos_s {
999 #ifdef __BIG_ENDIAN_BITFIELD
1000                 uint64_t reserved_13_63:51;
1001                 uint64_t up_qos:1;
1002                 uint64_t reserved_11_11:1;
1003                 uint64_t qos:3;
1004                 uint64_t reserved_6_7:2;
1005                 uint64_t pri:6;
1006 #else
1007                 uint64_t pri:6;
1008                 uint64_t reserved_6_7:2;
1009                 uint64_t qos:3;
1010                 uint64_t reserved_11_11:1;
1011                 uint64_t up_qos:1;
1012                 uint64_t reserved_13_63:51;
1013 #endif
1014         } s;
1015         struct cvmx_pip_hg_pri_qos_s cn52xx;
1016         struct cvmx_pip_hg_pri_qos_s cn52xxp1;
1017         struct cvmx_pip_hg_pri_qos_s cn56xx;
1018         struct cvmx_pip_hg_pri_qos_s cn61xx;
1019         struct cvmx_pip_hg_pri_qos_s cn63xx;
1020         struct cvmx_pip_hg_pri_qos_s cn63xxp1;
1021         struct cvmx_pip_hg_pri_qos_s cn66xx;
1022         struct cvmx_pip_hg_pri_qos_s cnf71xx;
1023 };
1024
1025 union cvmx_pip_int_en {
1026         uint64_t u64;
1027         struct cvmx_pip_int_en_s {
1028 #ifdef __BIG_ENDIAN_BITFIELD
1029                 uint64_t reserved_13_63:51;
1030                 uint64_t punyerr:1;
1031                 uint64_t lenerr:1;
1032                 uint64_t maxerr:1;
1033                 uint64_t minerr:1;
1034                 uint64_t beperr:1;
1035                 uint64_t feperr:1;
1036                 uint64_t todoovr:1;
1037                 uint64_t skprunt:1;
1038                 uint64_t badtag:1;
1039                 uint64_t prtnxa:1;
1040                 uint64_t bckprs:1;
1041                 uint64_t crcerr:1;
1042                 uint64_t pktdrp:1;
1043 #else
1044                 uint64_t pktdrp:1;
1045                 uint64_t crcerr:1;
1046                 uint64_t bckprs:1;
1047                 uint64_t prtnxa:1;
1048                 uint64_t badtag:1;
1049                 uint64_t skprunt:1;
1050                 uint64_t todoovr:1;
1051                 uint64_t feperr:1;
1052                 uint64_t beperr:1;
1053                 uint64_t minerr:1;
1054                 uint64_t maxerr:1;
1055                 uint64_t lenerr:1;
1056                 uint64_t punyerr:1;
1057                 uint64_t reserved_13_63:51;
1058 #endif
1059         } s;
1060         struct cvmx_pip_int_en_cn30xx {
1061 #ifdef __BIG_ENDIAN_BITFIELD
1062                 uint64_t reserved_9_63:55;
1063                 uint64_t beperr:1;
1064                 uint64_t feperr:1;
1065                 uint64_t todoovr:1;
1066                 uint64_t skprunt:1;
1067                 uint64_t badtag:1;
1068                 uint64_t prtnxa:1;
1069                 uint64_t bckprs:1;
1070                 uint64_t crcerr:1;
1071                 uint64_t pktdrp:1;
1072 #else
1073                 uint64_t pktdrp:1;
1074                 uint64_t crcerr:1;
1075                 uint64_t bckprs:1;
1076                 uint64_t prtnxa:1;
1077                 uint64_t badtag:1;
1078                 uint64_t skprunt:1;
1079                 uint64_t todoovr:1;
1080                 uint64_t feperr:1;
1081                 uint64_t beperr:1;
1082                 uint64_t reserved_9_63:55;
1083 #endif
1084         } cn30xx;
1085         struct cvmx_pip_int_en_cn30xx cn31xx;
1086         struct cvmx_pip_int_en_cn30xx cn38xx;
1087         struct cvmx_pip_int_en_cn30xx cn38xxp2;
1088         struct cvmx_pip_int_en_cn50xx {
1089 #ifdef __BIG_ENDIAN_BITFIELD
1090                 uint64_t reserved_12_63:52;
1091                 uint64_t lenerr:1;
1092                 uint64_t maxerr:1;
1093                 uint64_t minerr:1;
1094                 uint64_t beperr:1;
1095                 uint64_t feperr:1;
1096                 uint64_t todoovr:1;
1097                 uint64_t skprunt:1;
1098                 uint64_t badtag:1;
1099                 uint64_t prtnxa:1;
1100                 uint64_t bckprs:1;
1101                 uint64_t reserved_1_1:1;
1102                 uint64_t pktdrp:1;
1103 #else
1104                 uint64_t pktdrp:1;
1105                 uint64_t reserved_1_1:1;
1106                 uint64_t bckprs:1;
1107                 uint64_t prtnxa:1;
1108                 uint64_t badtag:1;
1109                 uint64_t skprunt:1;
1110                 uint64_t todoovr:1;
1111                 uint64_t feperr:1;
1112                 uint64_t beperr:1;
1113                 uint64_t minerr:1;
1114                 uint64_t maxerr:1;
1115                 uint64_t lenerr:1;
1116                 uint64_t reserved_12_63:52;
1117 #endif
1118         } cn50xx;
1119         struct cvmx_pip_int_en_cn52xx {
1120 #ifdef __BIG_ENDIAN_BITFIELD
1121                 uint64_t reserved_13_63:51;
1122                 uint64_t punyerr:1;
1123                 uint64_t lenerr:1;
1124                 uint64_t maxerr:1;
1125                 uint64_t minerr:1;
1126                 uint64_t beperr:1;
1127                 uint64_t feperr:1;
1128                 uint64_t todoovr:1;
1129                 uint64_t skprunt:1;
1130                 uint64_t badtag:1;
1131                 uint64_t prtnxa:1;
1132                 uint64_t bckprs:1;
1133                 uint64_t reserved_1_1:1;
1134                 uint64_t pktdrp:1;
1135 #else
1136                 uint64_t pktdrp:1;
1137                 uint64_t reserved_1_1:1;
1138                 uint64_t bckprs:1;
1139                 uint64_t prtnxa:1;
1140                 uint64_t badtag:1;
1141                 uint64_t skprunt:1;
1142                 uint64_t todoovr:1;
1143                 uint64_t feperr:1;
1144                 uint64_t beperr:1;
1145                 uint64_t minerr:1;
1146                 uint64_t maxerr:1;
1147                 uint64_t lenerr:1;
1148                 uint64_t punyerr:1;
1149                 uint64_t reserved_13_63:51;
1150 #endif
1151         } cn52xx;
1152         struct cvmx_pip_int_en_cn52xx cn52xxp1;
1153         struct cvmx_pip_int_en_s cn56xx;
1154         struct cvmx_pip_int_en_cn56xxp1 {
1155 #ifdef __BIG_ENDIAN_BITFIELD
1156                 uint64_t reserved_12_63:52;
1157                 uint64_t lenerr:1;
1158                 uint64_t maxerr:1;
1159                 uint64_t minerr:1;
1160                 uint64_t beperr:1;
1161                 uint64_t feperr:1;
1162                 uint64_t todoovr:1;
1163                 uint64_t skprunt:1;
1164                 uint64_t badtag:1;
1165                 uint64_t prtnxa:1;
1166                 uint64_t bckprs:1;
1167                 uint64_t crcerr:1;
1168                 uint64_t pktdrp:1;
1169 #else
1170                 uint64_t pktdrp:1;
1171                 uint64_t crcerr:1;
1172                 uint64_t bckprs:1;
1173                 uint64_t prtnxa:1;
1174                 uint64_t badtag:1;
1175                 uint64_t skprunt:1;
1176                 uint64_t todoovr:1;
1177                 uint64_t feperr:1;
1178                 uint64_t beperr:1;
1179                 uint64_t minerr:1;
1180                 uint64_t maxerr:1;
1181                 uint64_t lenerr:1;
1182                 uint64_t reserved_12_63:52;
1183 #endif
1184         } cn56xxp1;
1185         struct cvmx_pip_int_en_cn58xx {
1186 #ifdef __BIG_ENDIAN_BITFIELD
1187                 uint64_t reserved_13_63:51;
1188                 uint64_t punyerr:1;
1189                 uint64_t reserved_9_11:3;
1190                 uint64_t beperr:1;
1191                 uint64_t feperr:1;
1192                 uint64_t todoovr:1;
1193                 uint64_t skprunt:1;
1194                 uint64_t badtag:1;
1195                 uint64_t prtnxa:1;
1196                 uint64_t bckprs:1;
1197                 uint64_t crcerr:1;
1198                 uint64_t pktdrp:1;
1199 #else
1200                 uint64_t pktdrp:1;
1201                 uint64_t crcerr:1;
1202                 uint64_t bckprs:1;
1203                 uint64_t prtnxa:1;
1204                 uint64_t badtag:1;
1205                 uint64_t skprunt:1;
1206                 uint64_t todoovr:1;
1207                 uint64_t feperr:1;
1208                 uint64_t beperr:1;
1209                 uint64_t reserved_9_11:3;
1210                 uint64_t punyerr:1;
1211                 uint64_t reserved_13_63:51;
1212 #endif
1213         } cn58xx;
1214         struct cvmx_pip_int_en_cn30xx cn58xxp1;
1215         struct cvmx_pip_int_en_s cn61xx;
1216         struct cvmx_pip_int_en_s cn63xx;
1217         struct cvmx_pip_int_en_s cn63xxp1;
1218         struct cvmx_pip_int_en_s cn66xx;
1219         struct cvmx_pip_int_en_s cn68xx;
1220         struct cvmx_pip_int_en_s cn68xxp1;
1221         struct cvmx_pip_int_en_s cnf71xx;
1222 };
1223
1224 union cvmx_pip_int_reg {
1225         uint64_t u64;
1226         struct cvmx_pip_int_reg_s {
1227 #ifdef __BIG_ENDIAN_BITFIELD
1228                 uint64_t reserved_13_63:51;
1229                 uint64_t punyerr:1;
1230                 uint64_t lenerr:1;
1231                 uint64_t maxerr:1;
1232                 uint64_t minerr:1;
1233                 uint64_t beperr:1;
1234                 uint64_t feperr:1;
1235                 uint64_t todoovr:1;
1236                 uint64_t skprunt:1;
1237                 uint64_t badtag:1;
1238                 uint64_t prtnxa:1;
1239                 uint64_t bckprs:1;
1240                 uint64_t crcerr:1;
1241                 uint64_t pktdrp:1;
1242 #else
1243                 uint64_t pktdrp:1;
1244                 uint64_t crcerr:1;
1245                 uint64_t bckprs:1;
1246                 uint64_t prtnxa:1;
1247                 uint64_t badtag:1;
1248                 uint64_t skprunt:1;
1249                 uint64_t todoovr:1;
1250                 uint64_t feperr:1;
1251                 uint64_t beperr:1;
1252                 uint64_t minerr:1;
1253                 uint64_t maxerr:1;
1254                 uint64_t lenerr:1;
1255                 uint64_t punyerr:1;
1256                 uint64_t reserved_13_63:51;
1257 #endif
1258         } s;
1259         struct cvmx_pip_int_reg_cn30xx {
1260 #ifdef __BIG_ENDIAN_BITFIELD
1261                 uint64_t reserved_9_63:55;
1262                 uint64_t beperr:1;
1263                 uint64_t feperr:1;
1264                 uint64_t todoovr:1;
1265                 uint64_t skprunt:1;
1266                 uint64_t badtag:1;
1267                 uint64_t prtnxa:1;
1268                 uint64_t bckprs:1;
1269                 uint64_t crcerr:1;
1270                 uint64_t pktdrp:1;
1271 #else
1272                 uint64_t pktdrp:1;
1273                 uint64_t crcerr:1;
1274                 uint64_t bckprs:1;
1275                 uint64_t prtnxa:1;
1276                 uint64_t badtag:1;
1277                 uint64_t skprunt:1;
1278                 uint64_t todoovr:1;
1279                 uint64_t feperr:1;
1280                 uint64_t beperr:1;
1281                 uint64_t reserved_9_63:55;
1282 #endif
1283         } cn30xx;
1284         struct cvmx_pip_int_reg_cn30xx cn31xx;
1285         struct cvmx_pip_int_reg_cn30xx cn38xx;
1286         struct cvmx_pip_int_reg_cn30xx cn38xxp2;
1287         struct cvmx_pip_int_reg_cn50xx {
1288 #ifdef __BIG_ENDIAN_BITFIELD
1289                 uint64_t reserved_12_63:52;
1290                 uint64_t lenerr:1;
1291                 uint64_t maxerr:1;
1292                 uint64_t minerr:1;
1293                 uint64_t beperr:1;
1294                 uint64_t feperr:1;
1295                 uint64_t todoovr:1;
1296                 uint64_t skprunt:1;
1297                 uint64_t badtag:1;
1298                 uint64_t prtnxa:1;
1299                 uint64_t bckprs:1;
1300                 uint64_t reserved_1_1:1;
1301                 uint64_t pktdrp:1;
1302 #else
1303                 uint64_t pktdrp:1;
1304                 uint64_t reserved_1_1:1;
1305                 uint64_t bckprs:1;
1306                 uint64_t prtnxa:1;
1307                 uint64_t badtag:1;
1308                 uint64_t skprunt:1;
1309                 uint64_t todoovr:1;
1310                 uint64_t feperr:1;
1311                 uint64_t beperr:1;
1312                 uint64_t minerr:1;
1313                 uint64_t maxerr:1;
1314                 uint64_t lenerr:1;
1315                 uint64_t reserved_12_63:52;
1316 #endif
1317         } cn50xx;
1318         struct cvmx_pip_int_reg_cn52xx {
1319 #ifdef __BIG_ENDIAN_BITFIELD
1320                 uint64_t reserved_13_63:51;
1321                 uint64_t punyerr:1;
1322                 uint64_t lenerr:1;
1323                 uint64_t maxerr:1;
1324                 uint64_t minerr:1;
1325                 uint64_t beperr:1;
1326                 uint64_t feperr:1;
1327                 uint64_t todoovr:1;
1328                 uint64_t skprunt:1;
1329                 uint64_t badtag:1;
1330                 uint64_t prtnxa:1;
1331                 uint64_t bckprs:1;
1332                 uint64_t reserved_1_1:1;
1333                 uint64_t pktdrp:1;
1334 #else
1335                 uint64_t pktdrp:1;
1336                 uint64_t reserved_1_1:1;
1337                 uint64_t bckprs:1;
1338                 uint64_t prtnxa:1;
1339                 uint64_t badtag:1;
1340                 uint64_t skprunt:1;
1341                 uint64_t todoovr:1;
1342                 uint64_t feperr:1;
1343                 uint64_t beperr:1;
1344                 uint64_t minerr:1;
1345                 uint64_t maxerr:1;
1346                 uint64_t lenerr:1;
1347                 uint64_t punyerr:1;
1348                 uint64_t reserved_13_63:51;
1349 #endif
1350         } cn52xx;
1351         struct cvmx_pip_int_reg_cn52xx cn52xxp1;
1352         struct cvmx_pip_int_reg_s cn56xx;
1353         struct cvmx_pip_int_reg_cn56xxp1 {
1354 #ifdef __BIG_ENDIAN_BITFIELD
1355                 uint64_t reserved_12_63:52;
1356                 uint64_t lenerr:1;
1357                 uint64_t maxerr:1;
1358                 uint64_t minerr:1;
1359                 uint64_t beperr:1;
1360                 uint64_t feperr:1;
1361                 uint64_t todoovr:1;
1362                 uint64_t skprunt:1;
1363                 uint64_t badtag:1;
1364                 uint64_t prtnxa:1;
1365                 uint64_t bckprs:1;
1366                 uint64_t crcerr:1;
1367                 uint64_t pktdrp:1;
1368 #else
1369                 uint64_t pktdrp:1;
1370                 uint64_t crcerr:1;
1371                 uint64_t bckprs:1;
1372                 uint64_t prtnxa:1;
1373                 uint64_t badtag:1;
1374                 uint64_t skprunt:1;
1375                 uint64_t todoovr:1;
1376                 uint64_t feperr:1;
1377                 uint64_t beperr:1;
1378                 uint64_t minerr:1;
1379                 uint64_t maxerr:1;
1380                 uint64_t lenerr:1;
1381                 uint64_t reserved_12_63:52;
1382 #endif
1383         } cn56xxp1;
1384         struct cvmx_pip_int_reg_cn58xx {
1385 #ifdef __BIG_ENDIAN_BITFIELD
1386                 uint64_t reserved_13_63:51;
1387                 uint64_t punyerr:1;
1388                 uint64_t reserved_9_11:3;
1389                 uint64_t beperr:1;
1390                 uint64_t feperr:1;
1391                 uint64_t todoovr:1;
1392                 uint64_t skprunt:1;
1393                 uint64_t badtag:1;
1394                 uint64_t prtnxa:1;
1395                 uint64_t bckprs:1;
1396                 uint64_t crcerr:1;
1397                 uint64_t pktdrp:1;
1398 #else
1399                 uint64_t pktdrp:1;
1400                 uint64_t crcerr:1;
1401                 uint64_t bckprs:1;
1402                 uint64_t prtnxa:1;
1403                 uint64_t badtag:1;
1404                 uint64_t skprunt:1;
1405                 uint64_t todoovr:1;
1406                 uint64_t feperr:1;
1407                 uint64_t beperr:1;
1408                 uint64_t reserved_9_11:3;
1409                 uint64_t punyerr:1;
1410                 uint64_t reserved_13_63:51;
1411 #endif
1412         } cn58xx;
1413         struct cvmx_pip_int_reg_cn30xx cn58xxp1;
1414         struct cvmx_pip_int_reg_s cn61xx;
1415         struct cvmx_pip_int_reg_s cn63xx;
1416         struct cvmx_pip_int_reg_s cn63xxp1;
1417         struct cvmx_pip_int_reg_s cn66xx;
1418         struct cvmx_pip_int_reg_s cn68xx;
1419         struct cvmx_pip_int_reg_s cn68xxp1;
1420         struct cvmx_pip_int_reg_s cnf71xx;
1421 };
1422
1423 union cvmx_pip_ip_offset {
1424         uint64_t u64;
1425         struct cvmx_pip_ip_offset_s {
1426 #ifdef __BIG_ENDIAN_BITFIELD
1427                 uint64_t reserved_3_63:61;
1428                 uint64_t offset:3;
1429 #else
1430                 uint64_t offset:3;
1431                 uint64_t reserved_3_63:61;
1432 #endif
1433         } s;
1434         struct cvmx_pip_ip_offset_s cn30xx;
1435         struct cvmx_pip_ip_offset_s cn31xx;
1436         struct cvmx_pip_ip_offset_s cn38xx;
1437         struct cvmx_pip_ip_offset_s cn38xxp2;
1438         struct cvmx_pip_ip_offset_s cn50xx;
1439         struct cvmx_pip_ip_offset_s cn52xx;
1440         struct cvmx_pip_ip_offset_s cn52xxp1;
1441         struct cvmx_pip_ip_offset_s cn56xx;
1442         struct cvmx_pip_ip_offset_s cn56xxp1;
1443         struct cvmx_pip_ip_offset_s cn58xx;
1444         struct cvmx_pip_ip_offset_s cn58xxp1;
1445         struct cvmx_pip_ip_offset_s cn61xx;
1446         struct cvmx_pip_ip_offset_s cn63xx;
1447         struct cvmx_pip_ip_offset_s cn63xxp1;
1448         struct cvmx_pip_ip_offset_s cn66xx;
1449         struct cvmx_pip_ip_offset_s cn68xx;
1450         struct cvmx_pip_ip_offset_s cn68xxp1;
1451         struct cvmx_pip_ip_offset_s cnf71xx;
1452 };
1453
1454 union cvmx_pip_pri_tblx {
1455         uint64_t u64;
1456         struct cvmx_pip_pri_tblx_s {
1457 #ifdef __BIG_ENDIAN_BITFIELD
1458                 uint64_t diff2_padd:8;
1459                 uint64_t hg2_padd:8;
1460                 uint64_t vlan2_padd:8;
1461                 uint64_t reserved_38_39:2;
1462                 uint64_t diff2_bpid:6;
1463                 uint64_t reserved_30_31:2;
1464                 uint64_t hg2_bpid:6;
1465                 uint64_t reserved_22_23:2;
1466                 uint64_t vlan2_bpid:6;
1467                 uint64_t reserved_11_15:5;
1468                 uint64_t diff2_qos:3;
1469                 uint64_t reserved_7_7:1;
1470                 uint64_t hg2_qos:3;
1471                 uint64_t reserved_3_3:1;
1472                 uint64_t vlan2_qos:3;
1473 #else
1474                 uint64_t vlan2_qos:3;
1475                 uint64_t reserved_3_3:1;
1476                 uint64_t hg2_qos:3;
1477                 uint64_t reserved_7_7:1;
1478                 uint64_t diff2_qos:3;
1479                 uint64_t reserved_11_15:5;
1480                 uint64_t vlan2_bpid:6;
1481                 uint64_t reserved_22_23:2;
1482                 uint64_t hg2_bpid:6;
1483                 uint64_t reserved_30_31:2;
1484                 uint64_t diff2_bpid:6;
1485                 uint64_t reserved_38_39:2;
1486                 uint64_t vlan2_padd:8;
1487                 uint64_t hg2_padd:8;
1488                 uint64_t diff2_padd:8;
1489 #endif
1490         } s;
1491         struct cvmx_pip_pri_tblx_s cn68xx;
1492         struct cvmx_pip_pri_tblx_s cn68xxp1;
1493 };
1494
1495 union cvmx_pip_prt_cfgx {
1496         uint64_t u64;
1497         struct cvmx_pip_prt_cfgx_s {
1498 #ifdef __BIG_ENDIAN_BITFIELD
1499                 uint64_t reserved_55_63:9;
1500                 uint64_t ih_pri:1;
1501                 uint64_t len_chk_sel:1;
1502                 uint64_t pad_len:1;
1503                 uint64_t vlan_len:1;
1504                 uint64_t lenerr_en:1;
1505                 uint64_t maxerr_en:1;
1506                 uint64_t minerr_en:1;
1507                 uint64_t grp_wat_47:4;
1508                 uint64_t qos_wat_47:4;
1509                 uint64_t reserved_37_39:3;
1510                 uint64_t rawdrp:1;
1511                 uint64_t tag_inc:2;
1512                 uint64_t dyn_rs:1;
1513                 uint64_t inst_hdr:1;
1514                 uint64_t grp_wat:4;
1515                 uint64_t hg_qos:1;
1516                 uint64_t qos:3;
1517                 uint64_t qos_wat:4;
1518                 uint64_t qos_vsel:1;
1519                 uint64_t qos_vod:1;
1520                 uint64_t qos_diff:1;
1521                 uint64_t qos_vlan:1;
1522                 uint64_t reserved_13_15:3;
1523                 uint64_t crc_en:1;
1524                 uint64_t higig_en:1;
1525                 uint64_t dsa_en:1;
1526                 uint64_t mode:2;
1527                 uint64_t reserved_7_7:1;
1528                 uint64_t skip:7;
1529 #else
1530                 uint64_t skip:7;
1531                 uint64_t reserved_7_7:1;
1532                 uint64_t mode:2;
1533                 uint64_t dsa_en:1;
1534                 uint64_t higig_en:1;
1535                 uint64_t crc_en:1;
1536                 uint64_t reserved_13_15:3;
1537                 uint64_t qos_vlan:1;
1538                 uint64_t qos_diff:1;
1539                 uint64_t qos_vod:1;
1540                 uint64_t qos_vsel:1;
1541                 uint64_t qos_wat:4;
1542                 uint64_t qos:3;
1543                 uint64_t hg_qos:1;
1544                 uint64_t grp_wat:4;
1545                 uint64_t inst_hdr:1;
1546                 uint64_t dyn_rs:1;
1547                 uint64_t tag_inc:2;
1548                 uint64_t rawdrp:1;
1549                 uint64_t reserved_37_39:3;
1550                 uint64_t qos_wat_47:4;
1551                 uint64_t grp_wat_47:4;
1552                 uint64_t minerr_en:1;
1553                 uint64_t maxerr_en:1;
1554                 uint64_t lenerr_en:1;
1555                 uint64_t vlan_len:1;
1556                 uint64_t pad_len:1;
1557                 uint64_t len_chk_sel:1;
1558                 uint64_t ih_pri:1;
1559                 uint64_t reserved_55_63:9;
1560 #endif
1561         } s;
1562         struct cvmx_pip_prt_cfgx_cn30xx {
1563 #ifdef __BIG_ENDIAN_BITFIELD
1564                 uint64_t reserved_37_63:27;
1565                 uint64_t rawdrp:1;
1566                 uint64_t tag_inc:2;
1567                 uint64_t dyn_rs:1;
1568                 uint64_t inst_hdr:1;
1569                 uint64_t grp_wat:4;
1570                 uint64_t reserved_27_27:1;
1571                 uint64_t qos:3;
1572                 uint64_t qos_wat:4;
1573                 uint64_t reserved_18_19:2;
1574                 uint64_t qos_diff:1;
1575                 uint64_t qos_vlan:1;
1576                 uint64_t reserved_10_15:6;
1577                 uint64_t mode:2;
1578                 uint64_t reserved_7_7:1;
1579                 uint64_t skip:7;
1580 #else
1581                 uint64_t skip:7;
1582                 uint64_t reserved_7_7:1;
1583                 uint64_t mode:2;
1584                 uint64_t reserved_10_15:6;
1585                 uint64_t qos_vlan:1;
1586                 uint64_t qos_diff:1;
1587                 uint64_t reserved_18_19:2;
1588                 uint64_t qos_wat:4;
1589                 uint64_t qos:3;
1590                 uint64_t reserved_27_27:1;
1591                 uint64_t grp_wat:4;
1592                 uint64_t inst_hdr:1;
1593                 uint64_t dyn_rs:1;
1594                 uint64_t tag_inc:2;
1595                 uint64_t rawdrp:1;
1596                 uint64_t reserved_37_63:27;
1597 #endif
1598         } cn30xx;
1599         struct cvmx_pip_prt_cfgx_cn30xx cn31xx;
1600         struct cvmx_pip_prt_cfgx_cn38xx {
1601 #ifdef __BIG_ENDIAN_BITFIELD
1602                 uint64_t reserved_37_63:27;
1603                 uint64_t rawdrp:1;
1604                 uint64_t tag_inc:2;
1605                 uint64_t dyn_rs:1;
1606                 uint64_t inst_hdr:1;
1607                 uint64_t grp_wat:4;
1608                 uint64_t reserved_27_27:1;
1609                 uint64_t qos:3;
1610                 uint64_t qos_wat:4;
1611                 uint64_t reserved_18_19:2;
1612                 uint64_t qos_diff:1;
1613                 uint64_t qos_vlan:1;
1614                 uint64_t reserved_13_15:3;
1615                 uint64_t crc_en:1;
1616                 uint64_t reserved_10_11:2;
1617                 uint64_t mode:2;
1618                 uint64_t reserved_7_7:1;
1619                 uint64_t skip:7;
1620 #else
1621                 uint64_t skip:7;
1622                 uint64_t reserved_7_7:1;
1623                 uint64_t mode:2;
1624                 uint64_t reserved_10_11:2;
1625                 uint64_t crc_en:1;
1626                 uint64_t reserved_13_15:3;
1627                 uint64_t qos_vlan:1;
1628                 uint64_t qos_diff:1;
1629                 uint64_t reserved_18_19:2;
1630                 uint64_t qos_wat:4;
1631                 uint64_t qos:3;
1632                 uint64_t reserved_27_27:1;
1633                 uint64_t grp_wat:4;
1634                 uint64_t inst_hdr:1;
1635                 uint64_t dyn_rs:1;
1636                 uint64_t tag_inc:2;
1637                 uint64_t rawdrp:1;
1638                 uint64_t reserved_37_63:27;
1639 #endif
1640         } cn38xx;
1641         struct cvmx_pip_prt_cfgx_cn38xx cn38xxp2;
1642         struct cvmx_pip_prt_cfgx_cn50xx {
1643 #ifdef __BIG_ENDIAN_BITFIELD
1644                 uint64_t reserved_53_63:11;
1645                 uint64_t pad_len:1;
1646                 uint64_t vlan_len:1;
1647                 uint64_t lenerr_en:1;
1648                 uint64_t maxerr_en:1;
1649                 uint64_t minerr_en:1;
1650                 uint64_t grp_wat_47:4;
1651                 uint64_t qos_wat_47:4;
1652                 uint64_t reserved_37_39:3;
1653                 uint64_t rawdrp:1;
1654                 uint64_t tag_inc:2;
1655                 uint64_t dyn_rs:1;
1656                 uint64_t inst_hdr:1;
1657                 uint64_t grp_wat:4;
1658                 uint64_t reserved_27_27:1;
1659                 uint64_t qos:3;
1660                 uint64_t qos_wat:4;
1661                 uint64_t reserved_19_19:1;
1662                 uint64_t qos_vod:1;
1663                 uint64_t qos_diff:1;
1664                 uint64_t qos_vlan:1;
1665                 uint64_t reserved_13_15:3;
1666                 uint64_t crc_en:1;
1667                 uint64_t reserved_10_11:2;
1668                 uint64_t mode:2;
1669                 uint64_t reserved_7_7:1;
1670                 uint64_t skip:7;
1671 #else
1672                 uint64_t skip:7;
1673                 uint64_t reserved_7_7:1;
1674                 uint64_t mode:2;
1675                 uint64_t reserved_10_11:2;
1676                 uint64_t crc_en:1;
1677                 uint64_t reserved_13_15:3;
1678                 uint64_t qos_vlan:1;
1679                 uint64_t qos_diff:1;
1680                 uint64_t qos_vod:1;
1681                 uint64_t reserved_19_19:1;
1682                 uint64_t qos_wat:4;
1683                 uint64_t qos:3;
1684                 uint64_t reserved_27_27:1;
1685                 uint64_t grp_wat:4;
1686                 uint64_t inst_hdr:1;
1687                 uint64_t dyn_rs:1;
1688                 uint64_t tag_inc:2;
1689                 uint64_t rawdrp:1;
1690                 uint64_t reserved_37_39:3;
1691                 uint64_t qos_wat_47:4;
1692                 uint64_t grp_wat_47:4;
1693                 uint64_t minerr_en:1;
1694                 uint64_t maxerr_en:1;
1695                 uint64_t lenerr_en:1;
1696                 uint64_t vlan_len:1;
1697                 uint64_t pad_len:1;
1698                 uint64_t reserved_53_63:11;
1699 #endif
1700         } cn50xx;
1701         struct cvmx_pip_prt_cfgx_cn52xx {
1702 #ifdef __BIG_ENDIAN_BITFIELD
1703                 uint64_t reserved_53_63:11;
1704                 uint64_t pad_len:1;
1705                 uint64_t vlan_len:1;
1706                 uint64_t lenerr_en:1;
1707                 uint64_t maxerr_en:1;
1708                 uint64_t minerr_en:1;
1709                 uint64_t grp_wat_47:4;
1710                 uint64_t qos_wat_47:4;
1711                 uint64_t reserved_37_39:3;
1712                 uint64_t rawdrp:1;
1713                 uint64_t tag_inc:2;
1714                 uint64_t dyn_rs:1;
1715                 uint64_t inst_hdr:1;
1716                 uint64_t grp_wat:4;
1717                 uint64_t hg_qos:1;
1718                 uint64_t qos:3;
1719                 uint64_t qos_wat:4;
1720                 uint64_t qos_vsel:1;
1721                 uint64_t qos_vod:1;
1722                 uint64_t qos_diff:1;
1723                 uint64_t qos_vlan:1;
1724                 uint64_t reserved_13_15:3;
1725                 uint64_t crc_en:1;
1726                 uint64_t higig_en:1;
1727                 uint64_t dsa_en:1;
1728                 uint64_t mode:2;
1729                 uint64_t reserved_7_7:1;
1730                 uint64_t skip:7;
1731 #else
1732                 uint64_t skip:7;
1733                 uint64_t reserved_7_7:1;
1734                 uint64_t mode:2;
1735                 uint64_t dsa_en:1;
1736                 uint64_t higig_en:1;
1737                 uint64_t crc_en:1;
1738                 uint64_t reserved_13_15:3;
1739                 uint64_t qos_vlan:1;
1740                 uint64_t qos_diff:1;
1741                 uint64_t qos_vod:1;
1742                 uint64_t qos_vsel:1;
1743                 uint64_t qos_wat:4;
1744                 uint64_t qos:3;
1745                 uint64_t hg_qos:1;
1746                 uint64_t grp_wat:4;
1747                 uint64_t inst_hdr:1;
1748                 uint64_t dyn_rs:1;
1749                 uint64_t tag_inc:2;
1750                 uint64_t rawdrp:1;
1751                 uint64_t reserved_37_39:3;
1752                 uint64_t qos_wat_47:4;
1753                 uint64_t grp_wat_47:4;
1754                 uint64_t minerr_en:1;
1755                 uint64_t maxerr_en:1;
1756                 uint64_t lenerr_en:1;
1757                 uint64_t vlan_len:1;
1758                 uint64_t pad_len:1;
1759                 uint64_t reserved_53_63:11;
1760 #endif
1761         } cn52xx;
1762         struct cvmx_pip_prt_cfgx_cn52xx cn52xxp1;
1763         struct cvmx_pip_prt_cfgx_cn52xx cn56xx;
1764         struct cvmx_pip_prt_cfgx_cn50xx cn56xxp1;
1765         struct cvmx_pip_prt_cfgx_cn58xx {
1766 #ifdef __BIG_ENDIAN_BITFIELD
1767                 uint64_t reserved_37_63:27;
1768                 uint64_t rawdrp:1;
1769                 uint64_t tag_inc:2;
1770                 uint64_t dyn_rs:1;
1771                 uint64_t inst_hdr:1;
1772                 uint64_t grp_wat:4;
1773                 uint64_t reserved_27_27:1;
1774                 uint64_t qos:3;
1775                 uint64_t qos_wat:4;
1776                 uint64_t reserved_19_19:1;
1777                 uint64_t qos_vod:1;
1778                 uint64_t qos_diff:1;
1779                 uint64_t qos_vlan:1;
1780                 uint64_t reserved_13_15:3;
1781                 uint64_t crc_en:1;
1782                 uint64_t reserved_10_11:2;
1783                 uint64_t mode:2;
1784                 uint64_t reserved_7_7:1;
1785                 uint64_t skip:7;
1786 #else
1787                 uint64_t skip:7;
1788                 uint64_t reserved_7_7:1;
1789                 uint64_t mode:2;
1790                 uint64_t reserved_10_11:2;
1791                 uint64_t crc_en:1;
1792                 uint64_t reserved_13_15:3;
1793                 uint64_t qos_vlan:1;
1794                 uint64_t qos_diff:1;
1795                 uint64_t qos_vod:1;
1796                 uint64_t reserved_19_19:1;
1797                 uint64_t qos_wat:4;
1798                 uint64_t qos:3;
1799                 uint64_t reserved_27_27:1;
1800                 uint64_t grp_wat:4;
1801                 uint64_t inst_hdr:1;
1802                 uint64_t dyn_rs:1;
1803                 uint64_t tag_inc:2;
1804                 uint64_t rawdrp:1;
1805                 uint64_t reserved_37_63:27;
1806 #endif
1807         } cn58xx;
1808         struct cvmx_pip_prt_cfgx_cn58xx cn58xxp1;
1809         struct cvmx_pip_prt_cfgx_cn52xx cn61xx;
1810         struct cvmx_pip_prt_cfgx_cn52xx cn63xx;
1811         struct cvmx_pip_prt_cfgx_cn52xx cn63xxp1;
1812         struct cvmx_pip_prt_cfgx_cn52xx cn66xx;
1813         struct cvmx_pip_prt_cfgx_cn68xx {
1814 #ifdef __BIG_ENDIAN_BITFIELD
1815                 uint64_t reserved_55_63:9;
1816                 uint64_t ih_pri:1;
1817                 uint64_t len_chk_sel:1;
1818                 uint64_t pad_len:1;
1819                 uint64_t vlan_len:1;
1820                 uint64_t lenerr_en:1;
1821                 uint64_t maxerr_en:1;
1822                 uint64_t minerr_en:1;
1823                 uint64_t grp_wat_47:4;
1824                 uint64_t qos_wat_47:4;
1825                 uint64_t reserved_37_39:3;
1826                 uint64_t rawdrp:1;
1827                 uint64_t tag_inc:2;
1828                 uint64_t dyn_rs:1;
1829                 uint64_t inst_hdr:1;
1830                 uint64_t grp_wat:4;
1831                 uint64_t hg_qos:1;
1832                 uint64_t qos:3;
1833                 uint64_t qos_wat:4;
1834                 uint64_t reserved_19_19:1;
1835                 uint64_t qos_vod:1;
1836                 uint64_t qos_diff:1;
1837                 uint64_t qos_vlan:1;
1838                 uint64_t reserved_13_15:3;
1839                 uint64_t crc_en:1;
1840                 uint64_t higig_en:1;
1841                 uint64_t dsa_en:1;
1842                 uint64_t mode:2;
1843                 uint64_t reserved_7_7:1;
1844                 uint64_t skip:7;
1845 #else
1846                 uint64_t skip:7;
1847                 uint64_t reserved_7_7:1;
1848                 uint64_t mode:2;
1849                 uint64_t dsa_en:1;
1850                 uint64_t higig_en:1;
1851                 uint64_t crc_en:1;
1852                 uint64_t reserved_13_15:3;
1853                 uint64_t qos_vlan:1;
1854                 uint64_t qos_diff:1;
1855                 uint64_t qos_vod:1;
1856                 uint64_t reserved_19_19:1;
1857                 uint64_t qos_wat:4;
1858                 uint64_t qos:3;
1859                 uint64_t hg_qos:1;
1860                 uint64_t grp_wat:4;
1861                 uint64_t inst_hdr:1;
1862                 uint64_t dyn_rs:1;
1863                 uint64_t tag_inc:2;
1864                 uint64_t rawdrp:1;
1865                 uint64_t reserved_37_39:3;
1866                 uint64_t qos_wat_47:4;
1867                 uint64_t grp_wat_47:4;
1868                 uint64_t minerr_en:1;
1869                 uint64_t maxerr_en:1;
1870                 uint64_t lenerr_en:1;
1871                 uint64_t vlan_len:1;
1872                 uint64_t pad_len:1;
1873                 uint64_t len_chk_sel:1;
1874                 uint64_t ih_pri:1;
1875                 uint64_t reserved_55_63:9;
1876 #endif
1877         } cn68xx;
1878         struct cvmx_pip_prt_cfgx_cn68xx cn68xxp1;
1879         struct cvmx_pip_prt_cfgx_cn52xx cnf71xx;
1880 };
1881
1882 union cvmx_pip_prt_cfgbx {
1883         uint64_t u64;
1884         struct cvmx_pip_prt_cfgbx_s {
1885 #ifdef __BIG_ENDIAN_BITFIELD
1886                 uint64_t reserved_39_63:25;
1887                 uint64_t alt_skp_sel:2;
1888                 uint64_t alt_skp_en:1;
1889                 uint64_t reserved_35_35:1;
1890                 uint64_t bsel_num:2;
1891                 uint64_t bsel_en:1;
1892                 uint64_t reserved_24_31:8;
1893                 uint64_t base:8;
1894                 uint64_t reserved_6_15:10;
1895                 uint64_t bpid:6;
1896 #else
1897                 uint64_t bpid:6;
1898                 uint64_t reserved_6_15:10;
1899                 uint64_t base:8;
1900                 uint64_t reserved_24_31:8;
1901                 uint64_t bsel_en:1;
1902                 uint64_t bsel_num:2;
1903                 uint64_t reserved_35_35:1;
1904                 uint64_t alt_skp_en:1;
1905                 uint64_t alt_skp_sel:2;
1906                 uint64_t reserved_39_63:25;
1907 #endif
1908         } s;
1909         struct cvmx_pip_prt_cfgbx_cn61xx {
1910 #ifdef __BIG_ENDIAN_BITFIELD
1911                 uint64_t reserved_39_63:25;
1912                 uint64_t alt_skp_sel:2;
1913                 uint64_t alt_skp_en:1;
1914                 uint64_t reserved_35_35:1;
1915                 uint64_t bsel_num:2;
1916                 uint64_t bsel_en:1;
1917                 uint64_t reserved_0_31:32;
1918 #else
1919                 uint64_t reserved_0_31:32;
1920                 uint64_t bsel_en:1;
1921                 uint64_t bsel_num:2;
1922                 uint64_t reserved_35_35:1;
1923                 uint64_t alt_skp_en:1;
1924                 uint64_t alt_skp_sel:2;
1925                 uint64_t reserved_39_63:25;
1926 #endif
1927         } cn61xx;
1928         struct cvmx_pip_prt_cfgbx_cn66xx {
1929 #ifdef __BIG_ENDIAN_BITFIELD
1930                 uint64_t reserved_39_63:25;
1931                 uint64_t alt_skp_sel:2;
1932                 uint64_t alt_skp_en:1;
1933                 uint64_t reserved_0_35:36;
1934 #else
1935                 uint64_t reserved_0_35:36;
1936                 uint64_t alt_skp_en:1;
1937                 uint64_t alt_skp_sel:2;
1938                 uint64_t reserved_39_63:25;
1939 #endif
1940         } cn66xx;
1941         struct cvmx_pip_prt_cfgbx_s cn68xx;
1942         struct cvmx_pip_prt_cfgbx_cn68xxp1 {
1943 #ifdef __BIG_ENDIAN_BITFIELD
1944                 uint64_t reserved_24_63:40;
1945                 uint64_t base:8;
1946                 uint64_t reserved_6_15:10;
1947                 uint64_t bpid:6;
1948 #else
1949                 uint64_t bpid:6;
1950                 uint64_t reserved_6_15:10;
1951                 uint64_t base:8;
1952                 uint64_t reserved_24_63:40;
1953 #endif
1954         } cn68xxp1;
1955         struct cvmx_pip_prt_cfgbx_cn61xx cnf71xx;
1956 };
1957
1958 union cvmx_pip_prt_tagx {
1959         uint64_t u64;
1960         struct cvmx_pip_prt_tagx_s {
1961 #ifdef __BIG_ENDIAN_BITFIELD
1962                 uint64_t reserved_54_63:10;
1963                 uint64_t portadd_en:1;
1964                 uint64_t inc_hwchk:1;
1965                 uint64_t reserved_50_51:2;
1966                 uint64_t grptagbase_msb:2;
1967                 uint64_t reserved_46_47:2;
1968                 uint64_t grptagmask_msb:2;
1969                 uint64_t reserved_42_43:2;
1970                 uint64_t grp_msb:2;
1971                 uint64_t grptagbase:4;
1972                 uint64_t grptagmask:4;
1973                 uint64_t grptag:1;
1974                 uint64_t grptag_mskip:1;
1975                 uint64_t tag_mode:2;
1976                 uint64_t inc_vs:2;
1977                 uint64_t inc_vlan:1;
1978                 uint64_t inc_prt_flag:1;
1979                 uint64_t ip6_dprt_flag:1;
1980                 uint64_t ip4_dprt_flag:1;
1981                 uint64_t ip6_sprt_flag:1;
1982                 uint64_t ip4_sprt_flag:1;
1983                 uint64_t ip6_nxth_flag:1;
1984                 uint64_t ip4_pctl_flag:1;
1985                 uint64_t ip6_dst_flag:1;
1986                 uint64_t ip4_dst_flag:1;
1987                 uint64_t ip6_src_flag:1;
1988                 uint64_t ip4_src_flag:1;
1989                 uint64_t tcp6_tag_type:2;
1990                 uint64_t tcp4_tag_type:2;
1991                 uint64_t ip6_tag_type:2;
1992                 uint64_t ip4_tag_type:2;
1993                 uint64_t non_tag_type:2;
1994                 uint64_t grp:4;
1995 #else
1996                 uint64_t grp:4;
1997                 uint64_t non_tag_type:2;
1998                 uint64_t ip4_tag_type:2;
1999                 uint64_t ip6_tag_type:2;
2000                 uint64_t tcp4_tag_type:2;
2001                 uint64_t tcp6_tag_type:2;
2002                 uint64_t ip4_src_flag:1;
2003                 uint64_t ip6_src_flag:1;
2004                 uint64_t ip4_dst_flag:1;
2005                 uint64_t ip6_dst_flag:1;
2006                 uint64_t ip4_pctl_flag:1;
2007                 uint64_t ip6_nxth_flag:1;
2008                 uint64_t ip4_sprt_flag:1;
2009                 uint64_t ip6_sprt_flag:1;
2010                 uint64_t ip4_dprt_flag:1;
2011                 uint64_t ip6_dprt_flag:1;
2012                 uint64_t inc_prt_flag:1;
2013                 uint64_t inc_vlan:1;
2014                 uint64_t inc_vs:2;
2015                 uint64_t tag_mode:2;
2016                 uint64_t grptag_mskip:1;
2017                 uint64_t grptag:1;
2018                 uint64_t grptagmask:4;
2019                 uint64_t grptagbase:4;
2020                 uint64_t grp_msb:2;
2021                 uint64_t reserved_42_43:2;
2022                 uint64_t grptagmask_msb:2;
2023                 uint64_t reserved_46_47:2;
2024                 uint64_t grptagbase_msb:2;
2025                 uint64_t reserved_50_51:2;
2026                 uint64_t inc_hwchk:1;
2027                 uint64_t portadd_en:1;
2028                 uint64_t reserved_54_63:10;
2029 #endif
2030         } s;
2031         struct cvmx_pip_prt_tagx_cn30xx {
2032 #ifdef __BIG_ENDIAN_BITFIELD
2033                 uint64_t reserved_40_63:24;
2034                 uint64_t grptagbase:4;
2035                 uint64_t grptagmask:4;
2036                 uint64_t grptag:1;
2037                 uint64_t reserved_30_30:1;
2038                 uint64_t tag_mode:2;
2039                 uint64_t inc_vs:2;
2040                 uint64_t inc_vlan:1;
2041                 uint64_t inc_prt_flag:1;
2042                 uint64_t ip6_dprt_flag:1;
2043                 uint64_t ip4_dprt_flag:1;
2044                 uint64_t ip6_sprt_flag:1;
2045                 uint64_t ip4_sprt_flag:1;
2046                 uint64_t ip6_nxth_flag:1;
2047                 uint64_t ip4_pctl_flag:1;
2048                 uint64_t ip6_dst_flag:1;
2049                 uint64_t ip4_dst_flag:1;
2050                 uint64_t ip6_src_flag:1;
2051                 uint64_t ip4_src_flag:1;
2052                 uint64_t tcp6_tag_type:2;
2053                 uint64_t tcp4_tag_type:2;
2054                 uint64_t ip6_tag_type:2;
2055                 uint64_t ip4_tag_type:2;
2056                 uint64_t non_tag_type:2;
2057                 uint64_t grp:4;
2058 #else
2059                 uint64_t grp:4;
2060                 uint64_t non_tag_type:2;
2061                 uint64_t ip4_tag_type:2;
2062                 uint64_t ip6_tag_type:2;
2063                 uint64_t tcp4_tag_type:2;
2064                 uint64_t tcp6_tag_type:2;
2065                 uint64_t ip4_src_flag:1;
2066                 uint64_t ip6_src_flag:1;
2067                 uint64_t ip4_dst_flag:1;
2068                 uint64_t ip6_dst_flag:1;
2069                 uint64_t ip4_pctl_flag:1;
2070                 uint64_t ip6_nxth_flag:1;
2071                 uint64_t ip4_sprt_flag:1;
2072                 uint64_t ip6_sprt_flag:1;
2073                 uint64_t ip4_dprt_flag:1;
2074                 uint64_t ip6_dprt_flag:1;
2075                 uint64_t inc_prt_flag:1;
2076                 uint64_t inc_vlan:1;
2077                 uint64_t inc_vs:2;
2078                 uint64_t tag_mode:2;
2079                 uint64_t reserved_30_30:1;
2080                 uint64_t grptag:1;
2081                 uint64_t grptagmask:4;
2082                 uint64_t grptagbase:4;
2083                 uint64_t reserved_40_63:24;
2084 #endif
2085         } cn30xx;
2086         struct cvmx_pip_prt_tagx_cn30xx cn31xx;
2087         struct cvmx_pip_prt_tagx_cn30xx cn38xx;
2088         struct cvmx_pip_prt_tagx_cn30xx cn38xxp2;
2089         struct cvmx_pip_prt_tagx_cn50xx {
2090 #ifdef __BIG_ENDIAN_BITFIELD
2091                 uint64_t reserved_40_63:24;
2092                 uint64_t grptagbase:4;
2093                 uint64_t grptagmask:4;
2094                 uint64_t grptag:1;
2095                 uint64_t grptag_mskip:1;
2096                 uint64_t tag_mode:2;
2097                 uint64_t inc_vs:2;
2098                 uint64_t inc_vlan:1;
2099                 uint64_t inc_prt_flag:1;
2100                 uint64_t ip6_dprt_flag:1;
2101                 uint64_t ip4_dprt_flag:1;
2102                 uint64_t ip6_sprt_flag:1;
2103                 uint64_t ip4_sprt_flag:1;
2104                 uint64_t ip6_nxth_flag:1;
2105                 uint64_t ip4_pctl_flag:1;
2106                 uint64_t ip6_dst_flag:1;
2107                 uint64_t ip4_dst_flag:1;
2108                 uint64_t ip6_src_flag:1;
2109                 uint64_t ip4_src_flag:1;
2110                 uint64_t tcp6_tag_type:2;
2111                 uint64_t tcp4_tag_type:2;
2112                 uint64_t ip6_tag_type:2;
2113                 uint64_t ip4_tag_type:2;
2114                 uint64_t non_tag_type:2;
2115                 uint64_t grp:4;
2116 #else
2117                 uint64_t grp:4;
2118                 uint64_t non_tag_type:2;
2119                 uint64_t ip4_tag_type:2;
2120                 uint64_t ip6_tag_type:2;
2121                 uint64_t tcp4_tag_type:2;
2122                 uint64_t tcp6_tag_type:2;
2123                 uint64_t ip4_src_flag:1;
2124                 uint64_t ip6_src_flag:1;
2125                 uint64_t ip4_dst_flag:1;
2126                 uint64_t ip6_dst_flag:1;
2127                 uint64_t ip4_pctl_flag:1;
2128                 uint64_t ip6_nxth_flag:1;
2129                 uint64_t ip4_sprt_flag:1;
2130                 uint64_t ip6_sprt_flag:1;
2131                 uint64_t ip4_dprt_flag:1;
2132                 uint64_t ip6_dprt_flag:1;
2133                 uint64_t inc_prt_flag:1;
2134                 uint64_t inc_vlan:1;
2135                 uint64_t inc_vs:2;
2136                 uint64_t tag_mode:2;
2137                 uint64_t grptag_mskip:1;
2138                 uint64_t grptag:1;
2139                 uint64_t grptagmask:4;
2140                 uint64_t grptagbase:4;
2141                 uint64_t reserved_40_63:24;
2142 #endif
2143         } cn50xx;
2144         struct cvmx_pip_prt_tagx_cn50xx cn52xx;
2145         struct cvmx_pip_prt_tagx_cn50xx cn52xxp1;
2146         struct cvmx_pip_prt_tagx_cn50xx cn56xx;
2147         struct cvmx_pip_prt_tagx_cn50xx cn56xxp1;
2148         struct cvmx_pip_prt_tagx_cn30xx cn58xx;
2149         struct cvmx_pip_prt_tagx_cn30xx cn58xxp1;
2150         struct cvmx_pip_prt_tagx_cn50xx cn61xx;
2151         struct cvmx_pip_prt_tagx_cn50xx cn63xx;
2152         struct cvmx_pip_prt_tagx_cn50xx cn63xxp1;
2153         struct cvmx_pip_prt_tagx_cn50xx cn66xx;
2154         struct cvmx_pip_prt_tagx_s cn68xx;
2155         struct cvmx_pip_prt_tagx_s cn68xxp1;
2156         struct cvmx_pip_prt_tagx_cn50xx cnf71xx;
2157 };
2158
2159 union cvmx_pip_qos_diffx {
2160         uint64_t u64;
2161         struct cvmx_pip_qos_diffx_s {
2162 #ifdef __BIG_ENDIAN_BITFIELD
2163                 uint64_t reserved_3_63:61;
2164                 uint64_t qos:3;
2165 #else
2166                 uint64_t qos:3;
2167                 uint64_t reserved_3_63:61;
2168 #endif
2169         } s;
2170         struct cvmx_pip_qos_diffx_s cn30xx;
2171         struct cvmx_pip_qos_diffx_s cn31xx;
2172         struct cvmx_pip_qos_diffx_s cn38xx;
2173         struct cvmx_pip_qos_diffx_s cn38xxp2;
2174         struct cvmx_pip_qos_diffx_s cn50xx;
2175         struct cvmx_pip_qos_diffx_s cn52xx;
2176         struct cvmx_pip_qos_diffx_s cn52xxp1;
2177         struct cvmx_pip_qos_diffx_s cn56xx;
2178         struct cvmx_pip_qos_diffx_s cn56xxp1;
2179         struct cvmx_pip_qos_diffx_s cn58xx;
2180         struct cvmx_pip_qos_diffx_s cn58xxp1;
2181         struct cvmx_pip_qos_diffx_s cn61xx;
2182         struct cvmx_pip_qos_diffx_s cn63xx;
2183         struct cvmx_pip_qos_diffx_s cn63xxp1;
2184         struct cvmx_pip_qos_diffx_s cn66xx;
2185         struct cvmx_pip_qos_diffx_s cnf71xx;
2186 };
2187
2188 union cvmx_pip_qos_vlanx {
2189         uint64_t u64;
2190         struct cvmx_pip_qos_vlanx_s {
2191 #ifdef __BIG_ENDIAN_BITFIELD
2192                 uint64_t reserved_7_63:57;
2193                 uint64_t qos1:3;
2194                 uint64_t reserved_3_3:1;
2195                 uint64_t qos:3;
2196 #else
2197                 uint64_t qos:3;
2198                 uint64_t reserved_3_3:1;
2199                 uint64_t qos1:3;
2200                 uint64_t reserved_7_63:57;
2201 #endif
2202         } s;
2203         struct cvmx_pip_qos_vlanx_cn30xx {
2204 #ifdef __BIG_ENDIAN_BITFIELD
2205                 uint64_t reserved_3_63:61;
2206                 uint64_t qos:3;
2207 #else
2208                 uint64_t qos:3;
2209                 uint64_t reserved_3_63:61;
2210 #endif
2211         } cn30xx;
2212         struct cvmx_pip_qos_vlanx_cn30xx cn31xx;
2213         struct cvmx_pip_qos_vlanx_cn30xx cn38xx;
2214         struct cvmx_pip_qos_vlanx_cn30xx cn38xxp2;
2215         struct cvmx_pip_qos_vlanx_cn30xx cn50xx;
2216         struct cvmx_pip_qos_vlanx_s cn52xx;
2217         struct cvmx_pip_qos_vlanx_s cn52xxp1;
2218         struct cvmx_pip_qos_vlanx_s cn56xx;
2219         struct cvmx_pip_qos_vlanx_cn30xx cn56xxp1;
2220         struct cvmx_pip_qos_vlanx_cn30xx cn58xx;
2221         struct cvmx_pip_qos_vlanx_cn30xx cn58xxp1;
2222         struct cvmx_pip_qos_vlanx_s cn61xx;
2223         struct cvmx_pip_qos_vlanx_s cn63xx;
2224         struct cvmx_pip_qos_vlanx_s cn63xxp1;
2225         struct cvmx_pip_qos_vlanx_s cn66xx;
2226         struct cvmx_pip_qos_vlanx_s cnf71xx;
2227 };
2228
2229 union cvmx_pip_qos_watchx {
2230         uint64_t u64;
2231         struct cvmx_pip_qos_watchx_s {
2232 #ifdef __BIG_ENDIAN_BITFIELD
2233                 uint64_t reserved_48_63:16;
2234                 uint64_t mask:16;
2235                 uint64_t reserved_30_31:2;
2236                 uint64_t grp:6;
2237                 uint64_t reserved_23_23:1;
2238                 uint64_t qos:3;
2239                 uint64_t reserved_19_19:1;
2240                 uint64_t match_type:3;
2241                 uint64_t match_value:16;
2242 #else
2243                 uint64_t match_value:16;
2244                 uint64_t match_type:3;
2245                 uint64_t reserved_19_19:1;
2246                 uint64_t qos:3;
2247                 uint64_t reserved_23_23:1;
2248                 uint64_t grp:6;
2249                 uint64_t reserved_30_31:2;
2250                 uint64_t mask:16;
2251                 uint64_t reserved_48_63:16;
2252 #endif
2253         } s;
2254         struct cvmx_pip_qos_watchx_cn30xx {
2255 #ifdef __BIG_ENDIAN_BITFIELD
2256                 uint64_t reserved_48_63:16;
2257                 uint64_t mask:16;
2258                 uint64_t reserved_28_31:4;
2259                 uint64_t grp:4;
2260                 uint64_t reserved_23_23:1;
2261                 uint64_t qos:3;
2262                 uint64_t reserved_18_19:2;
2263                 uint64_t match_type:2;
2264                 uint64_t match_value:16;
2265 #else
2266                 uint64_t match_value:16;
2267                 uint64_t match_type:2;
2268                 uint64_t reserved_18_19:2;
2269                 uint64_t qos:3;
2270                 uint64_t reserved_23_23:1;
2271                 uint64_t grp:4;
2272                 uint64_t reserved_28_31:4;
2273                 uint64_t mask:16;
2274                 uint64_t reserved_48_63:16;
2275 #endif
2276         } cn30xx;
2277         struct cvmx_pip_qos_watchx_cn30xx cn31xx;
2278         struct cvmx_pip_qos_watchx_cn30xx cn38xx;
2279         struct cvmx_pip_qos_watchx_cn30xx cn38xxp2;
2280         struct cvmx_pip_qos_watchx_cn50xx {
2281 #ifdef __BIG_ENDIAN_BITFIELD
2282                 uint64_t reserved_48_63:16;
2283                 uint64_t mask:16;
2284                 uint64_t reserved_28_31:4;
2285                 uint64_t grp:4;
2286                 uint64_t reserved_23_23:1;
2287                 uint64_t qos:3;
2288                 uint64_t reserved_19_19:1;
2289                 uint64_t match_type:3;
2290                 uint64_t match_value:16;
2291 #else
2292                 uint64_t match_value:16;
2293                 uint64_t match_type:3;
2294                 uint64_t reserved_19_19:1;
2295                 uint64_t qos:3;
2296                 uint64_t reserved_23_23:1;
2297                 uint64_t grp:4;
2298                 uint64_t reserved_28_31:4;
2299                 uint64_t mask:16;
2300                 uint64_t reserved_48_63:16;
2301 #endif
2302         } cn50xx;
2303         struct cvmx_pip_qos_watchx_cn50xx cn52xx;
2304         struct cvmx_pip_qos_watchx_cn50xx cn52xxp1;
2305         struct cvmx_pip_qos_watchx_cn50xx cn56xx;
2306         struct cvmx_pip_qos_watchx_cn50xx cn56xxp1;
2307         struct cvmx_pip_qos_watchx_cn30xx cn58xx;
2308         struct cvmx_pip_qos_watchx_cn30xx cn58xxp1;
2309         struct cvmx_pip_qos_watchx_cn50xx cn61xx;
2310         struct cvmx_pip_qos_watchx_cn50xx cn63xx;
2311         struct cvmx_pip_qos_watchx_cn50xx cn63xxp1;
2312         struct cvmx_pip_qos_watchx_cn50xx cn66xx;
2313         struct cvmx_pip_qos_watchx_s cn68xx;
2314         struct cvmx_pip_qos_watchx_s cn68xxp1;
2315         struct cvmx_pip_qos_watchx_cn50xx cnf71xx;
2316 };
2317
2318 union cvmx_pip_raw_word {
2319         uint64_t u64;
2320         struct cvmx_pip_raw_word_s {
2321 #ifdef __BIG_ENDIAN_BITFIELD
2322                 uint64_t reserved_56_63:8;
2323                 uint64_t word:56;
2324 #else
2325                 uint64_t word:56;
2326                 uint64_t reserved_56_63:8;
2327 #endif
2328         } s;
2329         struct cvmx_pip_raw_word_s cn30xx;
2330         struct cvmx_pip_raw_word_s cn31xx;
2331         struct cvmx_pip_raw_word_s cn38xx;
2332         struct cvmx_pip_raw_word_s cn38xxp2;
2333         struct cvmx_pip_raw_word_s cn50xx;
2334         struct cvmx_pip_raw_word_s cn52xx;
2335         struct cvmx_pip_raw_word_s cn52xxp1;
2336         struct cvmx_pip_raw_word_s cn56xx;
2337         struct cvmx_pip_raw_word_s cn56xxp1;
2338         struct cvmx_pip_raw_word_s cn58xx;
2339         struct cvmx_pip_raw_word_s cn58xxp1;
2340         struct cvmx_pip_raw_word_s cn61xx;
2341         struct cvmx_pip_raw_word_s cn63xx;
2342         struct cvmx_pip_raw_word_s cn63xxp1;
2343         struct cvmx_pip_raw_word_s cn66xx;
2344         struct cvmx_pip_raw_word_s cn68xx;
2345         struct cvmx_pip_raw_word_s cn68xxp1;
2346         struct cvmx_pip_raw_word_s cnf71xx;
2347 };
2348
2349 union cvmx_pip_sft_rst {
2350         uint64_t u64;
2351         struct cvmx_pip_sft_rst_s {
2352 #ifdef __BIG_ENDIAN_BITFIELD
2353                 uint64_t reserved_1_63:63;
2354                 uint64_t rst:1;
2355 #else
2356                 uint64_t rst:1;
2357                 uint64_t reserved_1_63:63;
2358 #endif
2359         } s;
2360         struct cvmx_pip_sft_rst_s cn30xx;
2361         struct cvmx_pip_sft_rst_s cn31xx;
2362         struct cvmx_pip_sft_rst_s cn38xx;
2363         struct cvmx_pip_sft_rst_s cn50xx;
2364         struct cvmx_pip_sft_rst_s cn52xx;
2365         struct cvmx_pip_sft_rst_s cn52xxp1;
2366         struct cvmx_pip_sft_rst_s cn56xx;
2367         struct cvmx_pip_sft_rst_s cn56xxp1;
2368         struct cvmx_pip_sft_rst_s cn58xx;
2369         struct cvmx_pip_sft_rst_s cn58xxp1;
2370         struct cvmx_pip_sft_rst_s cn61xx;
2371         struct cvmx_pip_sft_rst_s cn63xx;
2372         struct cvmx_pip_sft_rst_s cn63xxp1;
2373         struct cvmx_pip_sft_rst_s cn66xx;
2374         struct cvmx_pip_sft_rst_s cn68xx;
2375         struct cvmx_pip_sft_rst_s cn68xxp1;
2376         struct cvmx_pip_sft_rst_s cnf71xx;
2377 };
2378
2379 union cvmx_pip_stat0_x {
2380         uint64_t u64;
2381         struct cvmx_pip_stat0_x_s {
2382 #ifdef __BIG_ENDIAN_BITFIELD
2383                 uint64_t drp_pkts:32;
2384                 uint64_t drp_octs:32;
2385 #else
2386                 uint64_t drp_octs:32;
2387                 uint64_t drp_pkts:32;
2388 #endif
2389         } s;
2390         struct cvmx_pip_stat0_x_s cn68xx;
2391         struct cvmx_pip_stat0_x_s cn68xxp1;
2392 };
2393
2394 union cvmx_pip_stat0_prtx {
2395         uint64_t u64;
2396         struct cvmx_pip_stat0_prtx_s {
2397 #ifdef __BIG_ENDIAN_BITFIELD
2398                 uint64_t drp_pkts:32;
2399                 uint64_t drp_octs:32;
2400 #else
2401                 uint64_t drp_octs:32;
2402                 uint64_t drp_pkts:32;
2403 #endif
2404         } s;
2405         struct cvmx_pip_stat0_prtx_s cn30xx;
2406         struct cvmx_pip_stat0_prtx_s cn31xx;
2407         struct cvmx_pip_stat0_prtx_s cn38xx;
2408         struct cvmx_pip_stat0_prtx_s cn38xxp2;
2409         struct cvmx_pip_stat0_prtx_s cn50xx;
2410         struct cvmx_pip_stat0_prtx_s cn52xx;
2411         struct cvmx_pip_stat0_prtx_s cn52xxp1;
2412         struct cvmx_pip_stat0_prtx_s cn56xx;
2413         struct cvmx_pip_stat0_prtx_s cn56xxp1;
2414         struct cvmx_pip_stat0_prtx_s cn58xx;
2415         struct cvmx_pip_stat0_prtx_s cn58xxp1;
2416         struct cvmx_pip_stat0_prtx_s cn61xx;
2417         struct cvmx_pip_stat0_prtx_s cn63xx;
2418         struct cvmx_pip_stat0_prtx_s cn63xxp1;
2419         struct cvmx_pip_stat0_prtx_s cn66xx;
2420         struct cvmx_pip_stat0_prtx_s cnf71xx;
2421 };
2422
2423 union cvmx_pip_stat10_x {
2424         uint64_t u64;
2425         struct cvmx_pip_stat10_x_s {
2426 #ifdef __BIG_ENDIAN_BITFIELD
2427                 uint64_t bcast:32;
2428                 uint64_t mcast:32;
2429 #else
2430                 uint64_t mcast:32;
2431                 uint64_t bcast:32;
2432 #endif
2433         } s;
2434         struct cvmx_pip_stat10_x_s cn68xx;
2435         struct cvmx_pip_stat10_x_s cn68xxp1;
2436 };
2437
2438 union cvmx_pip_stat10_prtx {
2439         uint64_t u64;
2440         struct cvmx_pip_stat10_prtx_s {
2441 #ifdef __BIG_ENDIAN_BITFIELD
2442                 uint64_t bcast:32;
2443                 uint64_t mcast:32;
2444 #else
2445                 uint64_t mcast:32;
2446                 uint64_t bcast:32;
2447 #endif
2448         } s;
2449         struct cvmx_pip_stat10_prtx_s cn52xx;
2450         struct cvmx_pip_stat10_prtx_s cn52xxp1;
2451         struct cvmx_pip_stat10_prtx_s cn56xx;
2452         struct cvmx_pip_stat10_prtx_s cn56xxp1;
2453         struct cvmx_pip_stat10_prtx_s cn61xx;
2454         struct cvmx_pip_stat10_prtx_s cn63xx;
2455         struct cvmx_pip_stat10_prtx_s cn63xxp1;
2456         struct cvmx_pip_stat10_prtx_s cn66xx;
2457         struct cvmx_pip_stat10_prtx_s cnf71xx;
2458 };
2459
2460 union cvmx_pip_stat11_x {
2461         uint64_t u64;
2462         struct cvmx_pip_stat11_x_s {
2463 #ifdef __BIG_ENDIAN_BITFIELD
2464                 uint64_t bcast:32;
2465                 uint64_t mcast:32;
2466 #else
2467                 uint64_t mcast:32;
2468                 uint64_t bcast:32;
2469 #endif
2470         } s;
2471         struct cvmx_pip_stat11_x_s cn68xx;
2472         struct cvmx_pip_stat11_x_s cn68xxp1;
2473 };
2474
2475 union cvmx_pip_stat11_prtx {
2476         uint64_t u64;
2477         struct cvmx_pip_stat11_prtx_s {
2478 #ifdef __BIG_ENDIAN_BITFIELD
2479                 uint64_t bcast:32;
2480                 uint64_t mcast:32;
2481 #else
2482                 uint64_t mcast:32;
2483                 uint64_t bcast:32;
2484 #endif
2485         } s;
2486         struct cvmx_pip_stat11_prtx_s cn52xx;
2487         struct cvmx_pip_stat11_prtx_s cn52xxp1;
2488         struct cvmx_pip_stat11_prtx_s cn56xx;
2489         struct cvmx_pip_stat11_prtx_s cn56xxp1;
2490         struct cvmx_pip_stat11_prtx_s cn61xx;
2491         struct cvmx_pip_stat11_prtx_s cn63xx;
2492         struct cvmx_pip_stat11_prtx_s cn63xxp1;
2493         struct cvmx_pip_stat11_prtx_s cn66xx;
2494         struct cvmx_pip_stat11_prtx_s cnf71xx;
2495 };
2496
2497 union cvmx_pip_stat1_x {
2498         uint64_t u64;
2499         struct cvmx_pip_stat1_x_s {
2500 #ifdef __BIG_ENDIAN_BITFIELD
2501                 uint64_t reserved_48_63:16;
2502                 uint64_t octs:48;
2503 #else
2504                 uint64_t octs:48;
2505                 uint64_t reserved_48_63:16;
2506 #endif
2507         } s;
2508         struct cvmx_pip_stat1_x_s cn68xx;
2509         struct cvmx_pip_stat1_x_s cn68xxp1;
2510 };
2511
2512 union cvmx_pip_stat1_prtx {
2513         uint64_t u64;
2514         struct cvmx_pip_stat1_prtx_s {
2515 #ifdef __BIG_ENDIAN_BITFIELD
2516                 uint64_t reserved_48_63:16;
2517                 uint64_t octs:48;
2518 #else
2519                 uint64_t octs:48;
2520                 uint64_t reserved_48_63:16;
2521 #endif
2522         } s;
2523         struct cvmx_pip_stat1_prtx_s cn30xx;
2524         struct cvmx_pip_stat1_prtx_s cn31xx;
2525         struct cvmx_pip_stat1_prtx_s cn38xx;
2526         struct cvmx_pip_stat1_prtx_s cn38xxp2;
2527         struct cvmx_pip_stat1_prtx_s cn50xx;
2528         struct cvmx_pip_stat1_prtx_s cn52xx;
2529         struct cvmx_pip_stat1_prtx_s cn52xxp1;
2530         struct cvmx_pip_stat1_prtx_s cn56xx;
2531         struct cvmx_pip_stat1_prtx_s cn56xxp1;
2532         struct cvmx_pip_stat1_prtx_s cn58xx;
2533         struct cvmx_pip_stat1_prtx_s cn58xxp1;
2534         struct cvmx_pip_stat1_prtx_s cn61xx;
2535         struct cvmx_pip_stat1_prtx_s cn63xx;
2536         struct cvmx_pip_stat1_prtx_s cn63xxp1;
2537         struct cvmx_pip_stat1_prtx_s cn66xx;
2538         struct cvmx_pip_stat1_prtx_s cnf71xx;
2539 };
2540
2541 union cvmx_pip_stat2_x {
2542         uint64_t u64;
2543         struct cvmx_pip_stat2_x_s {
2544 #ifdef __BIG_ENDIAN_BITFIELD
2545                 uint64_t pkts:32;
2546                 uint64_t raw:32;
2547 #else
2548                 uint64_t raw:32;
2549                 uint64_t pkts:32;
2550 #endif
2551         } s;
2552         struct cvmx_pip_stat2_x_s cn68xx;
2553         struct cvmx_pip_stat2_x_s cn68xxp1;
2554 };
2555
2556 union cvmx_pip_stat2_prtx {
2557         uint64_t u64;
2558         struct cvmx_pip_stat2_prtx_s {
2559 #ifdef __BIG_ENDIAN_BITFIELD
2560                 uint64_t pkts:32;
2561                 uint64_t raw:32;
2562 #else
2563                 uint64_t raw:32;
2564                 uint64_t pkts:32;
2565 #endif
2566         } s;
2567         struct cvmx_pip_stat2_prtx_s cn30xx;
2568         struct cvmx_pip_stat2_prtx_s cn31xx;
2569         struct cvmx_pip_stat2_prtx_s cn38xx;
2570         struct cvmx_pip_stat2_prtx_s cn38xxp2;
2571         struct cvmx_pip_stat2_prtx_s cn50xx;
2572         struct cvmx_pip_stat2_prtx_s cn52xx;
2573         struct cvmx_pip_stat2_prtx_s cn52xxp1;
2574         struct cvmx_pip_stat2_prtx_s cn56xx;
2575         struct cvmx_pip_stat2_prtx_s cn56xxp1;
2576         struct cvmx_pip_stat2_prtx_s cn58xx;
2577         struct cvmx_pip_stat2_prtx_s cn58xxp1;
2578         struct cvmx_pip_stat2_prtx_s cn61xx;
2579         struct cvmx_pip_stat2_prtx_s cn63xx;
2580         struct cvmx_pip_stat2_prtx_s cn63xxp1;
2581         struct cvmx_pip_stat2_prtx_s cn66xx;
2582         struct cvmx_pip_stat2_prtx_s cnf71xx;
2583 };
2584
2585 union cvmx_pip_stat3_x {
2586         uint64_t u64;
2587         struct cvmx_pip_stat3_x_s {
2588 #ifdef __BIG_ENDIAN_BITFIELD
2589                 uint64_t bcst:32;
2590                 uint64_t mcst:32;
2591 #else
2592                 uint64_t mcst:32;
2593                 uint64_t bcst:32;
2594 #endif
2595         } s;
2596         struct cvmx_pip_stat3_x_s cn68xx;
2597         struct cvmx_pip_stat3_x_s cn68xxp1;
2598 };
2599
2600 union cvmx_pip_stat3_prtx {
2601         uint64_t u64;
2602         struct cvmx_pip_stat3_prtx_s {
2603 #ifdef __BIG_ENDIAN_BITFIELD
2604                 uint64_t bcst:32;
2605                 uint64_t mcst:32;
2606 #else
2607                 uint64_t mcst:32;
2608                 uint64_t bcst:32;
2609 #endif
2610         } s;
2611         struct cvmx_pip_stat3_prtx_s cn30xx;
2612         struct cvmx_pip_stat3_prtx_s cn31xx;
2613         struct cvmx_pip_stat3_prtx_s cn38xx;
2614         struct cvmx_pip_stat3_prtx_s cn38xxp2;
2615         struct cvmx_pip_stat3_prtx_s cn50xx;
2616         struct cvmx_pip_stat3_prtx_s cn52xx;
2617         struct cvmx_pip_stat3_prtx_s cn52xxp1;
2618         struct cvmx_pip_stat3_prtx_s cn56xx;
2619         struct cvmx_pip_stat3_prtx_s cn56xxp1;
2620         struct cvmx_pip_stat3_prtx_s cn58xx;
2621         struct cvmx_pip_stat3_prtx_s cn58xxp1;
2622         struct cvmx_pip_stat3_prtx_s cn61xx;
2623         struct cvmx_pip_stat3_prtx_s cn63xx;
2624         struct cvmx_pip_stat3_prtx_s cn63xxp1;
2625         struct cvmx_pip_stat3_prtx_s cn66xx;
2626         struct cvmx_pip_stat3_prtx_s cnf71xx;
2627 };
2628
2629 union cvmx_pip_stat4_x {
2630         uint64_t u64;
2631         struct cvmx_pip_stat4_x_s {
2632 #ifdef __BIG_ENDIAN_BITFIELD
2633                 uint64_t h65to127:32;
2634                 uint64_t h64:32;
2635 #else
2636                 uint64_t h64:32;
2637                 uint64_t h65to127:32;
2638 #endif
2639         } s;
2640         struct cvmx_pip_stat4_x_s cn68xx;
2641         struct cvmx_pip_stat4_x_s cn68xxp1;
2642 };
2643
2644 union cvmx_pip_stat4_prtx {
2645         uint64_t u64;
2646         struct cvmx_pip_stat4_prtx_s {
2647 #ifdef __BIG_ENDIAN_BITFIELD
2648                 uint64_t h65to127:32;
2649                 uint64_t h64:32;
2650 #else
2651                 uint64_t h64:32;
2652                 uint64_t h65to127:32;
2653 #endif
2654         } s;
2655         struct cvmx_pip_stat4_prtx_s cn30xx;
2656         struct cvmx_pip_stat4_prtx_s cn31xx;
2657         struct cvmx_pip_stat4_prtx_s cn38xx;
2658         struct cvmx_pip_stat4_prtx_s cn38xxp2;
2659         struct cvmx_pip_stat4_prtx_s cn50xx;
2660         struct cvmx_pip_stat4_prtx_s cn52xx;
2661         struct cvmx_pip_stat4_prtx_s cn52xxp1;
2662         struct cvmx_pip_stat4_prtx_s cn56xx;
2663         struct cvmx_pip_stat4_prtx_s cn56xxp1;
2664         struct cvmx_pip_stat4_prtx_s cn58xx;
2665         struct cvmx_pip_stat4_prtx_s cn58xxp1;
2666         struct cvmx_pip_stat4_prtx_s cn61xx;
2667         struct cvmx_pip_stat4_prtx_s cn63xx;
2668         struct cvmx_pip_stat4_prtx_s cn63xxp1;
2669         struct cvmx_pip_stat4_prtx_s cn66xx;
2670         struct cvmx_pip_stat4_prtx_s cnf71xx;
2671 };
2672
2673 union cvmx_pip_stat5_x {
2674         uint64_t u64;
2675         struct cvmx_pip_stat5_x_s {
2676 #ifdef __BIG_ENDIAN_BITFIELD
2677                 uint64_t h256to511:32;
2678                 uint64_t h128to255:32;
2679 #else
2680                 uint64_t h128to255:32;
2681                 uint64_t h256to511:32;
2682 #endif
2683         } s;
2684         struct cvmx_pip_stat5_x_s cn68xx;
2685         struct cvmx_pip_stat5_x_s cn68xxp1;
2686 };
2687
2688 union cvmx_pip_stat5_prtx {
2689         uint64_t u64;
2690         struct cvmx_pip_stat5_prtx_s {
2691 #ifdef __BIG_ENDIAN_BITFIELD
2692                 uint64_t h256to511:32;
2693                 uint64_t h128to255:32;
2694 #else
2695                 uint64_t h128to255:32;
2696                 uint64_t h256to511:32;
2697 #endif
2698         } s;
2699         struct cvmx_pip_stat5_prtx_s cn30xx;
2700         struct cvmx_pip_stat5_prtx_s cn31xx;
2701         struct cvmx_pip_stat5_prtx_s cn38xx;
2702         struct cvmx_pip_stat5_prtx_s cn38xxp2;
2703         struct cvmx_pip_stat5_prtx_s cn50xx;
2704         struct cvmx_pip_stat5_prtx_s cn52xx;
2705         struct cvmx_pip_stat5_prtx_s cn52xxp1;
2706         struct cvmx_pip_stat5_prtx_s cn56xx;
2707         struct cvmx_pip_stat5_prtx_s cn56xxp1;
2708         struct cvmx_pip_stat5_prtx_s cn58xx;
2709         struct cvmx_pip_stat5_prtx_s cn58xxp1;
2710         struct cvmx_pip_stat5_prtx_s cn61xx;
2711         struct cvmx_pip_stat5_prtx_s cn63xx;
2712         struct cvmx_pip_stat5_prtx_s cn63xxp1;
2713         struct cvmx_pip_stat5_prtx_s cn66xx;
2714         struct cvmx_pip_stat5_prtx_s cnf71xx;
2715 };
2716
2717 union cvmx_pip_stat6_x {
2718         uint64_t u64;
2719         struct cvmx_pip_stat6_x_s {
2720 #ifdef __BIG_ENDIAN_BITFIELD
2721                 uint64_t h1024to1518:32;
2722                 uint64_t h512to1023:32;
2723 #else
2724                 uint64_t h512to1023:32;
2725                 uint64_t h1024to1518:32;
2726 #endif
2727         } s;
2728         struct cvmx_pip_stat6_x_s cn68xx;
2729         struct cvmx_pip_stat6_x_s cn68xxp1;
2730 };
2731
2732 union cvmx_pip_stat6_prtx {
2733         uint64_t u64;
2734         struct cvmx_pip_stat6_prtx_s {
2735 #ifdef __BIG_ENDIAN_BITFIELD
2736                 uint64_t h1024to1518:32;
2737                 uint64_t h512to1023:32;
2738 #else
2739                 uint64_t h512to1023:32;
2740                 uint64_t h1024to1518:32;
2741 #endif
2742         } s;
2743         struct cvmx_pip_stat6_prtx_s cn30xx;
2744         struct cvmx_pip_stat6_prtx_s cn31xx;
2745         struct cvmx_pip_stat6_prtx_s cn38xx;
2746         struct cvmx_pip_stat6_prtx_s cn38xxp2;
2747         struct cvmx_pip_stat6_prtx_s cn50xx;
2748         struct cvmx_pip_stat6_prtx_s cn52xx;
2749         struct cvmx_pip_stat6_prtx_s cn52xxp1;
2750         struct cvmx_pip_stat6_prtx_s cn56xx;
2751         struct cvmx_pip_stat6_prtx_s cn56xxp1;
2752         struct cvmx_pip_stat6_prtx_s cn58xx;
2753         struct cvmx_pip_stat6_prtx_s cn58xxp1;
2754         struct cvmx_pip_stat6_prtx_s cn61xx;
2755         struct cvmx_pip_stat6_prtx_s cn63xx;
2756         struct cvmx_pip_stat6_prtx_s cn63xxp1;
2757         struct cvmx_pip_stat6_prtx_s cn66xx;
2758         struct cvmx_pip_stat6_prtx_s cnf71xx;
2759 };
2760
2761 union cvmx_pip_stat7_x {
2762         uint64_t u64;
2763         struct cvmx_pip_stat7_x_s {
2764 #ifdef __BIG_ENDIAN_BITFIELD
2765                 uint64_t fcs:32;
2766                 uint64_t h1519:32;
2767 #else
2768                 uint64_t h1519:32;
2769                 uint64_t fcs:32;
2770 #endif
2771         } s;
2772         struct cvmx_pip_stat7_x_s cn68xx;
2773         struct cvmx_pip_stat7_x_s cn68xxp1;
2774 };
2775
2776 union cvmx_pip_stat7_prtx {
2777         uint64_t u64;
2778         struct cvmx_pip_stat7_prtx_s {
2779 #ifdef __BIG_ENDIAN_BITFIELD
2780                 uint64_t fcs:32;
2781                 uint64_t h1519:32;
2782 #else
2783                 uint64_t h1519:32;
2784                 uint64_t fcs:32;
2785 #endif
2786         } s;
2787         struct cvmx_pip_stat7_prtx_s cn30xx;
2788         struct cvmx_pip_stat7_prtx_s cn31xx;
2789         struct cvmx_pip_stat7_prtx_s cn38xx;
2790         struct cvmx_pip_stat7_prtx_s cn38xxp2;
2791         struct cvmx_pip_stat7_prtx_s cn50xx;
2792         struct cvmx_pip_stat7_prtx_s cn52xx;
2793         struct cvmx_pip_stat7_prtx_s cn52xxp1;
2794         struct cvmx_pip_stat7_prtx_s cn56xx;
2795         struct cvmx_pip_stat7_prtx_s cn56xxp1;
2796         struct cvmx_pip_stat7_prtx_s cn58xx;
2797         struct cvmx_pip_stat7_prtx_s cn58xxp1;
2798         struct cvmx_pip_stat7_prtx_s cn61xx;
2799         struct cvmx_pip_stat7_prtx_s cn63xx;
2800         struct cvmx_pip_stat7_prtx_s cn63xxp1;
2801         struct cvmx_pip_stat7_prtx_s cn66xx;
2802         struct cvmx_pip_stat7_prtx_s cnf71xx;
2803 };
2804
2805 union cvmx_pip_stat8_x {
2806         uint64_t u64;
2807         struct cvmx_pip_stat8_x_s {
2808 #ifdef __BIG_ENDIAN_BITFIELD
2809                 uint64_t frag:32;
2810                 uint64_t undersz:32;
2811 #else
2812                 uint64_t undersz:32;
2813                 uint64_t frag:32;
2814 #endif
2815         } s;
2816         struct cvmx_pip_stat8_x_s cn68xx;
2817         struct cvmx_pip_stat8_x_s cn68xxp1;
2818 };
2819
2820 union cvmx_pip_stat8_prtx {
2821         uint64_t u64;
2822         struct cvmx_pip_stat8_prtx_s {
2823 #ifdef __BIG_ENDIAN_BITFIELD
2824                 uint64_t frag:32;
2825                 uint64_t undersz:32;
2826 #else
2827                 uint64_t undersz:32;
2828                 uint64_t frag:32;
2829 #endif
2830         } s;
2831         struct cvmx_pip_stat8_prtx_s cn30xx;
2832         struct cvmx_pip_stat8_prtx_s cn31xx;
2833         struct cvmx_pip_stat8_prtx_s cn38xx;
2834         struct cvmx_pip_stat8_prtx_s cn38xxp2;
2835         struct cvmx_pip_stat8_prtx_s cn50xx;
2836         struct cvmx_pip_stat8_prtx_s cn52xx;
2837         struct cvmx_pip_stat8_prtx_s cn52xxp1;
2838         struct cvmx_pip_stat8_prtx_s cn56xx;
2839         struct cvmx_pip_stat8_prtx_s cn56xxp1;
2840         struct cvmx_pip_stat8_prtx_s cn58xx;
2841         struct cvmx_pip_stat8_prtx_s cn58xxp1;
2842         struct cvmx_pip_stat8_prtx_s cn61xx;
2843         struct cvmx_pip_stat8_prtx_s cn63xx;
2844         struct cvmx_pip_stat8_prtx_s cn63xxp1;
2845         struct cvmx_pip_stat8_prtx_s cn66xx;
2846         struct cvmx_pip_stat8_prtx_s cnf71xx;
2847 };
2848
2849 union cvmx_pip_stat9_x {
2850         uint64_t u64;
2851         struct cvmx_pip_stat9_x_s {
2852 #ifdef __BIG_ENDIAN_BITFIELD
2853                 uint64_t jabber:32;
2854                 uint64_t oversz:32;
2855 #else
2856                 uint64_t oversz:32;
2857                 uint64_t jabber:32;
2858 #endif
2859         } s;
2860         struct cvmx_pip_stat9_x_s cn68xx;
2861         struct cvmx_pip_stat9_x_s cn68xxp1;
2862 };
2863
2864 union cvmx_pip_stat9_prtx {
2865         uint64_t u64;
2866         struct cvmx_pip_stat9_prtx_s {
2867 #ifdef __BIG_ENDIAN_BITFIELD
2868                 uint64_t jabber:32;
2869                 uint64_t oversz:32;
2870 #else
2871                 uint64_t oversz:32;
2872                 uint64_t jabber:32;
2873 #endif
2874         } s;
2875         struct cvmx_pip_stat9_prtx_s cn30xx;
2876         struct cvmx_pip_stat9_prtx_s cn31xx;
2877         struct cvmx_pip_stat9_prtx_s cn38xx;
2878         struct cvmx_pip_stat9_prtx_s cn38xxp2;
2879         struct cvmx_pip_stat9_prtx_s cn50xx;
2880         struct cvmx_pip_stat9_prtx_s cn52xx;
2881         struct cvmx_pip_stat9_prtx_s cn52xxp1;
2882         struct cvmx_pip_stat9_prtx_s cn56xx;
2883         struct cvmx_pip_stat9_prtx_s cn56xxp1;
2884         struct cvmx_pip_stat9_prtx_s cn58xx;
2885         struct cvmx_pip_stat9_prtx_s cn58xxp1;
2886         struct cvmx_pip_stat9_prtx_s cn61xx;
2887         struct cvmx_pip_stat9_prtx_s cn63xx;
2888         struct cvmx_pip_stat9_prtx_s cn63xxp1;
2889         struct cvmx_pip_stat9_prtx_s cn66xx;
2890         struct cvmx_pip_stat9_prtx_s cnf71xx;
2891 };
2892
2893 union cvmx_pip_stat_ctl {
2894         uint64_t u64;
2895         struct cvmx_pip_stat_ctl_s {
2896 #ifdef __BIG_ENDIAN_BITFIELD
2897                 uint64_t reserved_9_63:55;
2898                 uint64_t mode:1;
2899                 uint64_t reserved_1_7:7;
2900                 uint64_t rdclr:1;
2901 #else
2902                 uint64_t rdclr:1;
2903                 uint64_t reserved_1_7:7;
2904                 uint64_t mode:1;
2905                 uint64_t reserved_9_63:55;
2906 #endif
2907         } s;
2908         struct cvmx_pip_stat_ctl_cn30xx {
2909 #ifdef __BIG_ENDIAN_BITFIELD
2910                 uint64_t reserved_1_63:63;
2911                 uint64_t rdclr:1;
2912 #else
2913                 uint64_t rdclr:1;
2914                 uint64_t reserved_1_63:63;
2915 #endif
2916         } cn30xx;
2917         struct cvmx_pip_stat_ctl_cn30xx cn31xx;
2918         struct cvmx_pip_stat_ctl_cn30xx cn38xx;
2919         struct cvmx_pip_stat_ctl_cn30xx cn38xxp2;
2920         struct cvmx_pip_stat_ctl_cn30xx cn50xx;
2921         struct cvmx_pip_stat_ctl_cn30xx cn52xx;
2922         struct cvmx_pip_stat_ctl_cn30xx cn52xxp1;
2923         struct cvmx_pip_stat_ctl_cn30xx cn56xx;
2924         struct cvmx_pip_stat_ctl_cn30xx cn56xxp1;
2925         struct cvmx_pip_stat_ctl_cn30xx cn58xx;
2926         struct cvmx_pip_stat_ctl_cn30xx cn58xxp1;
2927         struct cvmx_pip_stat_ctl_cn30xx cn61xx;
2928         struct cvmx_pip_stat_ctl_cn30xx cn63xx;
2929         struct cvmx_pip_stat_ctl_cn30xx cn63xxp1;
2930         struct cvmx_pip_stat_ctl_cn30xx cn66xx;
2931         struct cvmx_pip_stat_ctl_s cn68xx;
2932         struct cvmx_pip_stat_ctl_s cn68xxp1;
2933         struct cvmx_pip_stat_ctl_cn30xx cnf71xx;
2934 };
2935
2936 union cvmx_pip_stat_inb_errsx {
2937         uint64_t u64;
2938         struct cvmx_pip_stat_inb_errsx_s {
2939 #ifdef __BIG_ENDIAN_BITFIELD
2940                 uint64_t reserved_16_63:48;
2941                 uint64_t errs:16;
2942 #else
2943                 uint64_t errs:16;
2944                 uint64_t reserved_16_63:48;
2945 #endif
2946         } s;
2947         struct cvmx_pip_stat_inb_errsx_s cn30xx;
2948         struct cvmx_pip_stat_inb_errsx_s cn31xx;
2949         struct cvmx_pip_stat_inb_errsx_s cn38xx;
2950         struct cvmx_pip_stat_inb_errsx_s cn38xxp2;
2951         struct cvmx_pip_stat_inb_errsx_s cn50xx;
2952         struct cvmx_pip_stat_inb_errsx_s cn52xx;
2953         struct cvmx_pip_stat_inb_errsx_s cn52xxp1;
2954         struct cvmx_pip_stat_inb_errsx_s cn56xx;
2955         struct cvmx_pip_stat_inb_errsx_s cn56xxp1;
2956         struct cvmx_pip_stat_inb_errsx_s cn58xx;
2957         struct cvmx_pip_stat_inb_errsx_s cn58xxp1;
2958         struct cvmx_pip_stat_inb_errsx_s cn61xx;
2959         struct cvmx_pip_stat_inb_errsx_s cn63xx;
2960         struct cvmx_pip_stat_inb_errsx_s cn63xxp1;
2961         struct cvmx_pip_stat_inb_errsx_s cn66xx;
2962         struct cvmx_pip_stat_inb_errsx_s cnf71xx;
2963 };
2964
2965 union cvmx_pip_stat_inb_errs_pkndx {
2966         uint64_t u64;
2967         struct cvmx_pip_stat_inb_errs_pkndx_s {
2968 #ifdef __BIG_ENDIAN_BITFIELD
2969                 uint64_t reserved_16_63:48;
2970                 uint64_t errs:16;
2971 #else
2972                 uint64_t errs:16;
2973                 uint64_t reserved_16_63:48;
2974 #endif
2975         } s;
2976         struct cvmx_pip_stat_inb_errs_pkndx_s cn68xx;
2977         struct cvmx_pip_stat_inb_errs_pkndx_s cn68xxp1;
2978 };
2979
2980 union cvmx_pip_stat_inb_octsx {
2981         uint64_t u64;
2982         struct cvmx_pip_stat_inb_octsx_s {
2983 #ifdef __BIG_ENDIAN_BITFIELD
2984                 uint64_t reserved_48_63:16;
2985                 uint64_t octs:48;
2986 #else
2987                 uint64_t octs:48;
2988                 uint64_t reserved_48_63:16;
2989 #endif
2990         } s;
2991         struct cvmx_pip_stat_inb_octsx_s cn30xx;
2992         struct cvmx_pip_stat_inb_octsx_s cn31xx;
2993         struct cvmx_pip_stat_inb_octsx_s cn38xx;
2994         struct cvmx_pip_stat_inb_octsx_s cn38xxp2;
2995         struct cvmx_pip_stat_inb_octsx_s cn50xx;
2996         struct cvmx_pip_stat_inb_octsx_s cn52xx;
2997         struct cvmx_pip_stat_inb_octsx_s cn52xxp1;
2998         struct cvmx_pip_stat_inb_octsx_s cn56xx;
2999         struct cvmx_pip_stat_inb_octsx_s cn56xxp1;
3000         struct cvmx_pip_stat_inb_octsx_s cn58xx;
3001         struct cvmx_pip_stat_inb_octsx_s cn58xxp1;
3002         struct cvmx_pip_stat_inb_octsx_s cn61xx;
3003         struct cvmx_pip_stat_inb_octsx_s cn63xx;
3004         struct cvmx_pip_stat_inb_octsx_s cn63xxp1;
3005         struct cvmx_pip_stat_inb_octsx_s cn66xx;
3006         struct cvmx_pip_stat_inb_octsx_s cnf71xx;
3007 };
3008
3009 union cvmx_pip_stat_inb_octs_pkndx {
3010         uint64_t u64;
3011         struct cvmx_pip_stat_inb_octs_pkndx_s {
3012 #ifdef __BIG_ENDIAN_BITFIELD
3013                 uint64_t reserved_48_63:16;
3014                 uint64_t octs:48;
3015 #else
3016                 uint64_t octs:48;
3017                 uint64_t reserved_48_63:16;
3018 #endif
3019         } s;
3020         struct cvmx_pip_stat_inb_octs_pkndx_s cn68xx;
3021         struct cvmx_pip_stat_inb_octs_pkndx_s cn68xxp1;
3022 };
3023
3024 union cvmx_pip_stat_inb_pktsx {
3025         uint64_t u64;
3026         struct cvmx_pip_stat_inb_pktsx_s {
3027 #ifdef __BIG_ENDIAN_BITFIELD
3028                 uint64_t reserved_32_63:32;
3029                 uint64_t pkts:32;
3030 #else
3031                 uint64_t pkts:32;
3032                 uint64_t reserved_32_63:32;
3033 #endif
3034         } s;
3035         struct cvmx_pip_stat_inb_pktsx_s cn30xx;
3036         struct cvmx_pip_stat_inb_pktsx_s cn31xx;
3037         struct cvmx_pip_stat_inb_pktsx_s cn38xx;
3038         struct cvmx_pip_stat_inb_pktsx_s cn38xxp2;
3039         struct cvmx_pip_stat_inb_pktsx_s cn50xx;
3040         struct cvmx_pip_stat_inb_pktsx_s cn52xx;
3041         struct cvmx_pip_stat_inb_pktsx_s cn52xxp1;
3042         struct cvmx_pip_stat_inb_pktsx_s cn56xx;
3043         struct cvmx_pip_stat_inb_pktsx_s cn56xxp1;
3044         struct cvmx_pip_stat_inb_pktsx_s cn58xx;
3045         struct cvmx_pip_stat_inb_pktsx_s cn58xxp1;
3046         struct cvmx_pip_stat_inb_pktsx_s cn61xx;
3047         struct cvmx_pip_stat_inb_pktsx_s cn63xx;
3048         struct cvmx_pip_stat_inb_pktsx_s cn63xxp1;
3049         struct cvmx_pip_stat_inb_pktsx_s cn66xx;
3050         struct cvmx_pip_stat_inb_pktsx_s cnf71xx;
3051 };
3052
3053 union cvmx_pip_stat_inb_pkts_pkndx {
3054         uint64_t u64;
3055         struct cvmx_pip_stat_inb_pkts_pkndx_s {
3056 #ifdef __BIG_ENDIAN_BITFIELD
3057                 uint64_t reserved_32_63:32;
3058                 uint64_t pkts:32;
3059 #else
3060                 uint64_t pkts:32;
3061                 uint64_t reserved_32_63:32;
3062 #endif
3063         } s;
3064         struct cvmx_pip_stat_inb_pkts_pkndx_s cn68xx;
3065         struct cvmx_pip_stat_inb_pkts_pkndx_s cn68xxp1;
3066 };
3067
3068 union cvmx_pip_sub_pkind_fcsx {
3069         uint64_t u64;
3070         struct cvmx_pip_sub_pkind_fcsx_s {
3071 #ifdef __BIG_ENDIAN_BITFIELD
3072                 uint64_t port_bit:64;
3073 #else
3074                 uint64_t port_bit:64;
3075 #endif
3076         } s;
3077         struct cvmx_pip_sub_pkind_fcsx_s cn68xx;
3078         struct cvmx_pip_sub_pkind_fcsx_s cn68xxp1;
3079 };
3080
3081 union cvmx_pip_tag_incx {
3082         uint64_t u64;
3083         struct cvmx_pip_tag_incx_s {
3084 #ifdef __BIG_ENDIAN_BITFIELD
3085                 uint64_t reserved_8_63:56;
3086                 uint64_t en:8;
3087 #else
3088                 uint64_t en:8;
3089                 uint64_t reserved_8_63:56;
3090 #endif
3091         } s;
3092         struct cvmx_pip_tag_incx_s cn30xx;
3093         struct cvmx_pip_tag_incx_s cn31xx;
3094         struct cvmx_pip_tag_incx_s cn38xx;
3095         struct cvmx_pip_tag_incx_s cn38xxp2;
3096         struct cvmx_pip_tag_incx_s cn50xx;
3097         struct cvmx_pip_tag_incx_s cn52xx;
3098         struct cvmx_pip_tag_incx_s cn52xxp1;
3099         struct cvmx_pip_tag_incx_s cn56xx;
3100         struct cvmx_pip_tag_incx_s cn56xxp1;
3101         struct cvmx_pip_tag_incx_s cn58xx;
3102         struct cvmx_pip_tag_incx_s cn58xxp1;
3103         struct cvmx_pip_tag_incx_s cn61xx;
3104         struct cvmx_pip_tag_incx_s cn63xx;
3105         struct cvmx_pip_tag_incx_s cn63xxp1;
3106         struct cvmx_pip_tag_incx_s cn66xx;
3107         struct cvmx_pip_tag_incx_s cn68xx;
3108         struct cvmx_pip_tag_incx_s cn68xxp1;
3109         struct cvmx_pip_tag_incx_s cnf71xx;
3110 };
3111
3112 union cvmx_pip_tag_mask {
3113         uint64_t u64;
3114         struct cvmx_pip_tag_mask_s {
3115 #ifdef __BIG_ENDIAN_BITFIELD
3116                 uint64_t reserved_16_63:48;
3117                 uint64_t mask:16;
3118 #else
3119                 uint64_t mask:16;
3120                 uint64_t reserved_16_63:48;
3121 #endif
3122         } s;
3123         struct cvmx_pip_tag_mask_s cn30xx;
3124         struct cvmx_pip_tag_mask_s cn31xx;
3125         struct cvmx_pip_tag_mask_s cn38xx;
3126         struct cvmx_pip_tag_mask_s cn38xxp2;
3127         struct cvmx_pip_tag_mask_s cn50xx;
3128         struct cvmx_pip_tag_mask_s cn52xx;
3129         struct cvmx_pip_tag_mask_s cn52xxp1;
3130         struct cvmx_pip_tag_mask_s cn56xx;
3131         struct cvmx_pip_tag_mask_s cn56xxp1;
3132         struct cvmx_pip_tag_mask_s cn58xx;
3133         struct cvmx_pip_tag_mask_s cn58xxp1;
3134         struct cvmx_pip_tag_mask_s cn61xx;
3135         struct cvmx_pip_tag_mask_s cn63xx;
3136         struct cvmx_pip_tag_mask_s cn63xxp1;
3137         struct cvmx_pip_tag_mask_s cn66xx;
3138         struct cvmx_pip_tag_mask_s cn68xx;
3139         struct cvmx_pip_tag_mask_s cn68xxp1;
3140         struct cvmx_pip_tag_mask_s cnf71xx;
3141 };
3142
3143 union cvmx_pip_tag_secret {
3144         uint64_t u64;
3145         struct cvmx_pip_tag_secret_s {
3146 #ifdef __BIG_ENDIAN_BITFIELD
3147                 uint64_t reserved_32_63:32;
3148                 uint64_t dst:16;
3149                 uint64_t src:16;
3150 #else
3151                 uint64_t src:16;
3152                 uint64_t dst:16;
3153                 uint64_t reserved_32_63:32;
3154 #endif
3155         } s;
3156         struct cvmx_pip_tag_secret_s cn30xx;
3157         struct cvmx_pip_tag_secret_s cn31xx;
3158         struct cvmx_pip_tag_secret_s cn38xx;
3159         struct cvmx_pip_tag_secret_s cn38xxp2;
3160         struct cvmx_pip_tag_secret_s cn50xx;
3161         struct cvmx_pip_tag_secret_s cn52xx;
3162         struct cvmx_pip_tag_secret_s cn52xxp1;
3163         struct cvmx_pip_tag_secret_s cn56xx;
3164         struct cvmx_pip_tag_secret_s cn56xxp1;
3165         struct cvmx_pip_tag_secret_s cn58xx;
3166         struct cvmx_pip_tag_secret_s cn58xxp1;
3167         struct cvmx_pip_tag_secret_s cn61xx;
3168         struct cvmx_pip_tag_secret_s cn63xx;
3169         struct cvmx_pip_tag_secret_s cn63xxp1;
3170         struct cvmx_pip_tag_secret_s cn66xx;
3171         struct cvmx_pip_tag_secret_s cn68xx;
3172         struct cvmx_pip_tag_secret_s cn68xxp1;
3173         struct cvmx_pip_tag_secret_s cnf71xx;
3174 };
3175
3176 union cvmx_pip_todo_entry {
3177         uint64_t u64;
3178         struct cvmx_pip_todo_entry_s {
3179 #ifdef __BIG_ENDIAN_BITFIELD
3180                 uint64_t val:1;
3181                 uint64_t reserved_62_62:1;
3182                 uint64_t entry:62;
3183 #else
3184                 uint64_t entry:62;
3185                 uint64_t reserved_62_62:1;
3186                 uint64_t val:1;
3187 #endif
3188         } s;
3189         struct cvmx_pip_todo_entry_s cn30xx;
3190         struct cvmx_pip_todo_entry_s cn31xx;
3191         struct cvmx_pip_todo_entry_s cn38xx;
3192         struct cvmx_pip_todo_entry_s cn38xxp2;
3193         struct cvmx_pip_todo_entry_s cn50xx;
3194         struct cvmx_pip_todo_entry_s cn52xx;
3195         struct cvmx_pip_todo_entry_s cn52xxp1;
3196         struct cvmx_pip_todo_entry_s cn56xx;
3197         struct cvmx_pip_todo_entry_s cn56xxp1;
3198         struct cvmx_pip_todo_entry_s cn58xx;
3199         struct cvmx_pip_todo_entry_s cn58xxp1;
3200         struct cvmx_pip_todo_entry_s cn61xx;
3201         struct cvmx_pip_todo_entry_s cn63xx;
3202         struct cvmx_pip_todo_entry_s cn63xxp1;
3203         struct cvmx_pip_todo_entry_s cn66xx;
3204         struct cvmx_pip_todo_entry_s cn68xx;
3205         struct cvmx_pip_todo_entry_s cn68xxp1;
3206         struct cvmx_pip_todo_entry_s cnf71xx;
3207 };
3208
3209 union cvmx_pip_vlan_etypesx {
3210         uint64_t u64;
3211         struct cvmx_pip_vlan_etypesx_s {
3212 #ifdef __BIG_ENDIAN_BITFIELD
3213                 uint64_t type3:16;
3214                 uint64_t type2:16;
3215                 uint64_t type1:16;
3216                 uint64_t type0:16;
3217 #else
3218                 uint64_t type0:16;
3219                 uint64_t type1:16;
3220                 uint64_t type2:16;
3221                 uint64_t type3:16;
3222 #endif
3223         } s;
3224         struct cvmx_pip_vlan_etypesx_s cn61xx;
3225         struct cvmx_pip_vlan_etypesx_s cn66xx;
3226         struct cvmx_pip_vlan_etypesx_s cn68xx;
3227         struct cvmx_pip_vlan_etypesx_s cnf71xx;
3228 };
3229
3230 union cvmx_pip_xstat0_prtx {
3231         uint64_t u64;
3232         struct cvmx_pip_xstat0_prtx_s {
3233 #ifdef __BIG_ENDIAN_BITFIELD
3234                 uint64_t drp_pkts:32;
3235                 uint64_t drp_octs:32;
3236 #else
3237                 uint64_t drp_octs:32;
3238                 uint64_t drp_pkts:32;
3239 #endif
3240         } s;
3241         struct cvmx_pip_xstat0_prtx_s cn63xx;
3242         struct cvmx_pip_xstat0_prtx_s cn63xxp1;
3243         struct cvmx_pip_xstat0_prtx_s cn66xx;
3244 };
3245
3246 union cvmx_pip_xstat10_prtx {
3247         uint64_t u64;
3248         struct cvmx_pip_xstat10_prtx_s {
3249 #ifdef __BIG_ENDIAN_BITFIELD
3250                 uint64_t bcast:32;
3251                 uint64_t mcast:32;
3252 #else
3253                 uint64_t mcast:32;
3254                 uint64_t bcast:32;
3255 #endif
3256         } s;
3257         struct cvmx_pip_xstat10_prtx_s cn63xx;
3258         struct cvmx_pip_xstat10_prtx_s cn63xxp1;
3259         struct cvmx_pip_xstat10_prtx_s cn66xx;
3260 };
3261
3262 union cvmx_pip_xstat11_prtx {
3263         uint64_t u64;
3264         struct cvmx_pip_xstat11_prtx_s {
3265 #ifdef __BIG_ENDIAN_BITFIELD
3266                 uint64_t bcast:32;
3267                 uint64_t mcast:32;
3268 #else
3269                 uint64_t mcast:32;
3270                 uint64_t bcast:32;
3271 #endif
3272         } s;
3273         struct cvmx_pip_xstat11_prtx_s cn63xx;
3274         struct cvmx_pip_xstat11_prtx_s cn63xxp1;
3275         struct cvmx_pip_xstat11_prtx_s cn66xx;
3276 };
3277
3278 union cvmx_pip_xstat1_prtx {
3279         uint64_t u64;
3280         struct cvmx_pip_xstat1_prtx_s {
3281 #ifdef __BIG_ENDIAN_BITFIELD
3282                 uint64_t reserved_48_63:16;
3283                 uint64_t octs:48;
3284 #else
3285                 uint64_t octs:48;
3286                 uint64_t reserved_48_63:16;
3287 #endif
3288         } s;
3289         struct cvmx_pip_xstat1_prtx_s cn63xx;
3290         struct cvmx_pip_xstat1_prtx_s cn63xxp1;
3291         struct cvmx_pip_xstat1_prtx_s cn66xx;
3292 };
3293
3294 union cvmx_pip_xstat2_prtx {
3295         uint64_t u64;
3296         struct cvmx_pip_xstat2_prtx_s {
3297 #ifdef __BIG_ENDIAN_BITFIELD
3298                 uint64_t pkts:32;
3299                 uint64_t raw:32;
3300 #else
3301                 uint64_t raw:32;
3302                 uint64_t pkts:32;
3303 #endif
3304         } s;
3305         struct cvmx_pip_xstat2_prtx_s cn63xx;
3306         struct cvmx_pip_xstat2_prtx_s cn63xxp1;
3307         struct cvmx_pip_xstat2_prtx_s cn66xx;
3308 };
3309
3310 union cvmx_pip_xstat3_prtx {
3311         uint64_t u64;
3312         struct cvmx_pip_xstat3_prtx_s {
3313 #ifdef __BIG_ENDIAN_BITFIELD
3314                 uint64_t bcst:32;
3315                 uint64_t mcst:32;
3316 #else
3317                 uint64_t mcst:32;
3318                 uint64_t bcst:32;
3319 #endif
3320         } s;
3321         struct cvmx_pip_xstat3_prtx_s cn63xx;
3322         struct cvmx_pip_xstat3_prtx_s cn63xxp1;
3323         struct cvmx_pip_xstat3_prtx_s cn66xx;
3324 };
3325
3326 union cvmx_pip_xstat4_prtx {
3327         uint64_t u64;
3328         struct cvmx_pip_xstat4_prtx_s {
3329 #ifdef __BIG_ENDIAN_BITFIELD
3330                 uint64_t h65to127:32;
3331                 uint64_t h64:32;
3332 #else
3333                 uint64_t h64:32;
3334                 uint64_t h65to127:32;
3335 #endif
3336         } s;
3337         struct cvmx_pip_xstat4_prtx_s cn63xx;
3338         struct cvmx_pip_xstat4_prtx_s cn63xxp1;
3339         struct cvmx_pip_xstat4_prtx_s cn66xx;
3340 };
3341
3342 union cvmx_pip_xstat5_prtx {
3343         uint64_t u64;
3344         struct cvmx_pip_xstat5_prtx_s {
3345 #ifdef __BIG_ENDIAN_BITFIELD
3346                 uint64_t h256to511:32;
3347                 uint64_t h128to255:32;
3348 #else
3349                 uint64_t h128to255:32;
3350                 uint64_t h256to511:32;
3351 #endif
3352         } s;
3353         struct cvmx_pip_xstat5_prtx_s cn63xx;
3354         struct cvmx_pip_xstat5_prtx_s cn63xxp1;
3355         struct cvmx_pip_xstat5_prtx_s cn66xx;
3356 };
3357
3358 union cvmx_pip_xstat6_prtx {
3359         uint64_t u64;
3360         struct cvmx_pip_xstat6_prtx_s {
3361 #ifdef __BIG_ENDIAN_BITFIELD
3362                 uint64_t h1024to1518:32;
3363                 uint64_t h512to1023:32;
3364 #else
3365                 uint64_t h512to1023:32;
3366                 uint64_t h1024to1518:32;
3367 #endif
3368         } s;
3369         struct cvmx_pip_xstat6_prtx_s cn63xx;
3370         struct cvmx_pip_xstat6_prtx_s cn63xxp1;
3371         struct cvmx_pip_xstat6_prtx_s cn66xx;
3372 };
3373
3374 union cvmx_pip_xstat7_prtx {
3375         uint64_t u64;
3376         struct cvmx_pip_xstat7_prtx_s {
3377 #ifdef __BIG_ENDIAN_BITFIELD
3378                 uint64_t fcs:32;
3379                 uint64_t h1519:32;
3380 #else
3381                 uint64_t h1519:32;
3382                 uint64_t fcs:32;
3383 #endif
3384         } s;
3385         struct cvmx_pip_xstat7_prtx_s cn63xx;
3386         struct cvmx_pip_xstat7_prtx_s cn63xxp1;
3387         struct cvmx_pip_xstat7_prtx_s cn66xx;
3388 };
3389
3390 union cvmx_pip_xstat8_prtx {
3391         uint64_t u64;
3392         struct cvmx_pip_xstat8_prtx_s {
3393 #ifdef __BIG_ENDIAN_BITFIELD
3394                 uint64_t frag:32;
3395                 uint64_t undersz:32;
3396 #else
3397                 uint64_t undersz:32;
3398                 uint64_t frag:32;
3399 #endif
3400         } s;
3401         struct cvmx_pip_xstat8_prtx_s cn63xx;
3402         struct cvmx_pip_xstat8_prtx_s cn63xxp1;
3403         struct cvmx_pip_xstat8_prtx_s cn66xx;
3404 };
3405
3406 union cvmx_pip_xstat9_prtx {
3407         uint64_t u64;
3408         struct cvmx_pip_xstat9_prtx_s {
3409 #ifdef __BIG_ENDIAN_BITFIELD
3410                 uint64_t jabber:32;
3411                 uint64_t oversz:32;
3412 #else
3413                 uint64_t oversz:32;
3414                 uint64_t jabber:32;
3415 #endif
3416         } s;
3417         struct cvmx_pip_xstat9_prtx_s cn63xx;
3418         struct cvmx_pip_xstat9_prtx_s cn63xxp1;
3419         struct cvmx_pip_xstat9_prtx_s cn66xx;
3420 };
3421
3422 #endif