Pull button into test branch
[linux-drm-fsl-dcu.git] / arch / ia64 / kernel / smpboot.c
1 /*
2  * SMP boot-related support
3  *
4  * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
5  *      David Mosberger-Tang <davidm@hpl.hp.com>
6  * Copyright (C) 2001, 2004-2005 Intel Corp
7  *      Rohit Seth <rohit.seth@intel.com>
8  *      Suresh Siddha <suresh.b.siddha@intel.com>
9  *      Gordon Jin <gordon.jin@intel.com>
10  *      Ashok Raj  <ashok.raj@intel.com>
11  *
12  * 01/05/16 Rohit Seth <rohit.seth@intel.com>   Moved SMP booting functions from smp.c to here.
13  * 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code.
14  * 02/07/31 David Mosberger <davidm@hpl.hp.com> Switch over to hotplug-CPU boot-sequence.
15  *                                              smp_boot_cpus()/smp_commence() is replaced by
16  *                                              smp_prepare_cpus()/__cpu_up()/smp_cpus_done().
17  * 04/06/21 Ashok Raj           <ashok.raj@intel.com> Added CPU Hotplug Support
18  * 04/12/26 Jin Gordon <gordon.jin@intel.com>
19  * 04/12/26 Rohit Seth <rohit.seth@intel.com>
20  *                                              Add multi-threading and multi-core detection
21  * 05/01/30 Suresh Siddha <suresh.b.siddha@intel.com>
22  *                                              Setup cpu_sibling_map and cpu_core_map
23  */
24
25 #include <linux/module.h>
26 #include <linux/acpi.h>
27 #include <linux/bootmem.h>
28 #include <linux/cpu.h>
29 #include <linux/delay.h>
30 #include <linux/init.h>
31 #include <linux/interrupt.h>
32 #include <linux/irq.h>
33 #include <linux/kernel.h>
34 #include <linux/kernel_stat.h>
35 #include <linux/mm.h>
36 #include <linux/notifier.h>
37 #include <linux/smp.h>
38 #include <linux/smp_lock.h>
39 #include <linux/spinlock.h>
40 #include <linux/efi.h>
41 #include <linux/percpu.h>
42 #include <linux/bitops.h>
43
44 #include <asm/atomic.h>
45 #include <asm/cache.h>
46 #include <asm/current.h>
47 #include <asm/delay.h>
48 #include <asm/ia32.h>
49 #include <asm/io.h>
50 #include <asm/irq.h>
51 #include <asm/machvec.h>
52 #include <asm/mca.h>
53 #include <asm/page.h>
54 #include <asm/pgalloc.h>
55 #include <asm/pgtable.h>
56 #include <asm/processor.h>
57 #include <asm/ptrace.h>
58 #include <asm/sal.h>
59 #include <asm/system.h>
60 #include <asm/tlbflush.h>
61 #include <asm/unistd.h>
62
63 #define SMP_DEBUG 0
64
65 #if SMP_DEBUG
66 #define Dprintk(x...)  printk(x)
67 #else
68 #define Dprintk(x...)
69 #endif
70
71 #ifdef CONFIG_HOTPLUG_CPU
72 #ifdef CONFIG_PERMIT_BSP_REMOVE
73 #define bsp_remove_ok   1
74 #else
75 #define bsp_remove_ok   0
76 #endif
77
78 /*
79  * Store all idle threads, this can be reused instead of creating
80  * a new thread. Also avoids complicated thread destroy functionality
81  * for idle threads.
82  */
83 struct task_struct *idle_thread_array[NR_CPUS];
84
85 /*
86  * Global array allocated for NR_CPUS at boot time
87  */
88 struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS];
89
90 /*
91  * start_ap in head.S uses this to store current booting cpu
92  * info.
93  */
94 struct sal_to_os_boot *sal_state_for_booting_cpu = &sal_boot_rendez_state[0];
95
96 #define set_brendez_area(x) (sal_state_for_booting_cpu = &sal_boot_rendez_state[(x)]);
97
98 #define get_idle_for_cpu(x)             (idle_thread_array[(x)])
99 #define set_idle_for_cpu(x,p)   (idle_thread_array[(x)] = (p))
100
101 #else
102
103 #define get_idle_for_cpu(x)             (NULL)
104 #define set_idle_for_cpu(x,p)
105 #define set_brendez_area(x)
106 #endif
107
108
109 /*
110  * ITC synchronization related stuff:
111  */
112 #define MASTER  (0)
113 #define SLAVE   (SMP_CACHE_BYTES/8)
114
115 #define NUM_ROUNDS      64      /* magic value */
116 #define NUM_ITERS       5       /* likewise */
117
118 static DEFINE_SPINLOCK(itc_sync_lock);
119 static volatile unsigned long go[SLAVE + 1];
120
121 #define DEBUG_ITC_SYNC  0
122
123 extern void __devinit calibrate_delay (void);
124 extern void start_ap (void);
125 extern unsigned long ia64_iobase;
126
127 struct task_struct *task_for_booting_cpu;
128
129 /*
130  * State for each CPU
131  */
132 DEFINE_PER_CPU(int, cpu_state);
133
134 /* Bitmasks of currently online, and possible CPUs */
135 cpumask_t cpu_online_map;
136 EXPORT_SYMBOL(cpu_online_map);
137 cpumask_t cpu_possible_map = CPU_MASK_NONE;
138 EXPORT_SYMBOL(cpu_possible_map);
139
140 cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned;
141 cpumask_t cpu_sibling_map[NR_CPUS] __cacheline_aligned;
142 int smp_num_siblings = 1;
143 int smp_num_cpucores = 1;
144
145 /* which logical CPU number maps to which CPU (physical APIC ID) */
146 volatile int ia64_cpu_to_sapicid[NR_CPUS];
147 EXPORT_SYMBOL(ia64_cpu_to_sapicid);
148
149 static volatile cpumask_t cpu_callin_map;
150
151 struct smp_boot_data smp_boot_data __initdata;
152
153 unsigned long ap_wakeup_vector = -1; /* External Int use to wakeup APs */
154
155 char __initdata no_int_routing;
156
157 unsigned char smp_int_redirect; /* are INT and IPI redirectable by the chipset? */
158
159 #ifdef CONFIG_FORCE_CPEI_RETARGET
160 #define CPEI_OVERRIDE_DEFAULT   (1)
161 #else
162 #define CPEI_OVERRIDE_DEFAULT   (0)
163 #endif
164
165 unsigned int force_cpei_retarget = CPEI_OVERRIDE_DEFAULT;
166
167 static int __init
168 cmdl_force_cpei(char *str)
169 {
170         int value=0;
171
172         get_option (&str, &value);
173         force_cpei_retarget = value;
174
175         return 1;
176 }
177
178 __setup("force_cpei=", cmdl_force_cpei);
179
180 static int __init
181 nointroute (char *str)
182 {
183         no_int_routing = 1;
184         printk ("no_int_routing on\n");
185         return 1;
186 }
187
188 __setup("nointroute", nointroute);
189
190 static void fix_b0_for_bsp(void)
191 {
192 #ifdef CONFIG_HOTPLUG_CPU
193         int cpuid;
194         static int fix_bsp_b0 = 1;
195
196         cpuid = smp_processor_id();
197
198         /*
199          * Cache the b0 value on the first AP that comes up
200          */
201         if (!(fix_bsp_b0 && cpuid))
202                 return;
203
204         sal_boot_rendez_state[0].br[0] = sal_boot_rendez_state[cpuid].br[0];
205         printk ("Fixed BSP b0 value from CPU %d\n", cpuid);
206
207         fix_bsp_b0 = 0;
208 #endif
209 }
210
211 void
212 sync_master (void *arg)
213 {
214         unsigned long flags, i;
215
216         go[MASTER] = 0;
217
218         local_irq_save(flags);
219         {
220                 for (i = 0; i < NUM_ROUNDS*NUM_ITERS; ++i) {
221                         while (!go[MASTER])
222                                 cpu_relax();
223                         go[MASTER] = 0;
224                         go[SLAVE] = ia64_get_itc();
225                 }
226         }
227         local_irq_restore(flags);
228 }
229
230 /*
231  * Return the number of cycles by which our itc differs from the itc on the master
232  * (time-keeper) CPU.  A positive number indicates our itc is ahead of the master,
233  * negative that it is behind.
234  */
235 static inline long
236 get_delta (long *rt, long *master)
237 {
238         unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0;
239         unsigned long tcenter, t0, t1, tm;
240         long i;
241
242         for (i = 0; i < NUM_ITERS; ++i) {
243                 t0 = ia64_get_itc();
244                 go[MASTER] = 1;
245                 while (!(tm = go[SLAVE]))
246                         cpu_relax();
247                 go[SLAVE] = 0;
248                 t1 = ia64_get_itc();
249
250                 if (t1 - t0 < best_t1 - best_t0)
251                         best_t0 = t0, best_t1 = t1, best_tm = tm;
252         }
253
254         *rt = best_t1 - best_t0;
255         *master = best_tm - best_t0;
256
257         /* average best_t0 and best_t1 without overflow: */
258         tcenter = (best_t0/2 + best_t1/2);
259         if (best_t0 % 2 + best_t1 % 2 == 2)
260                 ++tcenter;
261         return tcenter - best_tm;
262 }
263
264 /*
265  * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU
266  * (normally the time-keeper CPU).  We use a closed loop to eliminate the possibility of
267  * unaccounted-for errors (such as getting a machine check in the middle of a calibration
268  * step).  The basic idea is for the slave to ask the master what itc value it has and to
269  * read its own itc before and after the master responds.  Each iteration gives us three
270  * timestamps:
271  *
272  *      slave           master
273  *
274  *      t0 ---\
275  *             ---\
276  *                 --->
277  *                      tm
278  *                 /---
279  *             /---
280  *      t1 <---
281  *
282  *
283  * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0
284  * and t1.  If we achieve this, the clocks are synchronized provided the interconnect
285  * between the slave and the master is symmetric.  Even if the interconnect were
286  * asymmetric, we would still know that the synchronization error is smaller than the
287  * roundtrip latency (t0 - t1).
288  *
289  * When the interconnect is quiet and symmetric, this lets us synchronize the itc to
290  * within one or two cycles.  However, we can only *guarantee* that the synchronization is
291  * accurate to within a round-trip time, which is typically in the range of several
292  * hundred cycles (e.g., ~500 cycles).  In practice, this means that the itc's are usually
293  * almost perfectly synchronized, but we shouldn't assume that the accuracy is much better
294  * than half a micro second or so.
295  */
296 void
297 ia64_sync_itc (unsigned int master)
298 {
299         long i, delta, adj, adjust_latency = 0, done = 0;
300         unsigned long flags, rt, master_time_stamp, bound;
301 #if DEBUG_ITC_SYNC
302         struct {
303                 long rt;        /* roundtrip time */
304                 long master;    /* master's timestamp */
305                 long diff;      /* difference between midpoint and master's timestamp */
306                 long lat;       /* estimate of itc adjustment latency */
307         } t[NUM_ROUNDS];
308 #endif
309
310         /*
311          * Make sure local timer ticks are disabled while we sync.  If
312          * they were enabled, we'd have to worry about nasty issues
313          * like setting the ITC ahead of (or a long time before) the
314          * next scheduled tick.
315          */
316         BUG_ON((ia64_get_itv() & (1 << 16)) == 0);
317
318         go[MASTER] = 1;
319
320         if (smp_call_function_single(master, sync_master, NULL, 1, 0) < 0) {
321                 printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master);
322                 return;
323         }
324
325         while (go[MASTER])
326                 cpu_relax();    /* wait for master to be ready */
327
328         spin_lock_irqsave(&itc_sync_lock, flags);
329         {
330                 for (i = 0; i < NUM_ROUNDS; ++i) {
331                         delta = get_delta(&rt, &master_time_stamp);
332                         if (delta == 0) {
333                                 done = 1;       /* let's lock on to this... */
334                                 bound = rt;
335                         }
336
337                         if (!done) {
338                                 if (i > 0) {
339                                         adjust_latency += -delta;
340                                         adj = -delta + adjust_latency/4;
341                                 } else
342                                         adj = -delta;
343
344                                 ia64_set_itc(ia64_get_itc() + adj);
345                         }
346 #if DEBUG_ITC_SYNC
347                         t[i].rt = rt;
348                         t[i].master = master_time_stamp;
349                         t[i].diff = delta;
350                         t[i].lat = adjust_latency/4;
351 #endif
352                 }
353         }
354         spin_unlock_irqrestore(&itc_sync_lock, flags);
355
356 #if DEBUG_ITC_SYNC
357         for (i = 0; i < NUM_ROUNDS; ++i)
358                 printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n",
359                        t[i].rt, t[i].master, t[i].diff, t[i].lat);
360 #endif
361
362         printk(KERN_INFO "CPU %d: synchronized ITC with CPU %u (last diff %ld cycles, "
363                "maxerr %lu cycles)\n", smp_processor_id(), master, delta, rt);
364 }
365
366 /*
367  * Ideally sets up per-cpu profiling hooks.  Doesn't do much now...
368  */
369 static inline void __devinit
370 smp_setup_percpu_timer (void)
371 {
372 }
373
374 static void __devinit
375 smp_callin (void)
376 {
377         int cpuid, phys_id, itc_master;
378         extern void ia64_init_itm(void);
379         extern volatile int time_keeper_id;
380
381 #ifdef CONFIG_PERFMON
382         extern void pfm_init_percpu(void);
383 #endif
384
385         cpuid = smp_processor_id();
386         phys_id = hard_smp_processor_id();
387         itc_master = time_keeper_id;
388
389         if (cpu_online(cpuid)) {
390                 printk(KERN_ERR "huh, phys CPU#0x%x, CPU#0x%x already present??\n",
391                        phys_id, cpuid);
392                 BUG();
393         }
394
395         fix_b0_for_bsp();
396
397         lock_ipi_calllock();
398         cpu_set(cpuid, cpu_online_map);
399         unlock_ipi_calllock();
400         per_cpu(cpu_state, cpuid) = CPU_ONLINE;
401
402         smp_setup_percpu_timer();
403
404         ia64_mca_cmc_vector_setup();    /* Setup vector on AP */
405
406 #ifdef CONFIG_PERFMON
407         pfm_init_percpu();
408 #endif
409
410         local_irq_enable();
411
412         if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
413                 /*
414                  * Synchronize the ITC with the BP.  Need to do this after irqs are
415                  * enabled because ia64_sync_itc() calls smp_call_function_single(), which
416                  * calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls
417                  * local_bh_enable(), which bugs out if irqs are not enabled...
418                  */
419                 Dprintk("Going to syncup ITC with ITC Master.\n");
420                 ia64_sync_itc(itc_master);
421         }
422
423         /*
424          * Get our bogomips.
425          */
426         ia64_init_itm();
427         calibrate_delay();
428         local_cpu_data->loops_per_jiffy = loops_per_jiffy;
429
430 #ifdef CONFIG_IA32_SUPPORT
431         ia32_gdt_init();
432 #endif
433
434         /*
435          * Allow the master to continue.
436          */
437         cpu_set(cpuid, cpu_callin_map);
438         Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid);
439 }
440
441
442 /*
443  * Activate a secondary processor.  head.S calls this.
444  */
445 int __devinit
446 start_secondary (void *unused)
447 {
448         /* Early console may use I/O ports */
449         ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase));
450         Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id());
451         efi_map_pal_code();
452         cpu_init();
453         preempt_disable();
454         smp_callin();
455
456         cpu_idle();
457         return 0;
458 }
459
460 struct pt_regs * __devinit idle_regs(struct pt_regs *regs)
461 {
462         return NULL;
463 }
464
465 struct create_idle {
466         struct work_struct work;
467         struct task_struct *idle;
468         struct completion done;
469         int cpu;
470 };
471
472 void
473 do_fork_idle(struct work_struct *work)
474 {
475         struct create_idle *c_idle =
476                 container_of(work, struct create_idle, work);
477
478         c_idle->idle = fork_idle(c_idle->cpu);
479         complete(&c_idle->done);
480 }
481
482 static int __devinit
483 do_boot_cpu (int sapicid, int cpu)
484 {
485         int timeout;
486         struct create_idle c_idle = {
487                 .work = __WORK_INITIALIZER(c_idle.work, do_fork_idle),
488                 .cpu    = cpu,
489                 .done   = COMPLETION_INITIALIZER(c_idle.done),
490         };
491
492         c_idle.idle = get_idle_for_cpu(cpu);
493         if (c_idle.idle) {
494                 init_idle(c_idle.idle, cpu);
495                 goto do_rest;
496         }
497
498         /*
499          * We can't use kernel_thread since we must avoid to reschedule the child.
500          */
501         if (!keventd_up() || current_is_keventd())
502                 c_idle.work.func(&c_idle.work);
503         else {
504                 schedule_work(&c_idle.work);
505                 wait_for_completion(&c_idle.done);
506         }
507
508         if (IS_ERR(c_idle.idle))
509                 panic("failed fork for CPU %d", cpu);
510
511         set_idle_for_cpu(cpu, c_idle.idle);
512
513 do_rest:
514         task_for_booting_cpu = c_idle.idle;
515
516         Dprintk("Sending wakeup vector %lu to AP 0x%x/0x%x.\n", ap_wakeup_vector, cpu, sapicid);
517
518         set_brendez_area(cpu);
519         platform_send_ipi(cpu, ap_wakeup_vector, IA64_IPI_DM_INT, 0);
520
521         /*
522          * Wait 10s total for the AP to start
523          */
524         Dprintk("Waiting on callin_map ...");
525         for (timeout = 0; timeout < 100000; timeout++) {
526                 if (cpu_isset(cpu, cpu_callin_map))
527                         break;  /* It has booted */
528                 udelay(100);
529         }
530         Dprintk("\n");
531
532         if (!cpu_isset(cpu, cpu_callin_map)) {
533                 printk(KERN_ERR "Processor 0x%x/0x%x is stuck.\n", cpu, sapicid);
534                 ia64_cpu_to_sapicid[cpu] = -1;
535                 cpu_clear(cpu, cpu_online_map);  /* was set in smp_callin() */
536                 return -EINVAL;
537         }
538         return 0;
539 }
540
541 static int __init
542 decay (char *str)
543 {
544         int ticks;
545         get_option (&str, &ticks);
546         return 1;
547 }
548
549 __setup("decay=", decay);
550
551 /*
552  * Initialize the logical CPU number to SAPICID mapping
553  */
554 void __init
555 smp_build_cpu_map (void)
556 {
557         int sapicid, cpu, i;
558         int boot_cpu_id = hard_smp_processor_id();
559
560         for (cpu = 0; cpu < NR_CPUS; cpu++) {
561                 ia64_cpu_to_sapicid[cpu] = -1;
562         }
563
564         ia64_cpu_to_sapicid[0] = boot_cpu_id;
565         cpus_clear(cpu_present_map);
566         cpu_set(0, cpu_present_map);
567         cpu_set(0, cpu_possible_map);
568         for (cpu = 1, i = 0; i < smp_boot_data.cpu_count; i++) {
569                 sapicid = smp_boot_data.cpu_phys_id[i];
570                 if (sapicid == boot_cpu_id)
571                         continue;
572                 cpu_set(cpu, cpu_present_map);
573                 cpu_set(cpu, cpu_possible_map);
574                 ia64_cpu_to_sapicid[cpu] = sapicid;
575                 cpu++;
576         }
577 }
578
579 /*
580  * Cycle through the APs sending Wakeup IPIs to boot each.
581  */
582 void __init
583 smp_prepare_cpus (unsigned int max_cpus)
584 {
585         int boot_cpu_id = hard_smp_processor_id();
586
587         /*
588          * Initialize the per-CPU profiling counter/multiplier
589          */
590
591         smp_setup_percpu_timer();
592
593         /*
594          * We have the boot CPU online for sure.
595          */
596         cpu_set(0, cpu_online_map);
597         cpu_set(0, cpu_callin_map);
598
599         local_cpu_data->loops_per_jiffy = loops_per_jiffy;
600         ia64_cpu_to_sapicid[0] = boot_cpu_id;
601
602         printk(KERN_INFO "Boot processor id 0x%x/0x%x\n", 0, boot_cpu_id);
603
604         current_thread_info()->cpu = 0;
605
606         /*
607          * If SMP should be disabled, then really disable it!
608          */
609         if (!max_cpus) {
610                 printk(KERN_INFO "SMP mode deactivated.\n");
611                 cpus_clear(cpu_online_map);
612                 cpus_clear(cpu_present_map);
613                 cpus_clear(cpu_possible_map);
614                 cpu_set(0, cpu_online_map);
615                 cpu_set(0, cpu_present_map);
616                 cpu_set(0, cpu_possible_map);
617                 return;
618         }
619 }
620
621 void __devinit smp_prepare_boot_cpu(void)
622 {
623         cpu_set(smp_processor_id(), cpu_online_map);
624         cpu_set(smp_processor_id(), cpu_callin_map);
625         per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
626 }
627
628 #ifdef CONFIG_HOTPLUG_CPU
629 static inline void
630 clear_cpu_sibling_map(int cpu)
631 {
632         int i;
633
634         for_each_cpu_mask(i, cpu_sibling_map[cpu])
635                 cpu_clear(cpu, cpu_sibling_map[i]);
636         for_each_cpu_mask(i, cpu_core_map[cpu])
637                 cpu_clear(cpu, cpu_core_map[i]);
638
639         cpu_sibling_map[cpu] = cpu_core_map[cpu] = CPU_MASK_NONE;
640 }
641
642 static void
643 remove_siblinginfo(int cpu)
644 {
645         int last = 0;
646
647         if (cpu_data(cpu)->threads_per_core == 1 &&
648             cpu_data(cpu)->cores_per_socket == 1) {
649                 cpu_clear(cpu, cpu_core_map[cpu]);
650                 cpu_clear(cpu, cpu_sibling_map[cpu]);
651                 return;
652         }
653
654         last = (cpus_weight(cpu_core_map[cpu]) == 1 ? 1 : 0);
655
656         /* remove it from all sibling map's */
657         clear_cpu_sibling_map(cpu);
658 }
659
660 extern void fixup_irqs(void);
661
662 int migrate_platform_irqs(unsigned int cpu)
663 {
664         int new_cpei_cpu;
665         irq_desc_t *desc = NULL;
666         cpumask_t       mask;
667         int             retval = 0;
668
669         /*
670          * dont permit CPEI target to removed.
671          */
672         if (cpe_vector > 0 && is_cpu_cpei_target(cpu)) {
673                 printk ("CPU (%d) is CPEI Target\n", cpu);
674                 if (can_cpei_retarget()) {
675                         /*
676                          * Now re-target the CPEI to a different processor
677                          */
678                         new_cpei_cpu = any_online_cpu(cpu_online_map);
679                         mask = cpumask_of_cpu(new_cpei_cpu);
680                         set_cpei_target_cpu(new_cpei_cpu);
681                         desc = irq_desc + ia64_cpe_irq;
682                         /*
683                          * Switch for now, immediatly, we need to do fake intr
684                          * as other interrupts, but need to study CPEI behaviour with
685                          * polling before making changes.
686                          */
687                         if (desc) {
688                                 desc->chip->disable(ia64_cpe_irq);
689                                 desc->chip->set_affinity(ia64_cpe_irq, mask);
690                                 desc->chip->enable(ia64_cpe_irq);
691                                 printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu);
692                         }
693                 }
694                 if (!desc) {
695                         printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu);
696                         retval = -EBUSY;
697                 }
698         }
699         return retval;
700 }
701
702 /* must be called with cpucontrol mutex held */
703 int __cpu_disable(void)
704 {
705         int cpu = smp_processor_id();
706
707         /*
708          * dont permit boot processor for now
709          */
710         if (cpu == 0 && !bsp_remove_ok) {
711                 printk ("Your platform does not support removal of BSP\n");
712                 return (-EBUSY);
713         }
714
715         cpu_clear(cpu, cpu_online_map);
716
717         if (migrate_platform_irqs(cpu)) {
718                 cpu_set(cpu, cpu_online_map);
719                 return (-EBUSY);
720         }
721
722         remove_siblinginfo(cpu);
723         cpu_clear(cpu, cpu_online_map);
724         fixup_irqs();
725         local_flush_tlb_all();
726         cpu_clear(cpu, cpu_callin_map);
727         return 0;
728 }
729
730 void __cpu_die(unsigned int cpu)
731 {
732         unsigned int i;
733
734         for (i = 0; i < 100; i++) {
735                 /* They ack this in play_dead by setting CPU_DEAD */
736                 if (per_cpu(cpu_state, cpu) == CPU_DEAD)
737                 {
738                         printk ("CPU %d is now offline\n", cpu);
739                         return;
740                 }
741                 msleep(100);
742         }
743         printk(KERN_ERR "CPU %u didn't die...\n", cpu);
744 }
745 #else /* !CONFIG_HOTPLUG_CPU */
746 int __cpu_disable(void)
747 {
748         return -ENOSYS;
749 }
750
751 void __cpu_die(unsigned int cpu)
752 {
753         /* We said "no" in __cpu_disable */
754         BUG();
755 }
756 #endif /* CONFIG_HOTPLUG_CPU */
757
758 void
759 smp_cpus_done (unsigned int dummy)
760 {
761         int cpu;
762         unsigned long bogosum = 0;
763
764         /*
765          * Allow the user to impress friends.
766          */
767
768         for_each_online_cpu(cpu) {
769                 bogosum += cpu_data(cpu)->loops_per_jiffy;
770         }
771
772         printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
773                (int)num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100);
774 }
775
776 static inline void __devinit
777 set_cpu_sibling_map(int cpu)
778 {
779         int i;
780
781         for_each_online_cpu(i) {
782                 if ((cpu_data(cpu)->socket_id == cpu_data(i)->socket_id)) {
783                         cpu_set(i, cpu_core_map[cpu]);
784                         cpu_set(cpu, cpu_core_map[i]);
785                         if (cpu_data(cpu)->core_id == cpu_data(i)->core_id) {
786                                 cpu_set(i, cpu_sibling_map[cpu]);
787                                 cpu_set(cpu, cpu_sibling_map[i]);
788                         }
789                 }
790         }
791 }
792
793 int __devinit
794 __cpu_up (unsigned int cpu)
795 {
796         int ret;
797         int sapicid;
798
799         sapicid = ia64_cpu_to_sapicid[cpu];
800         if (sapicid == -1)
801                 return -EINVAL;
802
803         /*
804          * Already booted cpu? not valid anymore since we dont
805          * do idle loop tightspin anymore.
806          */
807         if (cpu_isset(cpu, cpu_callin_map))
808                 return -EINVAL;
809
810         per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
811         /* Processor goes to start_secondary(), sets online flag */
812         ret = do_boot_cpu(sapicid, cpu);
813         if (ret < 0)
814                 return ret;
815
816         if (cpu_data(cpu)->threads_per_core == 1 &&
817             cpu_data(cpu)->cores_per_socket == 1) {
818                 cpu_set(cpu, cpu_sibling_map[cpu]);
819                 cpu_set(cpu, cpu_core_map[cpu]);
820                 return 0;
821         }
822
823         set_cpu_sibling_map(cpu);
824
825         return 0;
826 }
827
828 /*
829  * Assume that CPU's have been discovered by some platform-dependent interface.  For
830  * SoftSDV/Lion, that would be ACPI.
831  *
832  * Setup of the IPI irq handler is done in irq.c:init_IRQ_SMP().
833  */
834 void __init
835 init_smp_config(void)
836 {
837         struct fptr {
838                 unsigned long fp;
839                 unsigned long gp;
840         } *ap_startup;
841         long sal_ret;
842
843         /* Tell SAL where to drop the AP's.  */
844         ap_startup = (struct fptr *) start_ap;
845         sal_ret = ia64_sal_set_vectors(SAL_VECTOR_OS_BOOT_RENDEZ,
846                                        ia64_tpa(ap_startup->fp), ia64_tpa(ap_startup->gp), 0, 0, 0, 0);
847         if (sal_ret < 0)
848                 printk(KERN_ERR "SMP: Can't set SAL AP Boot Rendezvous: %s\n",
849                        ia64_sal_strerror(sal_ret));
850 }
851
852 /*
853  * identify_siblings(cpu) gets called from identify_cpu. This populates the 
854  * information related to logical execution units in per_cpu_data structure.
855  */
856 void __devinit
857 identify_siblings(struct cpuinfo_ia64 *c)
858 {
859         s64 status;
860         u16 pltid;
861         pal_logical_to_physical_t info;
862
863         if (smp_num_cpucores == 1 && smp_num_siblings == 1)
864                 return;
865
866         if ((status = ia64_pal_logical_to_phys(-1, &info)) != PAL_STATUS_SUCCESS) {
867                 printk(KERN_ERR "ia64_pal_logical_to_phys failed with %ld\n",
868                        status);
869                 return;
870         }
871         if ((status = ia64_sal_physical_id_info(&pltid)) != PAL_STATUS_SUCCESS) {
872                 printk(KERN_ERR "ia64_sal_pltid failed with %ld\n", status);
873                 return;
874         }
875
876         c->socket_id =  (pltid << 8) | info.overview_ppid;
877         c->cores_per_socket = info.overview_cpp;
878         c->threads_per_core = info.overview_tpc;
879         c->num_log = info.overview_num_log;
880
881         c->core_id = info.log1_cid;
882         c->thread_id = info.log1_tid;
883 }
884
885 /*
886  * returns non zero, if multi-threading is enabled
887  * on at least one physical package. Due to hotplug cpu
888  * and (maxcpus=), all threads may not necessarily be enabled
889  * even though the processor supports multi-threading.
890  */
891 int is_multithreading_enabled(void)
892 {
893         int i, j;
894
895         for_each_present_cpu(i) {
896                 for_each_present_cpu(j) {
897                         if (j == i)
898                                 continue;
899                         if ((cpu_data(j)->socket_id == cpu_data(i)->socket_id)) {
900                                 if (cpu_data(j)->core_id == cpu_data(i)->core_id)
901                                         return 1;
902                         }
903                 }
904         }
905         return 0;
906 }
907 EXPORT_SYMBOL_GPL(is_multithreading_enabled);