3 select ARCH_BINFMT_ELF_RANDOMIZE_PIE
4 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
5 select ARCH_HAS_GCOV_PROFILE_ALL
6 select ARCH_HAS_SG_CHAIN
7 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
8 select ARCH_USE_CMPXCHG_LOCKREF
9 select ARCH_SUPPORTS_ATOMIC_RMW
10 select ARCH_WANT_OPTIONAL_GPIOLIB
11 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
12 select ARCH_WANT_FRAME_POINTERS
16 select AUDIT_ARCH_COMPAT_GENERIC
17 select ARM_GIC_V2M if PCI_MSI
19 select ARM_GIC_V3_ITS if PCI_MSI
20 select BUILDTIME_EXTABLE_SORT
21 select CLONE_BACKWARDS
23 select CPU_PM if (SUSPEND || CPU_IDLE)
24 select DCACHE_WORD_ACCESS
25 select GENERIC_ALLOCATOR
26 select GENERIC_CLOCKEVENTS
27 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
28 select GENERIC_CPU_AUTOPROBE
29 select GENERIC_EARLY_IOREMAP
30 select GENERIC_IRQ_PROBE
31 select GENERIC_IRQ_SHOW
32 select GENERIC_PCI_IOMAP
33 select GENERIC_SCHED_CLOCK
34 select GENERIC_SMP_IDLE_THREAD
35 select GENERIC_STRNCPY_FROM_USER
36 select GENERIC_STRNLEN_USER
37 select GENERIC_TIME_VSYSCALL
38 select HANDLE_DOMAIN_IRQ
39 select HARDIRQS_SW_RESEND
40 select HAVE_ALIGNED_STRUCT_PAGE if SLUB
41 select HAVE_ARCH_AUDITSYSCALL
42 select HAVE_ARCH_JUMP_LABEL
44 select HAVE_ARCH_SECCOMP_FILTER
45 select HAVE_ARCH_TRACEHOOK
47 select HAVE_C_RECORDMCOUNT
48 select HAVE_CC_STACKPROTECTOR
49 select HAVE_CMPXCHG_DOUBLE
50 select HAVE_DEBUG_BUGVERBOSE
51 select HAVE_DEBUG_KMEMLEAK
52 select HAVE_DMA_API_DEBUG
54 select HAVE_DMA_CONTIGUOUS
55 select HAVE_DYNAMIC_FTRACE
56 select HAVE_EFFICIENT_UNALIGNED_ACCESS
57 select HAVE_FTRACE_MCOUNT_RECORD
58 select HAVE_FUNCTION_TRACER
59 select HAVE_FUNCTION_GRAPH_TRACER
60 select HAVE_GENERIC_DMA_COHERENT
61 select HAVE_HW_BREAKPOINT if PERF_EVENTS
63 select HAVE_PATA_PLATFORM
64 select HAVE_PERF_EVENTS
66 select HAVE_PERF_USER_STACK_DUMP
67 select HAVE_RCU_TABLE_FREE
68 select HAVE_SYSCALL_TRACEPOINTS
70 select MODULES_USE_ELF_RELA
73 select OF_EARLY_FLATTREE
74 select OF_RESERVED_MEM
75 select PERF_USE_VMALLOC
80 select SYSCTL_EXCEPTION_TRACE
81 select HAVE_CONTEXT_TRACKING
83 ARM 64-bit (AArch64) Linux support.
88 config ARCH_PHYS_ADDR_T_64BIT
97 config STACKTRACE_SUPPORT
100 config LOCKDEP_SUPPORT
103 config TRACE_IRQFLAGS_SUPPORT
106 config RWSEM_XCHGADD_ALGORITHM
109 config GENERIC_HWEIGHT
115 config GENERIC_CALIBRATE_DELAY
121 config HAVE_GENERIC_RCU_GUP
124 config ARCH_DMA_ADDR_T_64BIT
127 config NEED_DMA_MAP_STATE
130 config NEED_SG_DMA_LENGTH
139 config KERNEL_MODE_NEON
142 config FIX_EARLYCON_MEM
145 source "init/Kconfig"
147 source "kernel/Kconfig.freezer"
149 menu "Platform selection"
152 bool "Mediatek MT65xx & MT81xx ARMv8 SoC"
155 Support for Mediatek MT65xx & MT81xx ARMv8 SoCs
158 bool "AMD Seattle SoC Family"
160 This enables support for AMD Seattle SOC Family
163 bool "Cavium Inc. Thunder SoC Family"
165 This enables support for Cavium's Thunder Family of SoCs.
168 bool "ARMv8 software model (Versatile Express)"
169 select ARCH_REQUIRE_GPIOLIB
170 select COMMON_CLK_VERSATILE
171 select POWER_RESET_VEXPRESS
172 select VEXPRESS_CONFIG
174 This enables support for the ARMv8 software model (Versatile
178 bool "AppliedMicro X-Gene SOC Family"
180 This enables support for AppliedMicro X-Gene SOC Family
189 This feature enables support for PCI bus system. If you say Y
190 here, the kernel will include drivers and infrastructure code
191 to support PCI bus devices.
196 config PCI_DOMAINS_GENERIC
202 source "drivers/pci/Kconfig"
203 source "drivers/pci/pcie/Kconfig"
204 source "drivers/pci/hotplug/Kconfig"
208 menu "Kernel Features"
210 menu "ARM errata workarounds via the alternatives framework"
212 config ARM64_ERRATUM_826319
213 bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
216 This option adds an alternative code sequence to work around ARM
217 erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
218 AXI master interface and an L2 cache.
220 If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
221 and is unable to accept a certain write via this interface, it will
222 not progress on read data presented on the read data channel and the
225 The workaround promotes data cache clean instructions to
226 data cache clean-and-invalidate.
227 Please note that this does not necessarily enable the workaround,
228 as it depends on the alternative framework, which will only patch
229 the kernel if an affected CPU is detected.
233 config ARM64_ERRATUM_827319
234 bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
237 This option adds an alternative code sequence to work around ARM
238 erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
239 master interface and an L2 cache.
241 Under certain conditions this erratum can cause a clean line eviction
242 to occur at the same time as another transaction to the same address
243 on the AMBA 5 CHI interface, which can cause data corruption if the
244 interconnect reorders the two transactions.
246 The workaround promotes data cache clean instructions to
247 data cache clean-and-invalidate.
248 Please note that this does not necessarily enable the workaround,
249 as it depends on the alternative framework, which will only patch
250 the kernel if an affected CPU is detected.
254 config ARM64_ERRATUM_824069
255 bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
258 This option adds an alternative code sequence to work around ARM
259 erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
260 to a coherent interconnect.
262 If a Cortex-A53 processor is executing a store or prefetch for
263 write instruction at the same time as a processor in another
264 cluster is executing a cache maintenance operation to the same
265 address, then this erratum might cause a clean cache line to be
266 incorrectly marked as dirty.
268 The workaround promotes data cache clean instructions to
269 data cache clean-and-invalidate.
270 Please note that this option does not necessarily enable the
271 workaround, as it depends on the alternative framework, which will
272 only patch the kernel if an affected CPU is detected.
276 config ARM64_ERRATUM_819472
277 bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
280 This option adds an alternative code sequence to work around ARM
281 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
282 present when it is connected to a coherent interconnect.
284 If the processor is executing a load and store exclusive sequence at
285 the same time as a processor in another cluster is executing a cache
286 maintenance operation to the same address, then this erratum might
287 cause data corruption.
289 The workaround promotes data cache clean instructions to
290 data cache clean-and-invalidate.
291 Please note that this does not necessarily enable the workaround,
292 as it depends on the alternative framework, which will only patch
293 the kernel if an affected CPU is detected.
297 config ARM64_ERRATUM_832075
298 bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
301 This option adds an alternative code sequence to work around ARM
302 erratum 832075 on Cortex-A57 parts up to r1p2.
304 Affected Cortex-A57 parts might deadlock when exclusive load/store
305 instructions to Write-Back memory are mixed with Device loads.
307 The workaround is to promote device loads to use Load-Acquire
309 Please note that this does not necessarily enable the workaround,
310 as it depends on the alternative framework, which will only patch
311 the kernel if an affected CPU is detected.
320 default ARM64_4K_PAGES
322 Page size (translation granule) configuration.
324 config ARM64_4K_PAGES
327 This feature enables 4KB pages support.
329 config ARM64_64K_PAGES
332 This feature enables 64KB pages support (4KB by default)
333 allowing only two levels of page tables and faster TLB
334 look-up. AArch32 emulation is not available when this feature
340 prompt "Virtual address space size"
341 default ARM64_VA_BITS_39 if ARM64_4K_PAGES
342 default ARM64_VA_BITS_42 if ARM64_64K_PAGES
344 Allows choosing one of multiple possible virtual address
345 space sizes. The level of translation table is determined by
346 a combination of page size and virtual address space size.
348 config ARM64_VA_BITS_39
350 depends on ARM64_4K_PAGES
352 config ARM64_VA_BITS_42
354 depends on ARM64_64K_PAGES
356 config ARM64_VA_BITS_48
364 default 39 if ARM64_VA_BITS_39
365 default 42 if ARM64_VA_BITS_42
366 default 48 if ARM64_VA_BITS_48
368 config ARM64_PGTABLE_LEVELS
370 default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
371 default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
372 default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
373 default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
375 config CPU_BIG_ENDIAN
376 bool "Build big-endian kernel"
378 Say Y if you plan on running a kernel in big-endian mode.
381 bool "Symmetric Multi-Processing"
383 This enables support for systems with more than one CPU. If
384 you say N here, the kernel will run on single and
385 multiprocessor machines, but will use only one CPU of a
386 multiprocessor machine. If you say Y here, the kernel will run
387 on many, but not all, single processor machines. On a single
388 processor machine, the kernel will run faster if you say N
391 If you don't know what to do here, say N.
394 bool "Multi-core scheduler support"
397 Multi-core scheduler support improves the CPU scheduler's decision
398 making when dealing with multi-core CPU chips at a cost of slightly
399 increased overhead in some places. If unsure say N here.
402 bool "SMT scheduler support"
405 Improves the CPU scheduler's decision making when dealing with
406 MultiThreading at a cost of slightly increased overhead in some
407 places. If unsure say N here.
410 int "Maximum number of CPUs (2-64)"
413 # These have to remain sorted largest to smallest
417 bool "Support for hot-pluggable CPUs"
420 Say Y here to experiment with turning CPUs off and on. CPUs
421 can be controlled through /sys/devices/system/cpu.
423 source kernel/Kconfig.preempt
429 config ARCH_HAS_HOLES_MEMORYMODEL
430 def_bool y if SPARSEMEM
432 config ARCH_SPARSEMEM_ENABLE
434 select SPARSEMEM_VMEMMAP_ENABLE
436 config ARCH_SPARSEMEM_DEFAULT
437 def_bool ARCH_SPARSEMEM_ENABLE
439 config ARCH_SELECT_MEMORY_MODEL
440 def_bool ARCH_SPARSEMEM_ENABLE
442 config HAVE_ARCH_PFN_VALID
443 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
445 config HW_PERF_EVENTS
446 bool "Enable hardware performance counter support for perf events"
447 depends on PERF_EVENTS
450 Enable hardware performance counter support for perf events. If
451 disabled, perf events will use software events only.
453 config SYS_SUPPORTS_HUGETLBFS
456 config ARCH_WANT_GENERAL_HUGETLB
459 config ARCH_WANT_HUGE_PMD_SHARE
460 def_bool y if !ARM64_64K_PAGES
462 config HAVE_ARCH_TRANSPARENT_HUGEPAGE
465 config ARCH_HAS_CACHE_LINE_SIZE
471 bool "Enable seccomp to safely compute untrusted bytecode"
473 This kernel feature is useful for number crunching applications
474 that may need to compute untrusted bytecode during their
475 execution. By using pipes or other transports made available to
476 the process as file descriptors supporting the read/write
477 syscalls, it's possible to isolate those applications in
478 their own address space using seccomp. Once seccomp is
479 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
480 and the task is only allowed to execute a few safe syscalls
481 defined by each seccomp mode.
488 bool "Xen guest support on ARM64"
489 depends on ARM64 && OF
492 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
494 config FORCE_MAX_ZONEORDER
496 default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
499 menuconfig ARMV8_DEPRECATED
500 bool "Emulate deprecated/obsolete ARMv8 instructions"
503 Legacy software support may require certain instructions
504 that have been deprecated or obsoleted in the architecture.
506 Enable this config to enable selective emulation of these
514 bool "Emulate SWP/SWPB instructions"
516 ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
517 they are always undefined. Say Y here to enable software
518 emulation of these instructions for userspace using LDXR/STXR.
520 In some older versions of glibc [<=2.8] SWP is used during futex
521 trylock() operations with the assumption that the code will not
522 be preempted. This invalid assumption may be more likely to fail
523 with SWP emulation enabled, leading to deadlock of the user
526 NOTE: when accessing uncached shared regions, LDXR/STXR rely
527 on an external transaction monitoring block called a global
528 monitor to maintain update atomicity. If your system does not
529 implement a global monitor, this option can cause programs that
530 perform SWP operations to uncached memory to deadlock.
534 config CP15_BARRIER_EMULATION
535 bool "Emulate CP15 Barrier instructions"
537 The CP15 barrier instructions - CP15ISB, CP15DSB, and
538 CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
539 strongly recommended to use the ISB, DSB, and DMB
540 instructions instead.
542 Say Y here to enable software emulation of these
543 instructions for AArch32 userspace code. When this option is
544 enabled, CP15 barrier usage is traced which can help
545 identify software that needs updating.
556 string "Default kernel command string"
559 Provide a set of default command-line options at build time by
560 entering them here. As a minimum, you should specify the the
561 root device (e.g. root=/dev/nfs).
564 bool "Always use the default kernel command string"
566 Always use the default kernel command string, even if the boot
567 loader passes other arguments to the kernel.
568 This is useful if you cannot or don't want to change the
569 command-line options your boot loader passes to the kernel.
575 bool "UEFI runtime support"
576 depends on OF && !CPU_BIG_ENDIAN
579 select EFI_PARAMS_FROM_FDT
580 select EFI_RUNTIME_WRAPPERS
585 This option provides support for runtime services provided
586 by UEFI firmware (such as non-volatile variables, realtime
587 clock, and platform reset). A UEFI stub is also provided to
588 allow the kernel to be booted as an EFI application. This
589 is only useful on systems that have UEFI firmware.
592 bool "Enable support for SMBIOS (DMI) tables"
596 This enables SMBIOS/DMI feature for systems.
598 This option is only useful on systems that have UEFI firmware.
599 However, even with this option, the resultant kernel should
600 continue to boot on existing non-UEFI platforms.
604 menu "Userspace binary formats"
606 source "fs/Kconfig.binfmt"
609 bool "Kernel support for 32-bit EL0"
610 depends on !ARM64_64K_PAGES
611 select COMPAT_BINFMT_ELF
613 select OLD_SIGSUSPEND3
614 select COMPAT_OLD_SIGACTION
616 This option enables support for a 32-bit EL0 running under a 64-bit
617 kernel at EL1. AArch32-specific components such as system calls,
618 the user helper functions, VFP support and the ptrace interface are
619 handled appropriately by the kernel.
621 If you want to execute 32-bit userspace applications, say Y.
623 config SYSVIPC_COMPAT
625 depends on COMPAT && SYSVIPC
629 menu "Power management options"
631 source "kernel/power/Kconfig"
633 config ARCH_SUSPEND_POSSIBLE
636 config ARM64_CPU_SUSPEND
641 menu "CPU Power Management"
643 source "drivers/cpuidle/Kconfig"
645 source "drivers/cpufreq/Kconfig"
651 source "drivers/Kconfig"
653 source "drivers/firmware/Kconfig"
657 source "arch/arm64/kvm/Kconfig"
659 source "arch/arm64/Kconfig.debug"
661 source "security/Kconfig"
663 source "crypto/Kconfig"
665 source "arch/arm64/crypto/Kconfig"