3 select ARCH_BINFMT_ELF_RANDOMIZE_PIE
4 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
5 select ARCH_HAS_GCOV_PROFILE_ALL
6 select ARCH_HAS_SG_CHAIN
7 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
8 select ARCH_USE_CMPXCHG_LOCKREF
9 select ARCH_SUPPORTS_ATOMIC_RMW
10 select ARCH_WANT_OPTIONAL_GPIOLIB
11 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
12 select ARCH_WANT_FRAME_POINTERS
16 select AUDIT_ARCH_COMPAT_GENERIC
17 select ARM_GIC_V2M if PCI_MSI
19 select ARM_GIC_V3_ITS if PCI_MSI
20 select BUILDTIME_EXTABLE_SORT
21 select CLONE_BACKWARDS
23 select CPU_PM if (SUSPEND || CPU_IDLE)
24 select DCACHE_WORD_ACCESS
25 select GENERIC_ALLOCATOR
26 select GENERIC_CLOCKEVENTS
27 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
28 select GENERIC_CPU_AUTOPROBE
29 select GENERIC_EARLY_IOREMAP
30 select GENERIC_IRQ_PROBE
31 select GENERIC_IRQ_SHOW
32 select GENERIC_PCI_IOMAP
33 select GENERIC_SCHED_CLOCK
34 select GENERIC_SMP_IDLE_THREAD
35 select GENERIC_STRNCPY_FROM_USER
36 select GENERIC_STRNLEN_USER
37 select GENERIC_TIME_VSYSCALL
38 select HANDLE_DOMAIN_IRQ
39 select HARDIRQS_SW_RESEND
40 select HAVE_ALIGNED_STRUCT_PAGE if SLUB
41 select HAVE_ARCH_AUDITSYSCALL
42 select HAVE_ARCH_JUMP_LABEL
44 select HAVE_ARCH_SECCOMP_FILTER
45 select HAVE_ARCH_TRACEHOOK
47 select HAVE_C_RECORDMCOUNT
48 select HAVE_CC_STACKPROTECTOR
49 select HAVE_CMPXCHG_DOUBLE
50 select HAVE_DEBUG_BUGVERBOSE
51 select HAVE_DEBUG_KMEMLEAK
52 select HAVE_DMA_API_DEBUG
54 select HAVE_DMA_CONTIGUOUS
55 select HAVE_DYNAMIC_FTRACE
56 select HAVE_EFFICIENT_UNALIGNED_ACCESS
57 select HAVE_FTRACE_MCOUNT_RECORD
58 select HAVE_FUNCTION_TRACER
59 select HAVE_FUNCTION_GRAPH_TRACER
60 select HAVE_GENERIC_DMA_COHERENT
61 select HAVE_HW_BREAKPOINT if PERF_EVENTS
63 select HAVE_PATA_PLATFORM
64 select HAVE_PERF_EVENTS
66 select HAVE_PERF_USER_STACK_DUMP
67 select HAVE_RCU_TABLE_FREE
68 select HAVE_SYSCALL_TRACEPOINTS
70 select MODULES_USE_ELF_RELA
73 select OF_EARLY_FLATTREE
74 select OF_RESERVED_MEM
75 select PERF_USE_VMALLOC
80 select SYSCTL_EXCEPTION_TRACE
81 select HAVE_CONTEXT_TRACKING
83 ARM 64-bit (AArch64) Linux support.
88 config ARCH_PHYS_ADDR_T_64BIT
97 config STACKTRACE_SUPPORT
100 config LOCKDEP_SUPPORT
103 config TRACE_IRQFLAGS_SUPPORT
106 config RWSEM_XCHGADD_ALGORITHM
109 config GENERIC_HWEIGHT
115 config GENERIC_CALIBRATE_DELAY
121 config HAVE_GENERIC_RCU_GUP
124 config ARCH_DMA_ADDR_T_64BIT
127 config NEED_DMA_MAP_STATE
130 config NEED_SG_DMA_LENGTH
139 config KERNEL_MODE_NEON
142 config FIX_EARLYCON_MEM
145 source "init/Kconfig"
147 source "kernel/Kconfig.freezer"
149 menu "Platform selection"
154 This enables support for Samsung Exynos SoC family
157 bool "ARMv8 based Samsung Exynos7"
159 select COMMON_CLK_SAMSUNG
160 select HAVE_S3C2410_WATCHDOG if WATCHDOG
161 select HAVE_S3C_RTC if RTC_CLASS
163 select PINCTRL_EXYNOS
166 This enables support for Samsung Exynos7 SoC family
169 bool "AMD Seattle SoC Family"
171 This enables support for AMD Seattle SOC Family
174 bool "NVIDIA Tegra SoC Family"
175 select ARCH_HAS_RESET_CONTROLLER
176 select ARCH_REQUIRE_GPIOLIB
180 select GENERIC_CLOCKEVENTS
184 select RESET_CONTROLLER
186 This enables support for the NVIDIA Tegra SoC family.
188 config ARCH_TEGRA_132_SOC
189 bool "NVIDIA Tegra132 SoC"
190 depends on ARCH_TEGRA
191 select PINCTRL_TEGRA124
192 select USB_ARCH_HAS_EHCI if USB_SUPPORT
193 select USB_ULPI if USB_PHY
194 select USB_ULPI_VIEWPORT if USB_PHY
196 Enable support for NVIDIA Tegra132 SoC, based on the Denver
197 ARMv8 CPU. The Tegra132 SoC is similar to the Tegra124 SoC,
198 but contains an NVIDIA Denver CPU complex in place of
199 Tegra124's "4+1" Cortex-A15 CPU complex.
202 bool "Cavium Inc. Thunder SoC Family"
204 This enables support for Cavium's Thunder Family of SoCs.
207 bool "ARMv8 software model (Versatile Express)"
208 select ARCH_REQUIRE_GPIOLIB
209 select COMMON_CLK_VERSATILE
210 select POWER_RESET_VEXPRESS
211 select VEXPRESS_CONFIG
213 This enables support for the ARMv8 software model (Versatile
217 bool "AppliedMicro X-Gene SOC Family"
219 This enables support for AppliedMicro X-Gene SOC Family
228 This feature enables support for PCI bus system. If you say Y
229 here, the kernel will include drivers and infrastructure code
230 to support PCI bus devices.
235 config PCI_DOMAINS_GENERIC
241 source "drivers/pci/Kconfig"
242 source "drivers/pci/pcie/Kconfig"
243 source "drivers/pci/hotplug/Kconfig"
247 menu "Kernel Features"
249 menu "ARM errata workarounds via the alternatives framework"
251 config ARM64_ERRATUM_826319
252 bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
255 This option adds an alternative code sequence to work around ARM
256 erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
257 AXI master interface and an L2 cache.
259 If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
260 and is unable to accept a certain write via this interface, it will
261 not progress on read data presented on the read data channel and the
264 The workaround promotes data cache clean instructions to
265 data cache clean-and-invalidate.
266 Please note that this does not necessarily enable the workaround,
267 as it depends on the alternative framework, which will only patch
268 the kernel if an affected CPU is detected.
272 config ARM64_ERRATUM_827319
273 bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
276 This option adds an alternative code sequence to work around ARM
277 erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
278 master interface and an L2 cache.
280 Under certain conditions this erratum can cause a clean line eviction
281 to occur at the same time as another transaction to the same address
282 on the AMBA 5 CHI interface, which can cause data corruption if the
283 interconnect reorders the two transactions.
285 The workaround promotes data cache clean instructions to
286 data cache clean-and-invalidate.
287 Please note that this does not necessarily enable the workaround,
288 as it depends on the alternative framework, which will only patch
289 the kernel if an affected CPU is detected.
293 config ARM64_ERRATUM_824069
294 bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
297 This option adds an alternative code sequence to work around ARM
298 erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
299 to a coherent interconnect.
301 If a Cortex-A53 processor is executing a store or prefetch for
302 write instruction at the same time as a processor in another
303 cluster is executing a cache maintenance operation to the same
304 address, then this erratum might cause a clean cache line to be
305 incorrectly marked as dirty.
307 The workaround promotes data cache clean instructions to
308 data cache clean-and-invalidate.
309 Please note that this option does not necessarily enable the
310 workaround, as it depends on the alternative framework, which will
311 only patch the kernel if an affected CPU is detected.
315 config ARM64_ERRATUM_819472
316 bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
319 This option adds an alternative code sequence to work around ARM
320 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
321 present when it is connected to a coherent interconnect.
323 If the processor is executing a load and store exclusive sequence at
324 the same time as a processor in another cluster is executing a cache
325 maintenance operation to the same address, then this erratum might
326 cause data corruption.
328 The workaround promotes data cache clean instructions to
329 data cache clean-and-invalidate.
330 Please note that this does not necessarily enable the workaround,
331 as it depends on the alternative framework, which will only patch
332 the kernel if an affected CPU is detected.
336 config ARM64_ERRATUM_832075
337 bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
340 This option adds an alternative code sequence to work around ARM
341 erratum 832075 on Cortex-A57 parts up to r1p2.
343 Affected Cortex-A57 parts might deadlock when exclusive load/store
344 instructions to Write-Back memory are mixed with Device loads.
346 The workaround is to promote device loads to use Load-Acquire
348 Please note that this does not necessarily enable the workaround,
349 as it depends on the alternative framework, which will only patch
350 the kernel if an affected CPU is detected.
359 default ARM64_4K_PAGES
361 Page size (translation granule) configuration.
363 config ARM64_4K_PAGES
366 This feature enables 4KB pages support.
368 config ARM64_64K_PAGES
371 This feature enables 64KB pages support (4KB by default)
372 allowing only two levels of page tables and faster TLB
373 look-up. AArch32 emulation is not available when this feature
379 prompt "Virtual address space size"
380 default ARM64_VA_BITS_39 if ARM64_4K_PAGES
381 default ARM64_VA_BITS_42 if ARM64_64K_PAGES
383 Allows choosing one of multiple possible virtual address
384 space sizes. The level of translation table is determined by
385 a combination of page size and virtual address space size.
387 config ARM64_VA_BITS_39
389 depends on ARM64_4K_PAGES
391 config ARM64_VA_BITS_42
393 depends on ARM64_64K_PAGES
395 config ARM64_VA_BITS_48
403 default 39 if ARM64_VA_BITS_39
404 default 42 if ARM64_VA_BITS_42
405 default 48 if ARM64_VA_BITS_48
407 config ARM64_PGTABLE_LEVELS
409 default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
410 default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
411 default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
412 default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
414 config CPU_BIG_ENDIAN
415 bool "Build big-endian kernel"
417 Say Y if you plan on running a kernel in big-endian mode.
420 bool "Symmetric Multi-Processing"
422 This enables support for systems with more than one CPU. If
423 you say N here, the kernel will run on single and
424 multiprocessor machines, but will use only one CPU of a
425 multiprocessor machine. If you say Y here, the kernel will run
426 on many, but not all, single processor machines. On a single
427 processor machine, the kernel will run faster if you say N
430 If you don't know what to do here, say N.
433 bool "Multi-core scheduler support"
436 Multi-core scheduler support improves the CPU scheduler's decision
437 making when dealing with multi-core CPU chips at a cost of slightly
438 increased overhead in some places. If unsure say N here.
441 bool "SMT scheduler support"
444 Improves the CPU scheduler's decision making when dealing with
445 MultiThreading at a cost of slightly increased overhead in some
446 places. If unsure say N here.
449 int "Maximum number of CPUs (2-64)"
452 # These have to remain sorted largest to smallest
456 bool "Support for hot-pluggable CPUs"
459 Say Y here to experiment with turning CPUs off and on. CPUs
460 can be controlled through /sys/devices/system/cpu.
462 source kernel/Kconfig.preempt
468 config ARCH_HAS_HOLES_MEMORYMODEL
469 def_bool y if SPARSEMEM
471 config ARCH_SPARSEMEM_ENABLE
473 select SPARSEMEM_VMEMMAP_ENABLE
475 config ARCH_SPARSEMEM_DEFAULT
476 def_bool ARCH_SPARSEMEM_ENABLE
478 config ARCH_SELECT_MEMORY_MODEL
479 def_bool ARCH_SPARSEMEM_ENABLE
481 config HAVE_ARCH_PFN_VALID
482 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
484 config HW_PERF_EVENTS
485 bool "Enable hardware performance counter support for perf events"
486 depends on PERF_EVENTS
489 Enable hardware performance counter support for perf events. If
490 disabled, perf events will use software events only.
492 config SYS_SUPPORTS_HUGETLBFS
495 config ARCH_WANT_GENERAL_HUGETLB
498 config ARCH_WANT_HUGE_PMD_SHARE
499 def_bool y if !ARM64_64K_PAGES
501 config HAVE_ARCH_TRANSPARENT_HUGEPAGE
504 config ARCH_HAS_CACHE_LINE_SIZE
510 bool "Enable seccomp to safely compute untrusted bytecode"
512 This kernel feature is useful for number crunching applications
513 that may need to compute untrusted bytecode during their
514 execution. By using pipes or other transports made available to
515 the process as file descriptors supporting the read/write
516 syscalls, it's possible to isolate those applications in
517 their own address space using seccomp. Once seccomp is
518 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
519 and the task is only allowed to execute a few safe syscalls
520 defined by each seccomp mode.
527 bool "Xen guest support on ARM64"
528 depends on ARM64 && OF
531 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
533 config FORCE_MAX_ZONEORDER
535 default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
538 menuconfig ARMV8_DEPRECATED
539 bool "Emulate deprecated/obsolete ARMv8 instructions"
542 Legacy software support may require certain instructions
543 that have been deprecated or obsoleted in the architecture.
545 Enable this config to enable selective emulation of these
553 bool "Emulate SWP/SWPB instructions"
555 ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
556 they are always undefined. Say Y here to enable software
557 emulation of these instructions for userspace using LDXR/STXR.
559 In some older versions of glibc [<=2.8] SWP is used during futex
560 trylock() operations with the assumption that the code will not
561 be preempted. This invalid assumption may be more likely to fail
562 with SWP emulation enabled, leading to deadlock of the user
565 NOTE: when accessing uncached shared regions, LDXR/STXR rely
566 on an external transaction monitoring block called a global
567 monitor to maintain update atomicity. If your system does not
568 implement a global monitor, this option can cause programs that
569 perform SWP operations to uncached memory to deadlock.
573 config CP15_BARRIER_EMULATION
574 bool "Emulate CP15 Barrier instructions"
576 The CP15 barrier instructions - CP15ISB, CP15DSB, and
577 CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
578 strongly recommended to use the ISB, DSB, and DMB
579 instructions instead.
581 Say Y here to enable software emulation of these
582 instructions for AArch32 userspace code. When this option is
583 enabled, CP15 barrier usage is traced which can help
584 identify software that needs updating.
595 string "Default kernel command string"
598 Provide a set of default command-line options at build time by
599 entering them here. As a minimum, you should specify the the
600 root device (e.g. root=/dev/nfs).
603 bool "Always use the default kernel command string"
605 Always use the default kernel command string, even if the boot
606 loader passes other arguments to the kernel.
607 This is useful if you cannot or don't want to change the
608 command-line options your boot loader passes to the kernel.
614 bool "UEFI runtime support"
615 depends on OF && !CPU_BIG_ENDIAN
618 select EFI_PARAMS_FROM_FDT
619 select EFI_RUNTIME_WRAPPERS
624 This option provides support for runtime services provided
625 by UEFI firmware (such as non-volatile variables, realtime
626 clock, and platform reset). A UEFI stub is also provided to
627 allow the kernel to be booted as an EFI application. This
628 is only useful on systems that have UEFI firmware.
631 bool "Enable support for SMBIOS (DMI) tables"
635 This enables SMBIOS/DMI feature for systems.
637 This option is only useful on systems that have UEFI firmware.
638 However, even with this option, the resultant kernel should
639 continue to boot on existing non-UEFI platforms.
643 menu "Userspace binary formats"
645 source "fs/Kconfig.binfmt"
648 bool "Kernel support for 32-bit EL0"
649 depends on !ARM64_64K_PAGES
650 select COMPAT_BINFMT_ELF
652 select OLD_SIGSUSPEND3
653 select COMPAT_OLD_SIGACTION
655 This option enables support for a 32-bit EL0 running under a 64-bit
656 kernel at EL1. AArch32-specific components such as system calls,
657 the user helper functions, VFP support and the ptrace interface are
658 handled appropriately by the kernel.
660 If you want to execute 32-bit userspace applications, say Y.
662 config SYSVIPC_COMPAT
664 depends on COMPAT && SYSVIPC
668 menu "Power management options"
670 source "kernel/power/Kconfig"
672 config ARCH_SUSPEND_POSSIBLE
675 config ARM64_CPU_SUSPEND
680 menu "CPU Power Management"
682 source "drivers/cpuidle/Kconfig"
684 source "drivers/cpufreq/Kconfig"
690 source "drivers/Kconfig"
692 source "drivers/firmware/Kconfig"
696 source "arch/arm64/kvm/Kconfig"
698 source "arch/arm64/Kconfig.debug"
700 source "security/Kconfig"
702 source "crypto/Kconfig"
704 source "arch/arm64/crypto/Kconfig"