Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/linux...
[linux-drm-fsl-dcu.git] / arch / arm / mach-ixp4xx / ixdp425-setup.c
1 /*
2  * arch/arm/mach-ixp4xx/ixdp425-setup.c
3  *
4  * IXDP425/IXCDP1100 board-setup
5  *
6  * Copyright (C) 2003-2005 MontaVista Software, Inc.
7  *
8  * Author: Deepak Saxena <dsaxena@plexity.net>
9  */
10
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/device.h>
14 #include <linux/serial.h>
15 #include <linux/tty.h>
16 #include <linux/serial_8250.h>
17 #include <linux/i2c-gpio.h>
18 #include <linux/io.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/nand.h>
21 #include <linux/mtd/partitions.h>
22 #include <linux/delay.h>
23 #include <linux/gpio.h>
24 #include <asm/types.h>
25 #include <asm/setup.h>
26 #include <asm/memory.h>
27 #include <mach/hardware.h>
28 #include <asm/mach-types.h>
29 #include <asm/irq.h>
30 #include <asm/mach/arch.h>
31 #include <asm/mach/flash.h>
32
33 #define IXDP425_SDA_PIN         7
34 #define IXDP425_SCL_PIN         6
35
36 /* NAND Flash pins */
37 #define IXDP425_NAND_NCE_PIN    12
38
39 #define IXDP425_NAND_CMD_BYTE   0x01
40 #define IXDP425_NAND_ADDR_BYTE  0x02
41
42 static struct flash_platform_data ixdp425_flash_data = {
43         .map_name       = "cfi_probe",
44         .width          = 2,
45 };
46
47 static struct resource ixdp425_flash_resource = {
48         .flags          = IORESOURCE_MEM,
49 };
50
51 static struct platform_device ixdp425_flash = {
52         .name           = "IXP4XX-Flash",
53         .id             = 0,
54         .dev            = {
55                 .platform_data = &ixdp425_flash_data,
56         },
57         .num_resources  = 1,
58         .resource       = &ixdp425_flash_resource,
59 };
60
61 #if defined(CONFIG_MTD_NAND_PLATFORM) || \
62     defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
63
64 static struct mtd_partition ixdp425_partitions[] = {
65         {
66                 .name   = "ixp400 NAND FS 0",
67                 .offset = 0,
68                 .size   = SZ_8M
69         }, {
70                 .name   = "ixp400 NAND FS 1",
71                 .offset = MTDPART_OFS_APPEND,
72                 .size   = MTDPART_SIZ_FULL
73         },
74 };
75
76 static void
77 ixdp425_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
78 {
79         struct nand_chip *this = mtd->priv;
80         int offset = (int)this->priv;
81
82         if (ctrl & NAND_CTRL_CHANGE) {
83                 if (ctrl & NAND_NCE) {
84                         gpio_set_value(IXDP425_NAND_NCE_PIN, 0);
85                         udelay(5);
86                 } else
87                         gpio_set_value(IXDP425_NAND_NCE_PIN, 1);
88
89                 offset = (ctrl & NAND_CLE) ? IXDP425_NAND_CMD_BYTE : 0;
90                 offset |= (ctrl & NAND_ALE) ? IXDP425_NAND_ADDR_BYTE : 0;
91                 this->priv = (void *)offset;
92         }
93
94         if (cmd != NAND_CMD_NONE)
95                 writeb(cmd, this->IO_ADDR_W + offset);
96 }
97
98 static struct platform_nand_data ixdp425_flash_nand_data = {
99         .chip = {
100                 .nr_chips               = 1,
101                 .chip_delay             = 30,
102                 .partitions             = ixdp425_partitions,
103                 .nr_partitions          = ARRAY_SIZE(ixdp425_partitions),
104         },
105         .ctrl = {
106                 .cmd_ctrl               = ixdp425_flash_nand_cmd_ctrl
107         }
108 };
109
110 static struct resource ixdp425_flash_nand_resource = {
111         .flags          = IORESOURCE_MEM,
112 };
113
114 static struct platform_device ixdp425_flash_nand = {
115         .name           = "gen_nand",
116         .id             = -1,
117         .dev            = {
118                 .platform_data = &ixdp425_flash_nand_data,
119         },
120         .num_resources  = 1,
121         .resource       = &ixdp425_flash_nand_resource,
122 };
123 #endif  /* CONFIG_MTD_NAND_PLATFORM */
124
125 static struct i2c_gpio_platform_data ixdp425_i2c_gpio_data = {
126         .sda_pin        = IXDP425_SDA_PIN,
127         .scl_pin        = IXDP425_SCL_PIN,
128 };
129
130 static struct platform_device ixdp425_i2c_gpio = {
131         .name           = "i2c-gpio",
132         .id             = 0,
133         .dev     = {
134                 .platform_data  = &ixdp425_i2c_gpio_data,
135         },
136 };
137
138 static struct resource ixdp425_uart_resources[] = {
139         {
140                 .start          = IXP4XX_UART1_BASE_PHYS,
141                 .end            = IXP4XX_UART1_BASE_PHYS + 0x0fff,
142                 .flags          = IORESOURCE_MEM
143         },
144         {
145                 .start          = IXP4XX_UART2_BASE_PHYS,
146                 .end            = IXP4XX_UART2_BASE_PHYS + 0x0fff,
147                 .flags          = IORESOURCE_MEM
148         }
149 };
150
151 static struct plat_serial8250_port ixdp425_uart_data[] = {
152         {
153                 .mapbase        = IXP4XX_UART1_BASE_PHYS,
154                 .membase        = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
155                 .irq            = IRQ_IXP4XX_UART1,
156                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
157                 .iotype         = UPIO_MEM,
158                 .regshift       = 2,
159                 .uartclk        = IXP4XX_UART_XTAL,
160         },
161         {
162                 .mapbase        = IXP4XX_UART2_BASE_PHYS,
163                 .membase        = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
164                 .irq            = IRQ_IXP4XX_UART2,
165                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
166                 .iotype         = UPIO_MEM,
167                 .regshift       = 2,
168                 .uartclk        = IXP4XX_UART_XTAL,
169         },
170         { },
171 };
172
173 static struct platform_device ixdp425_uart = {
174         .name                   = "serial8250",
175         .id                     = PLAT8250_DEV_PLATFORM,
176         .dev.platform_data      = ixdp425_uart_data,
177         .num_resources          = 2,
178         .resource               = ixdp425_uart_resources
179 };
180
181 /* Built-in 10/100 Ethernet MAC interfaces */
182 static struct eth_plat_info ixdp425_plat_eth[] = {
183         {
184                 .phy            = 0,
185                 .rxq            = 3,
186                 .txreadyq       = 20,
187         }, {
188                 .phy            = 1,
189                 .rxq            = 4,
190                 .txreadyq       = 21,
191         }
192 };
193
194 static struct platform_device ixdp425_eth[] = {
195         {
196                 .name                   = "ixp4xx_eth",
197                 .id                     = IXP4XX_ETH_NPEB,
198                 .dev.platform_data      = ixdp425_plat_eth,
199         }, {
200                 .name                   = "ixp4xx_eth",
201                 .id                     = IXP4XX_ETH_NPEC,
202                 .dev.platform_data      = ixdp425_plat_eth + 1,
203         }
204 };
205
206 static struct platform_device *ixdp425_devices[] __initdata = {
207         &ixdp425_i2c_gpio,
208         &ixdp425_flash,
209 #if defined(CONFIG_MTD_NAND_PLATFORM) || \
210     defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
211         &ixdp425_flash_nand,
212 #endif
213         &ixdp425_uart,
214         &ixdp425_eth[0],
215         &ixdp425_eth[1],
216 };
217
218 static void __init ixdp425_init(void)
219 {
220         ixp4xx_sys_init();
221
222         ixdp425_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
223         ixdp425_flash_resource.end =
224                 IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
225
226 #if defined(CONFIG_MTD_NAND_PLATFORM) || \
227     defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
228         ixdp425_flash_nand_resource.start = IXP4XX_EXP_BUS_BASE(3),
229         ixdp425_flash_nand_resource.end   = IXP4XX_EXP_BUS_BASE(3) + 0x10 - 1;
230
231         gpio_request(IXDP425_NAND_NCE_PIN, "NAND NCE pin");
232         gpio_direction_output(IXDP425_NAND_NCE_PIN, 0);
233
234         /* Configure expansion bus for NAND Flash */
235         *IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN |
236                           IXP4XX_EXP_BUS_STROBE_T(1) |  /* extend by 1 clock */
237                           IXP4XX_EXP_BUS_CYCLES(0) |    /* Intel cycles */
238                           IXP4XX_EXP_BUS_SIZE(0) |      /* 512bytes addr space*/
239                           IXP4XX_EXP_BUS_WR_EN |
240                           IXP4XX_EXP_BUS_BYTE_EN;       /* 8 bit data bus */
241 #endif
242
243         if (cpu_is_ixp43x()) {
244                 ixdp425_uart.num_resources = 1;
245                 ixdp425_uart_data[1].flags = 0;
246         }
247
248         platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices));
249 }
250
251 #ifdef CONFIG_ARCH_IXDP425
252 MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
253         /* Maintainer: MontaVista Software, Inc. */
254         .map_io         = ixp4xx_map_io,
255         .init_early     = ixp4xx_init_early,
256         .init_irq       = ixp4xx_init_irq,
257         .init_time      = ixp4xx_timer_init,
258         .atag_offset    = 0x100,
259         .init_machine   = ixdp425_init,
260 #if defined(CONFIG_PCI)
261         .dma_zone_size  = SZ_64M,
262 #endif
263         .restart        = ixp4xx_restart,
264 MACHINE_END
265 #endif
266
267 #ifdef CONFIG_MACH_IXDP465
268 MACHINE_START(IXDP465, "Intel IXDP465 Development Platform")
269         /* Maintainer: MontaVista Software, Inc. */
270         .map_io         = ixp4xx_map_io,
271         .init_early     = ixp4xx_init_early,
272         .init_irq       = ixp4xx_init_irq,
273         .init_time      = ixp4xx_timer_init,
274         .atag_offset    = 0x100,
275         .init_machine   = ixdp425_init,
276 #if defined(CONFIG_PCI)
277         .dma_zone_size  = SZ_64M,
278 #endif
279 MACHINE_END
280 #endif
281
282 #ifdef CONFIG_ARCH_PRPMC1100
283 MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform")
284         /* Maintainer: MontaVista Software, Inc. */
285         .map_io         = ixp4xx_map_io,
286         .init_early     = ixp4xx_init_early,
287         .init_irq       = ixp4xx_init_irq,
288         .init_time      = ixp4xx_timer_init,
289         .atag_offset    = 0x100,
290         .init_machine   = ixdp425_init,
291 #if defined(CONFIG_PCI)
292         .dma_zone_size  = SZ_64M,
293 #endif
294 MACHINE_END
295 #endif
296
297 #ifdef CONFIG_MACH_KIXRP435
298 MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform")
299         /* Maintainer: MontaVista Software, Inc. */
300         .map_io         = ixp4xx_map_io,
301         .init_early     = ixp4xx_init_early,
302         .init_irq       = ixp4xx_init_irq,
303         .init_time      = ixp4xx_timer_init,
304         .atag_offset    = 0x100,
305         .init_machine   = ixdp425_init,
306 #if defined(CONFIG_PCI)
307         .dma_zone_size  = SZ_64M,
308 #endif
309 MACHINE_END
310 #endif